target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7362sl.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "vr9_avm_fritz736x.dtsi"
   4
   5 / {
   6         compatible = "avm,fritz7362sl", "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
   7         model = "AVM FRITZ!Box 7362 SL";
   8 };
   9
  10 &gpio {
  11         pinctrl-names = "default";
  12         pinctrl-0 = <&state_default>;
  13
  14         state_default: pinmux {
  15                 pcie-rst {
  16                         lantiq,pins = "io21";
  17                         lantiq,pull = <0>;
  18                         lantiq,output = <1>;
  19                 };
  20
  21                 phy-rst {
  22                         lantiq,pins = "io44", "io45";
  23                         lantiq,pull = <0>;
  24                         lantiq,open-drain;
  25                         lantiq,output = <1>;
  26                 };
  27         };
  28
  29 };
  30
  31 &spi {
  32         status = "okay";
  33
  34         flash@4 {
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37                 compatible = "jedec,spi-nor";
  38                 reg = <4>;
  39                 spi-max-frequency = <1000000>;
  40
  41                 partitions {
  42                         compatible = "fixed-partitions";
  43                         #address-cells = <1>;
  44                         #size-cells = <1>;
  45
  46                         urlader: partition@0 {
  47                                 reg = <0x0 0x40000>;
  48                                 label = "urlader";
  49                                 read-only;
  50                         };
  51
  52                         partition@40000 {
  53                                 reg = <0x40000 0x60000>;
  54                                 label = "tffs (1)";
  55                                 read-only;
  56                         };
  57
  58                         partition@A0000 {
  59                                 reg = <0xA0000 0x60000>;
  60                                 label = "tffs (2)";
  61                                 read-only;
  62                         };
  63                 };
  64         };
  65 };
  66
  67 &localbus {
  68         flash1: flash@1 {
  69                 compatible = "lantiq,nand-xway";
  70                 lantiq,cs1 = <1>;
  71                 bank-width = <1>;
  72                 reg = <1 0x0 0x2000000>;
  73
  74                 pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
  75                 pinctrl-names = "default";
  76
  77                 nand-ecc-engine = <&flash1>;
  78
  79                 partitions {
  80                         compatible = "fixed-partitions";
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83
  84                         partition@0 {
  85                                 label = "kernel";
  86                                 reg = <0x0 0x400000>;
  87                         };
  88
  89                         partition@400000 {
  90                                 label = "ubi";
  91                                 reg = <0x400000 0x7c00000>;
  92                         };
  93                 };
  94         };
  95 };
  96
  97 &pcie0 {
  98         gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
  99
 100         pcie@0 {
 101                 #size-cells = <1>;
 102                 #address-cells = <2>;
 103         };
 104 };
 105
 106 &eth0 {
 107         nvmem-cells = <&macaddr_urlader_a91>;
 108         nvmem-cell-names = "mac-address";
 109         mac-address-increment = <(-2)>;
 110 };
 111
 112 &phy0 {
 113         reset-gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
 114 };
 115
 116 &phy1 {
 117         reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
 118 };
 119
 120 &urlader {
 121         compatible = "nvmem-cells";
 122         #address-cells = <1>;
 123         #size-cells = <1>;
 124
 125         macaddr_urlader_a91: macaddr@a91 {
 126                 reg = <0xa91 0x6>;
 127         };
 128 };