target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 led-boot = &power;
  15                 led-failsafe = &power;
  16                 led-running = &power;
  17                 led-upgrade = &power;
  18         };
  19
  20         memory@0 {
  21                 device_type = "memory";
  22                 reg = <0x0 0x4000000>;
  23         };
  24
  25         keys {
  26                 compatible = "gpio-keys-polled";
  27                 poll-interval = <100>;
  28 /*              reset {
  29                         label = "reset";
  30                         gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RESTART>;
  32                 };*/
  33                 paging {
  34                         label = "paging";
  35                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_PHONE>;
  37                 };
  38         };
  39
  40         leds {
  41                 compatible = "gpio-leds";
  42
  43                 power: power {
  44                         label = "green:power";
  45                         gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
  46                         default-state = "keep";
  47                 };
  48                 warning {
  49                         label = "green:warning";
  50                         gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
  51                 };
  52                 fxs1 {
  53                         label = "green:fxs1";
  54                         gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
  55                 };
  56                 fxs2 {
  57                         label = "green:fxs2";
  58                         gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
  59                 };
  60                 fxo {
  61                         label = "green:fxo";
  62                         gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
  63                 };
  64                 usb1 {
  65                         label = "green:usb1";
  66                         gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
  67                         trigger-sources = <&ehci_port1>;
  68                         linux,default-trigger = "usbport";
  69                 };
  70
  71                 usb2 {
  72                         label = "green:usb2";
  73                         gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
  74                         trigger-sources = <&ehci_port2>;
  75                         linux,default-trigger = "usbport";
  76                 };
  77                 sd {
  78                         label = "green:sd";
  79                         gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
  80                 };
  81                 wps {
  82                         label = "green:wps";
  83                         gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
  84                 };
  85         };
  86
  87         usb_vbus: regulator-usb-vbus {
  88                 compatible = "regulator-fixed";
  89
  90                 regulator-name = "USB_VBUS";
  91
  92                 regulator-min-microvolt = <5000000>;
  93                 regulator-max-microvolt = <5000000>;
  94
  95                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  96                 enable-active-high;
  97         };
  98 };
  99
 100 &eth0 {
 101         interface@0 {
 102                 compatible = "lantiq,xrx200-pdi";
 103                 #address-cells = <1>;
 104                 #size-cells = <0>;
 105                 reg = <0>;
 106                 lantiq,switch;
 107
 108                 ethernet@0 {
 109                         compatible = "lantiq,xrx200-pdi-port";
 110                         reg = <0>;
 111                         phy-mode = "rgmii";
 112                         phy-handle = <&phy0>;
 113                 };
 114                 ethernet@1 {
 115                         compatible = "lantiq,xrx200-pdi-port";
 116                         reg = <1>;
 117                         phy-mode = "rgmii";
 118                         phy-handle = <&phy1>;
 119                 };
 120                 ethernet@2 {
 121                         compatible = "lantiq,xrx200-pdi-port";
 122                         reg = <2>;
 123                         phy-mode = "gmii";
 124                         phy-handle = <&phy11>;
 125                 };
 126                 ethernet@4 {
 127                         compatible = "lantiq,xrx200-pdi-port";
 128                         reg = <4>;
 129                         phy-mode = "gmii";
 130                         phy-handle = <&phy13>;
 131                 };
 132         };
 133
 134         interface@1 {
 135                 compatible = "lantiq,xrx200-pdi";
 136                 #address-cells = <1>;
 137                 #size-cells = <0>;
 138                 reg = <1>;
 139                 lantiq,wan;
 140
 141                 ethernet@5 {
 142                         compatible = "lantiq,xrx200-pdi-port";
 143                         reg = <5>;
 144                         phy-mode = "rgmii";
 145                         phy-handle = <&phy5>;
 146                 };
 147         };
 148
 149         mdio {
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152                 compatible = "lantiq,xrx200-mdio";
 153
 154                 phy0: ethernet-phy@0 {
 155                         reg = <0x0>;
 156                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 157                 };
 158                 phy1: ethernet-phy@1 {
 159                         reg = <0x1>;
 160                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 161                 };
 162                 phy5: ethernet-phy@5 {
 163                         reg = <0x5>;
 164                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 165                 };
 166                 phy11: ethernet-phy@11 {
 167                         reg = <0x11>;
 168                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 169                 };
 170                 phy13: ethernet-phy@13 {
 171                         reg = <0x13>;
 172                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 173                 };
 174         };
 175 };
 176
 177 &gphy0 {
 178         lantiq,gphy-mode = <GPHY_MODE_GE>;
 179 };
 180
 181 &gphy1 {
 182         lantiq,gphy-mode = <GPHY_MODE_GE>;
 183 };
 184
 185 &gpio {
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&state_default>;
 188
 189         state_default: pinmux {
 190                 exin3 {
 191                         lantiq,groups = "exin3";
 192                         lantiq,function = "exin";
 193                 };
 194                 conf_out {
 195                         lantiq,pins = "io21",
 196                                         "io33";
 197                         lantiq,open-drain;
 198                         lantiq,pull = <0>;
 199                         lantiq,output = <1>;
 200                 };
 201                 pcie-rst {
 202                         lantiq,pins = "io38";
 203                         lantiq,pull = <0>;
 204                         lantiq,output = <1>;
 205                 };
 206                 conf_in {
 207                         lantiq,pins = "io39"; /* exin3 */
 208                         lantiq,pull = <2>;
 209                 };
 210         };
 211 };
 212
 213 &spi {
 214         status = "okay";
 215
 216         flash@4 {
 217                 compatible = "jedec,spi-nor";
 218                 reg = <4>;
 219                 spi-max-frequency = <1000000>;
 220
 221                 partitions {
 222                         compatible = "fixed-partitions";
 223                         #address-cells = <1>;
 224                         #size-cells = <1>;
 225
 226                         partition@0 {
 227                                 reg = <0x0 0x20000>;
 228                                 label = "SPI (RO) U-Boot Image";
 229                                 read-only;
 230                         };
 231
 232                         partition@20000 {
 233                                 reg = <0x20000 0x10000>;
 234                                 label = "ENV_MAC";
 235                                 read-only;
 236                         };
 237
 238                         partition@30000 {
 239                                 reg = <0x30000 0x10000>;
 240                                 label = "DPF";
 241                                 read-only;
 242                         };
 243
 244                         partition@40000 {
 245                                 reg = <0x40000 0x10000>;
 246                                 label = "NVRAM";
 247                                 read-only;
 248                         };
 249
 250                         partition@50000 {
 251                                 reg = <0x50000 0x3a0000>;
 252                                 label = "kernel";
 253                         };
 254                 };
 255         };
 256 };
 257
 258 &pci0 {
 259         pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
 260         pinctrl-names = "default";
 261 };
 262
 263 &stp {
 264         status = "okay";
 265
 266         lantiq,shadow = <0xffff>;
 267         lantiq,dsl = <0x3>;
 268         lantiq,phy1 = <0x7>;
 269         lantiq,phy2 = <0x7>;
 270         /* lantiq,rising; */
 271 };
 272
 273 &usb_phy0 {
 274         status = "okay";
 275 };
 276
 277 &usb0 {
 278         status = "okay";
 279         vbus-supply = <&usb_vbus>;
 280 };