target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         aliases {
   8                 led-boot = &led_power;
   9                 led-failsafe = &led_power;
  10                 led-running = &led_power;
  11                 led-upgrade = &led_power;
  12
  13                 led-dsl = &led_dsl;
  14                 led-internet = &led_internet;
  15                 led-wifi = &led_wlan5g;
  16
  17                 led-usb = &led_usb;
  18                 led-usb2 = &led_usb;
  19         };
  20
  21         memory@0 {
  22                 device_type = "memory";
  23                 reg = <0x0 0x7f00000>;
  24         };
  25
  26         keys: keys {
  27                 compatible = "gpio-keys-polled";
  28                 poll-interval = <100>;
  29
  30                 reset {
  31                         label = "reset";
  32                         gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  33                         linux,code = <KEY_RESTART>;
  34                 };
  35
  36                 wifi {
  37                         label = "wifi";
  38                         gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
  39                         linux,code = <KEY_RFKILL>;
  40                         linux,input-type = <EV_SW>;
  41                 };
  42
  43                 wps {
  44                         label = "wps";
  45                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  46                         linux,code = <KEY_WPS_BUTTON>;
  47                 };
  48         };
  49
  50         leds: leds {
  51                 compatible = "gpio-leds";
  52
  53                 led_power: power {
  54                         label = "blue:power";
  55                         gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
  56                         default-state = "keep";
  57                 };
  58
  59                 led_dsl: dsl {
  60                         label = "blue:dsl";
  61                         gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
  62                 };
  63
  64                 led_internet: internet {
  65                         label = "blue:internet";
  66                         gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
  67                 };
  68
  69                 led_usb: usb {
  70                         label = "blue:usb";
  71                         gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
  72                 };
  73
  74                 eth {
  75                         label = "blue:lan";
  76                         gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
  77                 };
  78
  79                 wlan {
  80                         label = "blue:wlan";
  81                         gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
  82                 };
  83
  84                 led_wlan5g: wifi {
  85                         label = "blue:wlan5g";
  86                         gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
  87                 };
  88         };
  89
  90         usb_vbus: regulator-usb-vbus {
  91                 compatible = "regulator-fixed";
  92
  93                 regulator-name = "USB_VBUS";
  94
  95                 regulator-min-microvolt = <5000000>;
  96                 regulator-max-microvolt = <5000000>;
  97
  98                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  99                 enable-active-high;
 100         };
 101 };
 102
 103 &eth0 {
 104         pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
 105         pinctrl-names = "default";
 106
 107         lan: interface@0 {
 108                 compatible = "lantiq,xrx200-pdi";
 109                 #address-cells = <1>;
 110                 #size-cells = <0>;
 111                 reg = <0>;
 112                 mtd-mac-address = <&romfile 0xf100>;
 113                 lantiq,switch;
 114
 115                 ethernet@0 {
 116                         compatible = "lantiq,xrx200-pdi-port";
 117                         reg = <0>;
 118                         phy-mode = "rgmii";
 119                         phy-handle = <&phy0>;
 120                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 121                 };
 122                 ethernet@2 {
 123                         compatible = "lantiq,xrx200-pdi-port";
 124                         reg = <2>;
 125                         phy-mode = "gmii";
 126                         phy-handle = <&phy11>;
 127                 };
 128                 ethernet@4 {
 129                         compatible = "lantiq,xrx200-pdi-port";
 130                         reg = <4>;
 131                         phy-mode = "gmii";
 132                         phy-handle = <&phy13>;
 133                 };
 134                 ethernet@5 {
 135                         compatible = "lantiq,xrx200-pdi-port";
 136                         reg = <5>;
 137                         phy-mode = "rgmii";
 138                         phy-handle = <&phy5>;
 139                 };
 140         };
 141
 142         mdio {
 143                 #address-cells = <1>;
 144                 #size-cells = <0>;
 145                 compatible = "lantiq,xrx200-mdio";
 146
 147                 phy0: ethernet-phy@0 {
 148                         reg = <0x0>;
 149                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 150                 };
 151                 phy5: ethernet-phy@5 {
 152                         reg = <0x5>;
 153                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 154                 };
 155                 phy11: ethernet-phy@11 {
 156                         reg = <0x11>;
 157                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 158                 };
 159                 phy13: ethernet-phy@13 {
 160                         reg = <0x13>;
 161                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 162                 };
 163         };
 164 };
 165
 166 &gphy0 {
 167         lantiq,gphy-mode = <GPHY_MODE_GE>;
 168 };
 169
 170 &gphy1 {
 171         lantiq,gphy-mode = <GPHY_MODE_GE>;
 172 };
 173
 174 &gpio {
 175         pinctrl-names = "default";
 176         pinctrl-0 = <&state_default>;
 177
 178         state_default: pinmux {
 179                 phy-rst {
 180                         lantiq,pins = "io42";
 181                         lantiq,pull = <0>;
 182                         lantiq,open-drain = <0>;
 183                         lantiq,output = <1>;
 184                 };
 185                 pcie-rst {
 186                         lantiq,pins = "io38";
 187                         lantiq,pull = <0>;
 188                         lantiq,output = <1>;
 189                 };
 190         };
 191 };
 192
 193 &pcie0 {
 194         pcie@0 {
 195                 reg = <0 0 0 0 0>;
 196                 #interrupt-cells = <1>;
 197                 #size-cells = <2>;
 198                 #address-cells = <3>;
 199                 device_type = "pci";
 200
 201                 wifi@0,0 {
 202                         reg = <0 0 0 0 0>;
 203                         mediatek,mtd-eeprom = <&radio 0x0000>;
 204                         big-endian;
 205                         ieee80211-freq-limit = <5000000 6000000>;
 206                         mtd-mac-address = <&romfile 0xf100>;
 207                         mtd-mac-address-increment = <2>;
 208                 };
 209         };
 210 };
 211
 212 &pci0 {
 213         status = "okay";
 214         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
 215 };
 216
 217 &spi {
 218         status = "okay";
 219
 220         flash@4 {
 221                 compatible = "jedec,spi-nor";
 222                 reg = <4>;
 223                 spi-max-frequency = <33250000>;
 224                 m25p,fast-read;
 225
 226                 partitions {
 227                         compatible = "fixed-partitions";
 228                         #address-cells = <1>;
 229                         #size-cells = <1>;
 230
 231                         partition@0 {
 232                                 reg = <0x0 0x20000>;
 233                                 label = "u-boot";
 234                                 read-only;
 235                         };
 236
 237                         partition@20000 {
 238                                 reg = <0x20000 0xf90000>;
 239                                 label = "firmware";
 240                         };
 241
 242                         partition@fb0000 {
 243                                 reg = <0xfb0000 0x10000>;
 244                                 label = "radioDECT";
 245                                 read-only;
 246                         };
 247
 248                         partition@fc0000 {
 249                                 reg = <0xfc0000 0x10000>;
 250                                 label = "config";
 251                                 read-only;
 252                         };
 253
 254                         romfile: partition@fd0000 {
 255                                 reg = <0xfd0000 0x10000>;
 256                                 label = "romfile";
 257                                 read-only;
 258                         };
 259
 260                         partition@fe0000 {
 261                                 reg = <0xfe0000 0x10000>;
 262                                 label = "rom";
 263                                 read-only;
 264                         };
 265
 266                         radio: partition@ff0000 {
 267                                 reg = <0xff0000 0x10000>;
 268                                 label = "radio";
 269                                 read-only;
 270                         };
 271                 };
 272         };
 273 };
 274
 275 &usb_phy0 {
 276         status = "okay";
 277 };
 278
 279 &usb_phy1 {
 280         status = "okay";
 281 };
 282
 283 &usb0 {
 284         status = "okay";
 285         vbus-supply = <&usb_vbus>;
 286 };
 287
 288 &usb1 {
 289         status = "okay";
 290         vbus-supply = <&usb_vbus>;
 291 };