kernel-5.4: bump to 5.4.102 and refresh patches
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 302-dts-0104-arm64-dts-lx2160a-add-iommu-map-property-to-pci-node.patch
1 From ad5077a8da6e8aad01b7b6ad979b52c39118969d Mon Sep 17 00:00:00 2001
2 From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
3 Date: Tue, 17 Dec 2019 13:26:37 +0200
4 Subject: [PATCH] arm64: dts: lx2160a: add iommu-map property to pci nodes
5
6 Add the iommu-map property to the pci nodes so that the firmware
7 fixes it up with the required values thus enabling iommu for
8 devices connected over pci.
9
10 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
11 Acked-by: Li Yang <leoyang.li@nxp.com>
12 ---
13 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 6 ++++++
14 1 file changed, 6 insertions(+)
15
16 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
17 +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
18 @@ -954,6 +954,7 @@
19 bus-range = <0x0 0xff>;
20 ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
21 msi-parent = <&its>;
22 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
23 #interrupt-cells = <1>;
24 interrupt-map-mask = <0 0 0 7>;
25 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
26 @@ -990,6 +991,7 @@
27 bus-range = <0x0 0xff>;
28 ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
29 msi-parent = <&its>;
30 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
31 #interrupt-cells = <1>;
32 interrupt-map-mask = <0 0 0 7>;
33 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
34 @@ -1026,6 +1028,7 @@
35 bus-range = <0x0 0xff>;
36 ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
37 msi-parent = <&its>;
38 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
39 #interrupt-cells = <1>;
40 interrupt-map-mask = <0 0 0 7>;
41 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
42 @@ -1063,6 +1066,7 @@
43 bus-range = <0x0 0xff>;
44 ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
45 msi-parent = <&its>;
46 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
47 #interrupt-cells = <1>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
50 @@ -1099,6 +1103,7 @@
51 bus-range = <0x0 0xff>;
52 ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
53 msi-parent = <&its>;
54 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
55 #interrupt-cells = <1>;
56 interrupt-map-mask = <0 0 0 7>;
57 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
58 @@ -1136,6 +1141,7 @@
59 bus-range = <0x0 0xff>;
60 ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
61 msi-parent = <&its>;
62 + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
63 #interrupt-cells = <1>;
64 interrupt-map-mask = <0 0 0 7>;
65 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,