target/linux/layerscape/patches-5.4/701-net-0318-staging-fsl_ppfe-eth-adapt-to-link-mode-based-phydev.patch

   1 From 002297dd2634e993257a00fe4458b0288ec7baea Mon Sep 17 00:00:00 2001
   2 From: Calvin Johnson <calvin.johnson@nxp.com>
   3 Date: Wed, 27 Mar 2019 13:25:57 +0530
   4 Subject: [PATCH] staging: fsl_ppfe/eth: adapt to link mode based phydev
   5  changes
   6
   7 Setting link mode bits have changed with the integration of
   8 commit (3c1bcc8 net: ethernet: Convert phydev advertize and
   9 supported from u32 to link mode). Adapt to the new method of
  10 setting and clearing the link mode bits.
  11
  12 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
  13 ---
  14  drivers/staging/fsl_ppfe/pfe_eth.c | 24 ++++++++++++++++--------
  15  1 file changed, 16 insertions(+), 8 deletions(-)
  16
  17 --- a/drivers/staging/fsl_ppfe/pfe_eth.c
  18 +++ b/drivers/staging/fsl_ppfe/pfe_eth.c
  19 @@ -701,10 +701,14 @@ static int pfe_eth_set_pauseparam(struct
  20                                         EGPI_PAUSE_ENABLE),
  21                                 priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
  22                 if (priv->phydev) {
  23 -                       priv->phydev->supported |= ADVERTISED_Pause |
  24 -                                                       ADVERTISED_Asym_Pause;
  25 -                       priv->phydev->advertising |= ADVERTISED_Pause |
  26 -                                                       ADVERTISED_Asym_Pause;
  27 +                       linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  28 +                                        priv->phydev->supported);
  29 +                       linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  30 +                                        priv->phydev->supported);
  31 +                       linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  32 +                                        priv->phydev->advertising);
  33 +                       linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  34 +                                        priv->phydev->advertising);
  35                 }
  36         } else {
  37                 gemac_disable_pause_rx(priv->EMAC_baseaddr);
  38 @@ -712,10 +716,14 @@ static int pfe_eth_set_pauseparam(struct
  39                                         ~EGPI_PAUSE_ENABLE),
  40                                 priv->GPI_baseaddr + GPI_TX_PAUSE_TIME);
  41                 if (priv->phydev) {
  42 -                       priv->phydev->supported &= ~(ADVERTISED_Pause |
  43 -                                                       ADVERTISED_Asym_Pause);
  44 -                       priv->phydev->advertising &= ~(ADVERTISED_Pause |
  45 -                                                       ADVERTISED_Asym_Pause);
  46 +                       linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  47 +                                          priv->phydev->supported);
  48 +                       linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  49 +                                          priv->phydev->supported);
  50 +                       linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT,
  51 +                                          priv->phydev->advertising);
  52 +                       linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
  53 +                                          priv->phydev->advertising);
  54                 }
  55         }
  56