target/linux/layerscape/patches-5.4/806-dma-0020-MLK-22798-1-dmaengine-fsl-edma-v3-do-not-enable-inte.patch

   1 From dcb4deb92738a2fd3981550dbf18ae96e22bbe80 Mon Sep 17 00:00:00 2001
   2 From: Robin Gong <yibin.gong@nxp.com>
   3 Date: Wed, 23 Oct 2019 00:33:42 +0800
   4 Subject: [PATCH] MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt
   5  in dev_2_dev
   6
   7 Do not enable interrupt in dev_2_dev with cyclic case, since in such
   8 case no any interrupt needed. Otherwise many interrupt will come in
   9 every 64 words transfered in ASRC case, which cause heavy system
  10 loading.
  11
  12 Signed-off-by: Robin Gong <yibin.gong@nxp.com>
  13 Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
  14 (cherry picked from commit f0a3172e1ceb04c46377160486ad7dc6ee022850)
  15 ---
  16  drivers/dma/fsl-edma-v3.c | 4 +++-
  17  1 file changed, 3 insertions(+), 1 deletion(-)
  18
  19 --- a/drivers/dma/fsl-edma-v3.c
  20 +++ b/drivers/dma/fsl-edma-v3.c
  21 @@ -560,6 +560,7 @@ static struct dma_async_tx_descriptor *f
  22         int sg_len, i;
  23         u32 src_addr, dst_addr, last_sg, nbytes;
  24         u16 soff, doff, iter;
  25 +       bool major_int = true;
  26
  27         sg_len = buf_len / period_len;
  28         fsl_desc = fsl_edma3_alloc_desc(fsl_chan, sg_len);
  29 @@ -600,11 +601,12 @@ static struct dma_async_tx_descriptor *f
  30                         dst_addr = fsl_chan->fsc.dev_addr;
  31                         soff = 0;
  32                         doff = 0;
  33 +                       major_int = false;
  34                 }
  35
  36                 fsl_edma3_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr,
  37                                 dst_addr, fsl_chan->fsc.attr, soff, nbytes, 0,
  38 -                               iter, iter, doff, last_sg, true, false, true);
  39 +                               iter, iter, doff, last_sg, major_int, false, true);
  40                 dma_buf_next += period_len;
  41         }
  42