target/linux/mediatek/files-5.10/drivers/net/phy/mtk/mt753x/mt753x_mdio.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2018 MediaTek Inc.
   4  * Author: Weijie Gao <weijie.gao@mediatek.com>
   5  */
   6
   7 #include <linux/kernel.h>
   8 #include <linux/module.h>
   9 #include <linux/init.h>
  10 #include <linux/device.h>
  11 #include <linux/delay.h>
  12 #include <linux/reset.h>
  13 #include <linux/hrtimer.h>
  14 #include <linux/mii.h>
  15 #include <linux/of_mdio.h>
  16 #include <linux/of_platform.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/of_net.h>
  19 #include <linux/of_irq.h>
  20 #include <linux/phy.h>
  21
  22 #include "mt753x.h"
  23 #include "mt753x_swconfig.h"
  24 #include "mt753x_regs.h"
  25 #include "mt753x_nl.h"
  26 #include "mt7530.h"
  27 #include "mt7531.h"
  28
  29 static u32 mt753x_id;
  30 struct list_head mt753x_devs;
  31 static DEFINE_MUTEX(mt753x_devs_lock);
  32
  33 static struct mt753x_sw_id *mt753x_sw_ids[] = {
  34         &mt7530_id,
  35         &mt7531_id,
  36 };
  37
  38 u32 mt753x_reg_read(struct gsw_mt753x *gsw, u32 reg)
  39 {
  40         u32 high, low;
  41
  42         mutex_lock(&gsw->host_bus->mdio_lock);
  43
  44         gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
  45                 (reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
  46
  47         low = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr,
  48                 (reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S);
  49
  50         high = gsw->host_bus->read(gsw->host_bus, gsw->smi_addr, 0x10);
  51
  52         mutex_unlock(&gsw->host_bus->mdio_lock);
  53
  54         return (high << 16) | (low & 0xffff);
  55 }
  56
  57 void mt753x_reg_write(struct gsw_mt753x *gsw, u32 reg, u32 val)
  58 {
  59         mutex_lock(&gsw->host_bus->mdio_lock);
  60
  61         gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x1f,
  62                 (reg & MT753X_REG_PAGE_ADDR_M) >> MT753X_REG_PAGE_ADDR_S);
  63
  64         gsw->host_bus->write(gsw->host_bus, gsw->smi_addr,
  65                 (reg & MT753X_REG_ADDR_M) >> MT753X_REG_ADDR_S, val & 0xffff);
  66
  67         gsw->host_bus->write(gsw->host_bus, gsw->smi_addr, 0x10, val >> 16);
  68
  69         mutex_unlock(&gsw->host_bus->mdio_lock);
  70 }
  71
  72 /* Indirect MDIO clause 22/45 access */
  73 static int mt753x_mii_rw(struct gsw_mt753x *gsw, int phy, int reg, u16 data,
  74                          u32 cmd, u32 st)
  75 {
  76         ktime_t timeout;
  77         u32 val, timeout_us;
  78         int ret = 0;
  79
  80         timeout_us = 100000;
  81         timeout = ktime_add_us(ktime_get(), timeout_us);
  82         while (1) {
  83                 val = mt753x_reg_read(gsw, PHY_IAC);
  84
  85                 if ((val & PHY_ACS_ST) == 0)
  86                         break;
  87
  88                 if (ktime_compare(ktime_get(), timeout) > 0)
  89                         return -ETIMEDOUT;
  90         }
  91
  92         val = (st << MDIO_ST_S) |
  93               ((cmd << MDIO_CMD_S) & MDIO_CMD_M) |
  94               ((phy << MDIO_PHY_ADDR_S) & MDIO_PHY_ADDR_M) |
  95               ((reg << MDIO_REG_ADDR_S) & MDIO_REG_ADDR_M);
  96
  97         if (cmd == MDIO_CMD_WRITE || cmd == MDIO_CMD_ADDR)
  98                 val |= data & MDIO_RW_DATA_M;
  99
 100         mt753x_reg_write(gsw, PHY_IAC, val | PHY_ACS_ST);
 101
 102         timeout_us = 100000;
 103         timeout = ktime_add_us(ktime_get(), timeout_us);
 104         while (1) {
 105                 val = mt753x_reg_read(gsw, PHY_IAC);
 106
 107                 if ((val & PHY_ACS_ST) == 0)
 108                         break;
 109
 110                 if (ktime_compare(ktime_get(), timeout) > 0)
 111                         return -ETIMEDOUT;
 112         }
 113
 114         if (cmd == MDIO_CMD_READ || cmd == MDIO_CMD_READ_C45) {
 115                 val = mt753x_reg_read(gsw, PHY_IAC);
 116                 ret = val & MDIO_RW_DATA_M;
 117         }
 118
 119         return ret;
 120 }
 121
 122 int mt753x_mii_read(struct gsw_mt753x *gsw, int phy, int reg)
 123 {
 124         int val;
 125
 126         if (phy < MT753X_NUM_PHYS)
 127                 phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
 128
 129         mutex_lock(&gsw->mii_lock);
 130         val = mt753x_mii_rw(gsw, phy, reg, 0, MDIO_CMD_READ, MDIO_ST_C22);
 131         mutex_unlock(&gsw->mii_lock);
 132
 133         return val;
 134 }
 135
 136 void mt753x_mii_write(struct gsw_mt753x *gsw, int phy, int reg, u16 val)
 137 {
 138         if (phy < MT753X_NUM_PHYS)
 139                 phy = (gsw->phy_base + phy) & MT753X_SMI_ADDR_MASK;
 140
 141         mutex_lock(&gsw->mii_lock);
 142         mt753x_mii_rw(gsw, phy, reg, val, MDIO_CMD_WRITE, MDIO_ST_C22);
 143         mutex_unlock(&gsw->mii_lock);
 144 }
 145
 146 int mt753x_mmd_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
 147 {
 148         int val;
 149
 150         if (addr < MT753X_NUM_PHYS)
 151                 addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
 152
 153         mutex_lock(&gsw->mii_lock);
 154         mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
 155         val = mt753x_mii_rw(gsw, addr, devad, 0, MDIO_CMD_READ_C45,
 156                             MDIO_ST_C45);
 157         mutex_unlock(&gsw->mii_lock);
 158
 159         return val;
 160 }
 161
 162 void mt753x_mmd_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
 163                       u16 val)
 164 {
 165         if (addr < MT753X_NUM_PHYS)
 166                 addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
 167
 168         mutex_lock(&gsw->mii_lock);
 169         mt753x_mii_rw(gsw, addr, devad, reg, MDIO_CMD_ADDR, MDIO_ST_C45);
 170         mt753x_mii_rw(gsw, addr, devad, val, MDIO_CMD_WRITE, MDIO_ST_C45);
 171         mutex_unlock(&gsw->mii_lock);
 172 }
 173
 174 int mt753x_mmd_ind_read(struct gsw_mt753x *gsw, int addr, int devad, u16 reg)
 175 {
 176         u16 val;
 177
 178         if (addr < MT753X_NUM_PHYS)
 179                 addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
 180
 181         mutex_lock(&gsw->mii_lock);
 182
 183         mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
 184                       (MMD_ADDR << MMD_CMD_S) |
 185                       ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
 186                       MDIO_CMD_WRITE, MDIO_ST_C22);
 187
 188         mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
 189                       MDIO_CMD_WRITE, MDIO_ST_C22);
 190
 191         mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
 192                       (MMD_DATA << MMD_CMD_S) |
 193                       ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
 194                       MDIO_CMD_WRITE, MDIO_ST_C22);
 195
 196         val = mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, 0,
 197                             MDIO_CMD_READ, MDIO_ST_C22);
 198
 199         mutex_unlock(&gsw->mii_lock);
 200
 201         return val;
 202 }
 203
 204 void mt753x_mmd_ind_write(struct gsw_mt753x *gsw, int addr, int devad, u16 reg,
 205                           u16 val)
 206 {
 207         if (addr < MT753X_NUM_PHYS)
 208                 addr = (gsw->phy_base + addr) & MT753X_SMI_ADDR_MASK;
 209
 210         mutex_lock(&gsw->mii_lock);
 211
 212         mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
 213                       (MMD_ADDR << MMD_CMD_S) |
 214                       ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
 215                       MDIO_CMD_WRITE, MDIO_ST_C22);
 216
 217         mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, reg,
 218                       MDIO_CMD_WRITE, MDIO_ST_C22);
 219
 220         mt753x_mii_rw(gsw, addr, MII_MMD_ACC_CTL_REG,
 221                       (MMD_DATA << MMD_CMD_S) |
 222                       ((devad << MMD_DEVAD_S) & MMD_DEVAD_M),
 223                       MDIO_CMD_WRITE, MDIO_ST_C22);
 224
 225         mt753x_mii_rw(gsw, addr, MII_MMD_ADDR_DATA_REG, val,
 226                       MDIO_CMD_WRITE, MDIO_ST_C22);
 227
 228         mutex_unlock(&gsw->mii_lock);
 229 }
 230
 231 static inline int mt753x_get_duplex(const struct device_node *np)
 232 {
 233         return of_property_read_bool(np, "full-duplex");
 234 }
 235
 236 static void mt753x_load_port_cfg(struct gsw_mt753x *gsw)
 237 {
 238         struct device_node *port_np;
 239         struct device_node *fixed_link_node;
 240         struct mt753x_port_cfg *port_cfg;
 241         u32 port;
 242
 243         for_each_child_of_node(gsw->dev->of_node, port_np) {
 244                 if (!of_device_is_compatible(port_np, "mediatek,mt753x-port"))
 245                         continue;
 246
 247                 if (!of_device_is_available(port_np))
 248                         continue;
 249
 250                 if (of_property_read_u32(port_np, "reg", &port))
 251                         continue;
 252
 253                 switch (port) {
 254                 case 5:
 255                         port_cfg = &gsw->port5_cfg;
 256                         break;
 257                 case 6:
 258                         port_cfg = &gsw->port6_cfg;
 259                         break;
 260                 default:
 261                         continue;
 262                 }
 263
 264                 if (port_cfg->enabled) {
 265                         dev_info(gsw->dev, "duplicated node for port%d\n",
 266                                  port_cfg->phy_mode);
 267                         continue;
 268                 }
 269
 270                 port_cfg->np = port_np;
 271
 272                 if (of_get_phy_mode(port_np, &port_cfg->phy_mode) < 0) {
 273                         dev_info(gsw->dev, "incorrect phy-mode %d\n", port);
 274                         continue;
 275                 }
 276
 277                 fixed_link_node = of_get_child_by_name(port_np, "fixed-link");
 278                 if (fixed_link_node) {
 279                         u32 speed;
 280
 281                         port_cfg->force_link = 1;
 282                         port_cfg->duplex = mt753x_get_duplex(fixed_link_node);
 283
 284                         if (of_property_read_u32(fixed_link_node, "speed",
 285                                                  &speed)) {
 286                                 speed = 0;
 287                                 continue;
 288                         }
 289
 290                         of_node_put(fixed_link_node);
 291
 292                         switch (speed) {
 293                         case 10:
 294                                 port_cfg->speed = MAC_SPD_10;
 295                                 break;
 296                         case 100:
 297                                 port_cfg->speed = MAC_SPD_100;
 298                                 break;
 299                         case 1000:
 300                                 port_cfg->speed = MAC_SPD_1000;
 301                                 break;
 302                         case 2500:
 303                                 port_cfg->speed = MAC_SPD_2500;
 304                                 break;
 305                         default:
 306                                 dev_info(gsw->dev, "incorrect speed %d\n",
 307                                          speed);
 308                                 continue;
 309                         }
 310                 }
 311
 312                 port_cfg->enabled = 1;
 313         }
 314 }
 315
 316 static void mt753x_add_gsw(struct gsw_mt753x *gsw)
 317 {
 318         mutex_lock(&mt753x_devs_lock);
 319         gsw->id = mt753x_id++;
 320         INIT_LIST_HEAD(&gsw->list);
 321         list_add_tail(&gsw->list, &mt753x_devs);
 322         mutex_unlock(&mt753x_devs_lock);
 323 }
 324
 325 static void mt753x_remove_gsw(struct gsw_mt753x *gsw)
 326 {
 327         mutex_lock(&mt753x_devs_lock);
 328         list_del(&gsw->list);
 329         mutex_unlock(&mt753x_devs_lock);
 330 }
 331
 332
 333 struct gsw_mt753x *mt753x_get_gsw(u32 id)
 334 {
 335         struct gsw_mt753x *dev;
 336
 337         mutex_lock(&mt753x_devs_lock);
 338
 339         list_for_each_entry(dev, &mt753x_devs, list) {
 340                 if (dev->id == id)
 341                         return dev;
 342         }
 343
 344         mutex_unlock(&mt753x_devs_lock);
 345
 346         return NULL;
 347 }
 348
 349 struct gsw_mt753x *mt753x_get_first_gsw(void)
 350 {
 351         struct gsw_mt753x *dev;
 352
 353         mutex_lock(&mt753x_devs_lock);
 354
 355         list_for_each_entry(dev, &mt753x_devs, list)
 356                 return dev;
 357
 358         mutex_unlock(&mt753x_devs_lock);
 359
 360         return NULL;
 361 }
 362
 363 void mt753x_put_gsw(void)
 364 {
 365         mutex_unlock(&mt753x_devs_lock);
 366 }
 367
 368 void mt753x_lock_gsw(void)
 369 {
 370         mutex_lock(&mt753x_devs_lock);
 371 }
 372
 373 static int mt753x_hw_reset(struct gsw_mt753x *gsw)
 374 {
 375         struct device_node *np = gsw->dev->of_node;
 376         struct reset_control *rstc;
 377         int mcm;
 378         int ret = -EINVAL;
 379
 380         mcm = of_property_read_bool(np, "mediatek,mcm");
 381         if (mcm) {
 382                 rstc = devm_reset_control_get(gsw->dev, "mcm");
 383                 ret = IS_ERR(rstc);
 384                 if (IS_ERR(rstc)) {
 385                         dev_err(gsw->dev, "Missing reset ctrl of switch\n");
 386                         return ret;
 387                 }
 388
 389                 reset_control_assert(rstc);
 390                 msleep(30);
 391                 reset_control_deassert(rstc);
 392
 393                 gsw->reset_pin = -1;
 394                 return 0;
 395         }
 396
 397         gsw->reset_pin = of_get_named_gpio(np, "reset-gpios", 0);
 398         if (gsw->reset_pin < 0) {
 399                 dev_err(gsw->dev, "Missing reset pin of switch\n");
 400                 return ret;
 401         }
 402
 403         ret = devm_gpio_request(gsw->dev, gsw->reset_pin, "mt753x-reset");
 404         if (ret) {
 405                 dev_info(gsw->dev, "Failed to request gpio %d\n",
 406                          gsw->reset_pin);
 407                 return ret;
 408         }
 409
 410         gpio_direction_output(gsw->reset_pin, 0);
 411         msleep(30);
 412         gpio_set_value(gsw->reset_pin, 1);
 413         msleep(500);
 414
 415         return 0;
 416 }
 417
 418 static irqreturn_t mt753x_irq_handler(int irq, void *dev)
 419 {
 420         struct gsw_mt753x *gsw = dev;
 421
 422         disable_irq_nosync(gsw->irq);
 423
 424         schedule_work(&gsw->irq_worker);
 425
 426         return IRQ_HANDLED;
 427 }
 428
 429 static int mt753x_probe(struct platform_device *pdev)
 430 {
 431         struct gsw_mt753x *gsw;
 432         struct mt753x_sw_id *sw;
 433         struct device_node *np = pdev->dev.of_node;
 434         struct device_node *mdio;
 435         struct mii_bus *mdio_bus;
 436         int ret = -EINVAL;
 437         struct chip_rev rev;
 438         struct mt753x_mapping *map;
 439         int i;
 440
 441         mdio = of_parse_phandle(np, "mediatek,mdio", 0);
 442         if (!mdio)
 443                 return -EINVAL;
 444
 445         mdio_bus = of_mdio_find_bus(mdio);
 446         if (!mdio_bus)
 447                 return -EPROBE_DEFER;
 448
 449         gsw = devm_kzalloc(&pdev->dev, sizeof(struct gsw_mt753x), GFP_KERNEL);
 450         if (!gsw)
 451                 return -ENOMEM;
 452
 453         gsw->host_bus = mdio_bus;
 454         gsw->dev = &pdev->dev;
 455         mutex_init(&gsw->mii_lock);
 456
 457         /* Switch hard reset */
 458         if (mt753x_hw_reset(gsw))
 459                 goto fail;
 460
 461         /* Fetch the SMI address dirst */
 462         if (of_property_read_u32(np, "mediatek,smi-addr", &gsw->smi_addr))
 463                 gsw->smi_addr = MT753X_DFL_SMI_ADDR;
 464
 465         /* Get LAN/WAN port mapping */
 466         map = mt753x_find_mapping(np);
 467         if (map) {
 468                 mt753x_apply_mapping(gsw, map);
 469                 gsw->global_vlan_enable = 1;
 470                 dev_info(gsw->dev, "LAN/WAN VLAN setting=%s\n", map->name);
 471         }
 472
 473         /* Load MAC port configurations */
 474         mt753x_load_port_cfg(gsw);
 475
 476         /* Check for valid switch and then initialize */
 477         for (i = 0; i < ARRAY_SIZE(mt753x_sw_ids); i++) {
 478                 if (!mt753x_sw_ids[i]->detect(gsw, &rev)) {
 479                         sw = mt753x_sw_ids[i];
 480
 481                         gsw->name = rev.name;
 482                         gsw->model = sw->model;
 483
 484                         dev_info(gsw->dev, "Switch is MediaTek %s rev %d",
 485                                  gsw->name, rev.rev);
 486
 487                         /* Initialize the switch */
 488                         ret = sw->init(gsw);
 489                         if (ret)
 490                                 goto fail;
 491
 492                         break;
 493                 }
 494         }
 495
 496         if (i >= ARRAY_SIZE(mt753x_sw_ids)) {
 497                 dev_err(gsw->dev, "No mt753x switch found\n");
 498                 goto fail;
 499         }
 500
 501         gsw->irq = platform_get_irq(pdev, 0);
 502         if (gsw->irq >= 0) {
 503                 ret = devm_request_irq(gsw->dev, gsw->irq, mt753x_irq_handler,
 504                                        0, dev_name(gsw->dev), gsw);
 505                 if (ret) {
 506                         dev_err(gsw->dev, "Failed to request irq %d\n",
 507                                 gsw->irq);
 508                         goto fail;
 509                 }
 510
 511                 INIT_WORK(&gsw->irq_worker, mt753x_irq_worker);
 512         }
 513
 514         platform_set_drvdata(pdev, gsw);
 515
 516         gsw->phy_status_poll = of_property_read_bool(gsw->dev->of_node,
 517                                                      "mediatek,phy-poll");
 518
 519         mt753x_add_gsw(gsw);
 520
 521         mt753x_swconfig_init(gsw);
 522
 523         if (sw->post_init)
 524                 sw->post_init(gsw);
 525
 526         if (gsw->irq >= 0)
 527                 mt753x_irq_enable(gsw);
 528
 529         return 0;
 530
 531 fail:
 532         devm_kfree(&pdev->dev, gsw);
 533
 534         return ret;
 535 }
 536
 537 static int mt753x_remove(struct platform_device *pdev)
 538 {
 539         struct gsw_mt753x *gsw = platform_get_drvdata(pdev);
 540
 541         if (gsw->irq >= 0)
 542                 cancel_work_sync(&gsw->irq_worker);
 543
 544         if (gsw->reset_pin >= 0)
 545                 devm_gpio_free(&pdev->dev, gsw->reset_pin);
 546
 547 #ifdef CONFIG_SWCONFIG
 548         mt753x_swconfig_destroy(gsw);
 549 #endif
 550
 551         mt753x_remove_gsw(gsw);
 552
 553         platform_set_drvdata(pdev, NULL);
 554
 555         return 0;
 556 }
 557
 558 static const struct of_device_id mt753x_ids[] = {
 559         { .compatible = "mediatek,mt753x" },
 560         { },
 561 };
 562
 563 MODULE_DEVICE_TABLE(of, mt753x_ids);
 564
 565 static struct platform_driver mt753x_driver = {
 566         .probe = mt753x_probe,
 567         .remove = mt753x_remove,
 568         .driver = {
 569                 .name = "mt753x",
 570                 .of_match_table = mt753x_ids,
 571         },
 572 };
 573
 574 static int __init mt753x_init(void)
 575 {
 576         int ret;
 577
 578         INIT_LIST_HEAD(&mt753x_devs);
 579         ret = platform_driver_register(&mt753x_driver);
 580
 581         mt753x_nl_init();
 582
 583         return ret;
 584 }
 585 module_init(mt753x_init);
 586
 587 static void __exit mt753x_exit(void)
 588 {
 589         mt753x_nl_exit();
 590
 591         platform_driver_unregister(&mt753x_driver);
 592 }
 593 module_exit(mt753x_exit);
 594
 595 MODULE_LICENSE("GPL");
 596 MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
 597 MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch");