target/linux/mediatek/files-5.10/drivers/net/phy/rtk/rtl8367c/port.c

   1 /*
   2  * Copyright (C) 2013 Realtek Semiconductor Corp.
   3  * All Rights Reserved.
   4  *
   5  * Unless you and Realtek execute a separate written software license
   6  * agreement governing use of this software, this software is licensed
   7  * to you under the terms of the GNU General Public License version 2,
   8  * available at https://www.gnu.org/licenses/old-licenses/gpl-2.0.txt
   9  *
  10  * $Revision: 76306 $
  11  * $Date: 2017-03-08 15:13:58 +0800 (週三, 08 三月 2017) $
  12  *
  13  * Purpose : RTK switch high-level API for RTL8367/RTL8367C
  14  * Feature : Here is a list of all functions and variables in Port module.
  15  *
  16  */
  17
  18 #include <rtk_switch.h>
  19 #include <rtk_error.h>
  20 #include <port.h>
  21 #include <string.h>
  22
  23 #include <rtl8367c_asicdrv.h>
  24 #include <rtl8367c_asicdrv_port.h>
  25 #include <rtl8367c_asicdrv_misc.h>
  26 #include <rtl8367c_asicdrv_portIsolation.h>
  27
  28 #define FIBER_INIT_SIZE 1507
  29 CONST_T rtk_uint8 Fiber[FIBER_INIT_SIZE] = {
  30 0x02,0x04,0x41,0xE4,0xF5,0xA8,0xD2,0xAF,
  31 0x22,0x00,0x00,0x02,0x05,0x2D,0xE4,0x90,
  32 0x06,0x2A,0xF0,0xFD,0x7C,0x01,0x7F,0x3F,
  33 0x7E,0x1D,0x12,0x05,0xAF,0x7D,0x40,0x12,
  34 0x02,0x5F,0xE4,0xFF,0xFE,0xFD,0x80,0x08,
  35 0x12,0x05,0x9E,0x50,0x0C,0x12,0x05,0x8B,
  36 0xFC,0x90,0x06,0x24,0x12,0x03,0x76,0x80,
  37 0xEF,0xE4,0xF5,0xA8,0xD2,0xAF,0x7D,0x1F,
  38 0xFC,0x7F,0x49,0x7E,0x13,0x12,0x05,0xAF,
  39 0x12,0x05,0xD6,0x7D,0xD7,0x12,0x02,0x1E,
  40 0x7D,0x80,0x12,0x01,0xCA,0x7D,0x94,0x7C,
  41 0xF9,0x12,0x02,0x3B,0x7D,0x81,0x12,0x01,
  42 0xCA,0x7D,0xA2,0x7C,0x31,0x12,0x02,0x3B,
  43 0x7D,0x82,0x12,0x01,0xDF,0x7D,0x60,0x7C,
  44 0x69,0x12,0x02,0x43,0x7D,0x83,0x12,0x01,
  45 0xDF,0x7D,0x28,0x7C,0x97,0x12,0x02,0x43,
  46 0x7D,0x84,0x12,0x01,0xF4,0x7D,0x85,0x7C,
  47 0x9D,0x12,0x02,0x57,0x7D,0x23,0x12,0x01,
  48 0xF4,0x7D,0x10,0x7C,0xD8,0x12,0x02,0x57,
  49 0x7D,0x24,0x7C,0x04,0x12,0x02,0x28,0x7D,
  50 0x00,0x12,0x02,0x1E,0x7D,0x2F,0x12,0x02,
  51 0x09,0x7D,0x20,0x7C,0x0F,0x7F,0x02,0x7E,
  52 0x66,0x12,0x05,0xAF,0x7D,0x01,0x12,0x02,
  53 0x09,0x7D,0x04,0x7C,0x00,0x7F,0x01,0x7E,
  54 0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
  55 0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x7F,
  56 0x02,0x7E,0x66,0x12,0x02,0x4B,0x44,0x02,
  57 0xFF,0x90,0x06,0x28,0xEE,0xF0,0xA3,0xEF,
  58 0xF0,0x44,0x04,0xFF,0x90,0x06,0x28,0xEE,
  59 0xF0,0xFC,0xA3,0xEF,0xF0,0xFD,0x7F,0x02,
  60 0x7E,0x66,0x12,0x05,0xAF,0x7D,0x04,0x7C,
  61 0x00,0x12,0x02,0x28,0x7D,0xB9,0x7C,0x15,
  62 0x7F,0xEB,0x7E,0x13,0x12,0x05,0xAF,0x7D,
  63 0x07,0x7C,0x00,0x7F,0xE7,0x7E,0x13,0x12,
  64 0x05,0xAF,0x7D,0x40,0x7C,0x11,0x7F,0x00,
  65 0x7E,0x62,0x12,0x05,0xAF,0x12,0x03,0x82,
  66 0x7D,0x41,0x12,0x02,0x5F,0xE4,0xFF,0xFE,
  67 0xFD,0x80,0x08,0x12,0x05,0x9E,0x50,0x0C,
  68 0x12,0x05,0x8B,0xFC,0x90,0x06,0x24,0x12,
  69 0x03,0x76,0x80,0xEF,0xC2,0x00,0xC2,0x01,
  70 0xD2,0xA9,0xD2,0x8C,0x7F,0x01,0x7E,0x62,
  71 0x12,0x02,0x4B,0x30,0xE2,0x05,0xE4,0xA3,
  72 0xF0,0x80,0xF1,0x90,0x06,0x2A,0xE0,0x70,
  73 0x12,0x12,0x01,0x89,0x90,0x06,0x2A,0x74,
  74 0x01,0xF0,0xE4,0x90,0x06,0x2D,0xF0,0xA3,
  75 0xF0,0x80,0xD9,0xC3,0x90,0x06,0x2E,0xE0,
  76 0x94,0x64,0x90,0x06,0x2D,0xE0,0x94,0x00,
  77 0x40,0xCA,0xE4,0xF0,0xA3,0xF0,0x12,0x01,
  78 0x89,0x90,0x06,0x2A,0x74,0x01,0xF0,0x80,
  79 0xBB,0x7D,0x04,0xFC,0x7F,0x02,0x7E,0x66,
  80 0x12,0x05,0xAF,0x7D,0x00,0x7C,0x04,0x7F,
  81 0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
  82 0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
  83 0xAF,0xE4,0xFD,0xFC,0x7F,0x02,0x7E,0x66,
  84 0x12,0x05,0xAF,0x7D,0x00,0x7C,0x04,0x7F,
  85 0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,
  86 0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,
  87 0xAF,0x22,0x7C,0x04,0x7F,0x01,0x7E,0x66,
  88 0x12,0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,
  89 0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
  90 0x04,0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,
  91 0x7D,0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,
  92 0x12,0x05,0xAF,0x22,0x7C,0x04,0x7F,0x01,
  93 0x7E,0x66,0x12,0x05,0xAF,0x7D,0xC0,0x7C,
  94 0x00,0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,
  95 0x22,0x7C,0x00,0x7F,0x01,0x7E,0x66,0x12,
  96 0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
  97 0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,0x04,
  98 0x7F,0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,
  99 0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
 100 0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
 101 0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
 102 0x05,0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,
 103 0x05,0xAF,0x22,0x12,0x05,0x67,0x90,0x06,
 104 0x28,0xEE,0xF0,0xA3,0xEF,0xF0,0x22,0x7F,
 105 0x02,0x7E,0x66,0x12,0x05,0xAF,0x22,0x7C,
 106 0x00,0x7F,0x36,0x7E,0x13,0x12,0x05,0xAF,
 107 0x22,0xC5,0xF0,0xF8,0xA3,0xE0,0x28,0xF0,
 108 0xC5,0xF0,0xF8,0xE5,0x82,0x15,0x82,0x70,
 109 0x02,0x15,0x83,0xE0,0x38,0xF0,0x22,0x75,
 110 0xF0,0x08,0x75,0x82,0x00,0xEF,0x2F,0xFF,
 111 0xEE,0x33,0xFE,0xCD,0x33,0xCD,0xCC,0x33,
 112 0xCC,0xC5,0x82,0x33,0xC5,0x82,0x9B,0xED,
 113 0x9A,0xEC,0x99,0xE5,0x82,0x98,0x40,0x0C,
 114 0xF5,0x82,0xEE,0x9B,0xFE,0xED,0x9A,0xFD,
 115 0xEC,0x99,0xFC,0x0F,0xD5,0xF0,0xD6,0xE4,
 116 0xCE,0xFB,0xE4,0xCD,0xFA,0xE4,0xCC,0xF9,
 117 0xA8,0x82,0x22,0xB8,0x00,0xC1,0xB9,0x00,
 118 0x59,0xBA,0x00,0x2D,0xEC,0x8B,0xF0,0x84,
 119 0xCF,0xCE,0xCD,0xFC,0xE5,0xF0,0xCB,0xF9,
 120 0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,0xFE,
 121 0xED,0x33,0xFD,0xEC,0x33,0xFC,0xEB,0x33,
 122 0xFB,0x10,0xD7,0x03,0x99,0x40,0x04,0xEB,
 123 0x99,0xFB,0x0F,0xD8,0xE5,0xE4,0xF9,0xFA,
 124 0x22,0x78,0x18,0xEF,0x2F,0xFF,0xEE,0x33,
 125 0xFE,0xED,0x33,0xFD,0xEC,0x33,0xFC,0xC9,
 126 0x33,0xC9,0x10,0xD7,0x05,0x9B,0xE9,0x9A,
 127 0x40,0x07,0xEC,0x9B,0xFC,0xE9,0x9A,0xF9,
 128 0x0F,0xD8,0xE0,0xE4,0xC9,0xFA,0xE4,0xCC,
 129 0xFB,0x22,0x75,0xF0,0x10,0xEF,0x2F,0xFF,
 130 0xEE,0x33,0xFE,0xED,0x33,0xFD,0xCC,0x33,
 131 0xCC,0xC8,0x33,0xC8,0x10,0xD7,0x07,0x9B,
 132 0xEC,0x9A,0xE8,0x99,0x40,0x0A,0xED,0x9B,
 133 0xFD,0xEC,0x9A,0xFC,0xE8,0x99,0xF8,0x0F,
 134 0xD5,0xF0,0xDA,0xE4,0xCD,0xFB,0xE4,0xCC,
 135 0xFA,0xE4,0xC8,0xF9,0x22,0xEB,0x9F,0xF5,
 136 0xF0,0xEA,0x9E,0x42,0xF0,0xE9,0x9D,0x42,
 137 0xF0,0xE8,0x9C,0x45,0xF0,0x22,0xE0,0xFC,
 138 0xA3,0xE0,0xFD,0xA3,0xE0,0xFE,0xA3,0xE0,
 139 0xFF,0x22,0xE0,0xF8,0xA3,0xE0,0xF9,0xA3,
 140 0xE0,0xFA,0xA3,0xE0,0xFB,0x22,0xEC,0xF0,
 141 0xA3,0xED,0xF0,0xA3,0xEE,0xF0,0xA3,0xEF,
 142 0xF0,0x22,0x12,0x03,0xF8,0x12,0x04,0x1A,
 143 0x44,0x40,0x12,0x04,0x0F,0x7D,0x03,0x7C,
 144 0x00,0x12,0x04,0x23,0x12,0x05,0xAF,0x12,
 145 0x03,0xF8,0x12,0x04,0x1A,0x54,0xBF,0x12,
 146 0x04,0x0F,0x7D,0x03,0x7C,0x00,0x12,0x03,
 147 0xD0,0x7F,0x02,0x7E,0x66,0x12,0x05,0x67,
 148 0xEF,0x54,0xFD,0x54,0xFE,0x12,0x04,0x33,
 149 0x12,0x03,0xD0,0x7F,0x02,0x7E,0x66,0x12,
 150 0x05,0x67,0xEF,0x44,0x02,0x44,0x01,0x12,
 151 0x04,0x33,0x12,0x04,0x23,0x02,0x05,0xAF,
 152 0x7F,0x01,0x7E,0x66,0x12,0x05,0xAF,0x7D,
 153 0xC0,0x7C,0x00,0x7F,0x00,0x7E,0x66,0x12,
 154 0x05,0xAF,0xE4,0xFD,0xFC,0x7F,0x01,0x7E,
 155 0x66,0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,
 156 0x7F,0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,
 157 0x7D,0x03,0x7C,0x00,0x7F,0x01,0x7E,0x66,
 158 0x12,0x05,0xAF,0x7D,0x80,0x7C,0x00,0x7F,
 159 0x00,0x7E,0x66,0x12,0x05,0xAF,0x22,0xFD,
 160 0xAC,0x06,0x7F,0x02,0x7E,0x66,0x12,0x05,
 161 0xAF,0x22,0x7F,0x02,0x7E,0x66,0x12,0x05,
 162 0x67,0xEF,0x22,0x7F,0x01,0x7E,0x66,0x12,
 163 0x05,0xAF,0x7D,0xC0,0x7C,0x00,0x7F,0x00,
 164 0x7E,0x66,0x22,0xFD,0xAC,0x06,0x7F,0x02,
 165 0x7E,0x66,0x12,0x05,0xAF,0xE4,0xFD,0xFC,
 166 0x22,0x78,0x7F,0xE4,0xF6,0xD8,0xFD,0x75,
 167 0x81,0x3C,0x02,0x04,0x88,0x02,0x00,0x0E,
 168 0xE4,0x93,0xA3,0xF8,0xE4,0x93,0xA3,0x40,
 169 0x03,0xF6,0x80,0x01,0xF2,0x08,0xDF,0xF4,
 170 0x80,0x29,0xE4,0x93,0xA3,0xF8,0x54,0x07,
 171 0x24,0x0C,0xC8,0xC3,0x33,0xC4,0x54,0x0F,
 172 0x44,0x20,0xC8,0x83,0x40,0x04,0xF4,0x56,
 173 0x80,0x01,0x46,0xF6,0xDF,0xE4,0x80,0x0B,
 174 0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,
 175 0x90,0x05,0xCB,0xE4,0x7E,0x01,0x93,0x60,
 176 0xBC,0xA3,0xFF,0x54,0x3F,0x30,0xE5,0x09,
 177 0x54,0x1F,0xFE,0xE4,0x93,0xA3,0x60,0x01,
 178 0x0E,0xCF,0x54,0xC0,0x25,0xE0,0x60,0xA8,
 179 0x40,0xB8,0xE4,0x93,0xA3,0xFA,0xE4,0x93,
 180 0xA3,0xF8,0xE4,0x93,0xA3,0xC8,0xC5,0x82,
 181 0xC8,0xCA,0xC5,0x83,0xCA,0xF0,0xA3,0xC8,
 182 0xC5,0x82,0xC8,0xCA,0xC5,0x83,0xCA,0xDF,
 183 0xE9,0xDE,0xE7,0x80,0xBE,0x75,0x0F,0x80,
 184 0x75,0x0E,0x7E,0x75,0x0D,0xAA,0x75,0x0C,
 185 0x83,0xE4,0xF5,0x10,0x75,0x0B,0xA0,0x75,
 186 0x0A,0xAC,0x75,0x09,0xB9,0x75,0x08,0x03,
 187 0x75,0x89,0x11,0x7B,0x60,0x7A,0x09,0xF9,
 188 0xF8,0xAF,0x0B,0xAE,0x0A,0xAD,0x09,0xAC,
 189 0x08,0x12,0x02,0xBB,0xAD,0x07,0xAC,0x06,
 190 0xC3,0xE4,0x9D,0xFD,0xE4,0x9C,0xFC,0x78,
 191 0x17,0xF6,0xAF,0x05,0xEF,0x08,0xF6,0x18,
 192 0xE6,0xF5,0x8C,0x08,0xE6,0xF5,0x8A,0x74,
 193 0x0D,0x2D,0xFD,0xE4,0x3C,0x18,0xF6,0xAF,
 194 0x05,0xEF,0x08,0xF6,0x75,0x88,0x10,0x53,
 195 0x8E,0xC7,0xD2,0xA9,0x22,0xC0,0xE0,0xC0,
 196 0xF0,0xC0,0x83,0xC0,0x82,0xC0,0xD0,0x75,
 197 0xD0,0x00,0xC0,0x00,0x78,0x17,0xE6,0xF5,
 198 0x8C,0x78,0x18,0xE6,0xF5,0x8A,0x90,0x06,
 199 0x2B,0xE4,0x75,0xF0,0x01,0x12,0x02,0x69,
 200 0x90,0x06,0x2D,0xE4,0x75,0xF0,0x01,0x12,
 201 0x02,0x69,0xD0,0x00,0xD0,0xD0,0xD0,0x82,
 202 0xD0,0x83,0xD0,0xF0,0xD0,0xE0,0x32,0xC2,
 203 0xAF,0xAD,0x07,0xAC,0x06,0x8C,0xA2,0x8D,
 204 0xA3,0x75,0xA0,0x01,0x00,0x00,0x00,0x00,
 205 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xAE,
 206 0xA1,0xBE,0x00,0xF0,0xAE,0xA6,0xAF,0xA7,
 207 0xD2,0xAF,0x22,0x90,0x06,0x24,0x12,0x03,
 208 0x5E,0xEF,0x24,0x01,0xFF,0xE4,0x3E,0xFE,
 209 0xE4,0x3D,0xFD,0xE4,0x3C,0x22,0xE4,0x7F,
 210 0x20,0x7E,0x4E,0xFD,0xFC,0x90,0x06,0x24,
 211 0x12,0x03,0x6A,0xC3,0x02,0x03,0x4D,0xC2,
 212 0xAF,0xAB,0x07,0xAA,0x06,0x8A,0xA2,0x8B,
 213 0xA3,0x8C,0xA4,0x8D,0xA5,0x75,0xA0,0x03,
 214 0x00,0x00,0x00,0xAA,0xA1,0xBA,0x00,0xF8,
 215 0xD2,0xAF,0x22,0x42,0x06,0x2D,0x00,0x00,
 216 0x42,0x06,0x2B,0x00,0x00,0x00,0x12,0x05,
 217 0xDF,0x12,0x04,0xCD,0x02,0x00,0x03,0xE4,
 218 0xF5,0x8E,0x22};
 219
 220 static rtk_api_ret_t _rtk_port_FiberModeAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 221 {
 222     rtk_api_ret_t   retVal;
 223     rtk_uint32      regData;
 224
 225     /* Check Combo port or not */
 226     RTK_CHK_PORT_IS_COMBO(port);
 227
 228     /* Flow Control */
 229     if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG04, &regData)) != RT_ERR_OK)
 230         return retVal;
 231
 232     if (pAbility->AsyFC == 1)
 233         regData |= (0x0001 << 8);
 234     else
 235         regData &= ~(0x0001 << 8);
 236
 237     if (pAbility->FC == 1)
 238         regData |= (0x0001 << 7);
 239     else
 240         regData &= ~(0x0001 << 7);
 241
 242     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG04, regData)) != RT_ERR_OK)
 243         return retVal;
 244
 245     /* Speed ability */
 246     if( (pAbility->Full_1000 == 1) && (pAbility->Full_100 == 1) && (pAbility->AutoNegotiation == 1) )
 247     {
 248         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 0)) != RT_ERR_OK)
 249             return retVal;
 250
 251         if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 7)) != RT_ERR_OK)
 252             return retVal;
 253
 254         if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x1140)) != RT_ERR_OK)
 255             return retVal;
 256     }
 257     else if(pAbility->Full_1000 == 1)
 258     {
 259         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 1)) != RT_ERR_OK)
 260             return retVal;
 261
 262         if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 4)) != RT_ERR_OK)
 263             return retVal;
 264
 265         if(pAbility->AutoNegotiation == 1)
 266         {
 267             if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x1140)) != RT_ERR_OK)
 268                 return retVal;
 269         }
 270         else
 271         {
 272             if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x0140)) != RT_ERR_OK)
 273                 return retVal;
 274         }
 275     }
 276     else if(pAbility->Full_100 == 1)
 277     {
 278         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, 1)) != RT_ERR_OK)
 279             return retVal;
 280
 281         if ((retVal = rtl8367c_setAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, 5)) != RT_ERR_OK)
 282             return retVal;
 283
 284         if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_FIB0_CFG00, 0x2100)) != RT_ERR_OK)
 285             return retVal;
 286     }
 287
 288     /* Digital software reset */
 289     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
 290         return retVal;
 291
 292     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x0080)) != RT_ERR_OK)
 293         return retVal;
 294
 295     if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA, &regData)) != RT_ERR_OK)
 296         return retVal;
 297
 298     regData |= (0x0001 << 6);
 299
 300     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, regData)) != RT_ERR_OK)
 301         return retVal;
 302
 303     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
 304         return retVal;
 305
 306     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
 307         return retVal;
 308
 309     regData &= ~(0x0001 << 6);
 310
 311     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, regData)) != RT_ERR_OK)
 312         return retVal;
 313
 314     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0003)) != RT_ERR_OK)
 315         return retVal;
 316
 317     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0)) != RT_ERR_OK)
 318         return retVal;
 319
 320     /* CDR reset */
 321     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x1401))!=RT_ERR_OK)
 322         return retVal;
 323
 324     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0000))!=RT_ERR_OK)
 325         return retVal;
 326
 327     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0))!=RT_ERR_OK)
 328         return retVal;
 329
 330     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_DATA, 0x1403))!=RT_ERR_OK)
 331         return retVal;
 332
 333     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0000))!=RT_ERR_OK)
 334         return retVal;
 335
 336     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x00C0))!=RT_ERR_OK)
 337         return retVal;
 338
 339     return RT_ERR_OK;
 340 }
 341
 342 static rtk_api_ret_t _rtk_port_FiberModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 343 {
 344     rtk_api_ret_t   retVal;
 345     rtk_uint32      data, regData;
 346
 347     /* Check Combo port or not */
 348     RTK_CHK_PORT_IS_COMBO(port);
 349
 350     memset(pAbility, 0x00, sizeof(rtk_port_phy_ability_t));
 351
 352     /* Flow Control */
 353     if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_REG4_OFFSET, 1)) != RT_ERR_OK)
 354         return retVal;
 355
 356     if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_REG4_FIB100_OFFSET, 0)) != RT_ERR_OK)
 357         return retVal;
 358
 359     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_ADR, 0x0044)) != RT_ERR_OK)
 360         return retVal;
 361
 362     if ((retVal = rtl8367c_setAsicReg(RTL8367C_REG_SDS_INDACS_CMD, 0x0080)) != RT_ERR_OK)
 363         return retVal;
 364
 365     if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_SDS_INDACS_DATA, &regData)) != RT_ERR_OK)
 366         return retVal;
 367
 368     if(regData & (0x0001 << 8))
 369         pAbility->AsyFC = 1;
 370
 371     if(regData & (0x0001 << 7))
 372         pAbility->FC = 1;
 373
 374     /* Speed ability */
 375     if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_FRC_MODE_OFFSET, &data)) != RT_ERR_OK)
 376             return retVal;
 377
 378     if(data == 0)
 379     {
 380         pAbility->AutoNegotiation = 1;
 381         pAbility->Full_1000 = 1;
 382         pAbility->Full_100 = 1;
 383     }
 384     else
 385     {
 386         if ((retVal = rtl8367c_getAsicRegBits(RTL8367C_REG_FIBER_CFG_1, RTL8367C_SDS_MODE_MASK, &data)) != RT_ERR_OK)
 387             return retVal;
 388
 389         if(data == 4)
 390         {
 391             pAbility->Full_1000 = 1;
 392
 393             if ((retVal = rtl8367c_getAsicReg(RTL8367C_REG_FIB0_CFG00, &data)) != RT_ERR_OK)
 394                 return retVal;
 395
 396             if(data & 0x1000)
 397                 pAbility->AutoNegotiation = 1;
 398             else
 399                 pAbility->AutoNegotiation = 0;
 400         }
 401         else if(data == 5)
 402             pAbility->Full_100 = 1;
 403         else
 404             return RT_ERR_FAILED;
 405     }
 406
 407     return RT_ERR_OK;
 408 }
 409
 410 /* Function Name:
 411  *      rtk_port_phyAutoNegoAbility_set
 412  * Description:
 413  *      Set ethernet PHY auto-negotiation desired ability.
 414  * Input:
 415  *      port        - port id.
 416  *      pAbility    - Ability structure
 417  * Output:
 418  *      None
 419  * Return:
 420  *      RT_ERR_OK               - OK
 421  *      RT_ERR_FAILED           - Failed
 422  *      RT_ERR_SMI              - SMI access error
 423  *      RT_ERR_PORT_ID          - Invalid port number.
 424  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
 425  *      RT_ERR_INPUT            - Invalid input parameters.
 426  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
 427  * Note:
 428  *      If Full_1000 bit is set to 1, the AutoNegotiation will be automatic set to 1. While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
 429  *      be set as following 100F > 100H > 10F > 10H priority sequence.
 430  */
 431 rtk_api_ret_t rtk_port_phyAutoNegoAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 432 {
 433     rtk_api_ret_t       retVal;
 434     rtk_uint32          phyData;
 435     rtk_uint32          phyEnMsk0;
 436     rtk_uint32          phyEnMsk4;
 437     rtk_uint32          phyEnMsk9;
 438     rtk_port_media_t    media_type;
 439
 440     /* Check initialization state */
 441     RTK_CHK_INIT_STATE();
 442
 443     /* Check Port Valid */
 444     RTK_CHK_PORT_IS_UTP(port);
 445
 446     if(NULL == pAbility)
 447         return RT_ERR_NULL_POINTER;
 448
 449     if (pAbility->Half_10 >= RTK_ENABLE_END || pAbility->Full_10 >= RTK_ENABLE_END ||
 450        pAbility->Half_100 >= RTK_ENABLE_END || pAbility->Full_100 >= RTK_ENABLE_END ||
 451        pAbility->Full_1000 >= RTK_ENABLE_END || pAbility->AutoNegotiation >= RTK_ENABLE_END ||
 452        pAbility->AsyFC >= RTK_ENABLE_END || pAbility->FC >= RTK_ENABLE_END)
 453         return RT_ERR_INPUT;
 454
 455     if (rtk_switch_isComboPort(port) == RT_ERR_OK)
 456     {
 457         if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
 458             return retVal;
 459
 460         if(media_type == PORT_MEDIA_FIBER)
 461         {
 462             return _rtk_port_FiberModeAbility_set(port, pAbility);
 463         }
 464     }
 465
 466     /*for PHY auto mode setup*/
 467     pAbility->AutoNegotiation = 1;
 468
 469     phyEnMsk0 = 0;
 470     phyEnMsk4 = 0;
 471     phyEnMsk9 = 0;
 472
 473     if (1 == pAbility->Half_10)
 474     {
 475         /*10BASE-TX half duplex capable in reg 4.5*/
 476         phyEnMsk4 = phyEnMsk4 | (1 << 5);
 477
 478         /*Speed selection [1:0] */
 479         /* 11=Reserved*/
 480         /* 10= 1000Mpbs*/
 481         /* 01= 100Mpbs*/
 482         /* 00= 10Mpbs*/
 483         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 484         phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
 485     }
 486
 487     if (1 == pAbility->Full_10)
 488     {
 489         /*10BASE-TX full duplex capable in reg 4.6*/
 490         phyEnMsk4 = phyEnMsk4 | (1 << 6);
 491         /*Speed selection [1:0] */
 492         /* 11=Reserved*/
 493         /* 10= 1000Mpbs*/
 494         /* 01= 100Mpbs*/
 495         /* 00= 10Mpbs*/
 496         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 497         phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
 498
 499         /*Full duplex mode in reg 0.8*/
 500         phyEnMsk0 = phyEnMsk0 | (1 << 8);
 501
 502     }
 503
 504     if (1 == pAbility->Half_100)
 505     {
 506         /*100BASE-TX half duplex capable in reg 4.7*/
 507         phyEnMsk4 = phyEnMsk4 | (1 << 7);
 508         /*Speed selection [1:0] */
 509         /* 11=Reserved*/
 510         /* 10= 1000Mpbs*/
 511         /* 01= 100Mpbs*/
 512         /* 00= 10Mpbs*/
 513         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 514         phyEnMsk0 = phyEnMsk0 | (1 << 13);
 515     }
 516
 517
 518     if (1 == pAbility->Full_100)
 519     {
 520         /*100BASE-TX full duplex capable in reg 4.8*/
 521         phyEnMsk4 = phyEnMsk4 | (1 << 8);
 522         /*Speed selection [1:0] */
 523         /* 11=Reserved*/
 524         /* 10= 1000Mpbs*/
 525         /* 01= 100Mpbs*/
 526         /* 00= 10Mpbs*/
 527         phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 528         phyEnMsk0 = phyEnMsk0 | (1 << 13);
 529         /*Full duplex mode in reg 0.8*/
 530         phyEnMsk0 = phyEnMsk0 | (1 << 8);
 531     }
 532
 533
 534     if (1 == pAbility->Full_1000)
 535     {
 536         /*1000 BASE-T FULL duplex capable setting in reg 9.9*/
 537         phyEnMsk9 = phyEnMsk9 | (1 << 9);
 538
 539         /*Speed selection [1:0] */
 540         /* 11=Reserved*/
 541         /* 10= 1000Mpbs*/
 542         /* 01= 100Mpbs*/
 543         /* 00= 10Mpbs*/
 544         phyEnMsk0 = phyEnMsk0 | (1 << 6);
 545         phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
 546
 547
 548         /*Auto-Negotiation setting in reg 0.12*/
 549         phyEnMsk0 = phyEnMsk0 | (1 << 12);
 550
 551      }
 552
 553     if (1 == pAbility->AutoNegotiation)
 554     {
 555         /*Auto-Negotiation setting in reg 0.12*/
 556         phyEnMsk0 = phyEnMsk0 | (1 << 12);
 557     }
 558
 559     if (1 == pAbility->AsyFC)
 560     {
 561         /*Asymetric flow control in reg 4.11*/
 562         phyEnMsk4 = phyEnMsk4 | (1 << 11);
 563     }
 564     if (1 == pAbility->FC)
 565     {
 566         /*Flow control in reg 4.10*/
 567         phyEnMsk4 = phyEnMsk4 | (1 << 10);
 568     }
 569
 570     /*1000 BASE-T control register setting*/
 571     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData)) != RT_ERR_OK)
 572         return retVal;
 573
 574     phyData = (phyData & (~0x0200)) | phyEnMsk9 ;
 575
 576     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, phyData)) != RT_ERR_OK)
 577         return retVal;
 578
 579     /*Auto-Negotiation control register setting*/
 580     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData)) != RT_ERR_OK)
 581         return retVal;
 582
 583     phyData = (phyData & (~0x0DE0)) | phyEnMsk4;
 584     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, phyData)) != RT_ERR_OK)
 585         return retVal;
 586
 587     /*Control register setting and restart auto*/
 588     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData)) != RT_ERR_OK)
 589         return retVal;
 590
 591     phyData = (phyData & (~0x3140)) | phyEnMsk0;
 592     /*If have auto-negotiation capable, then restart auto negotiation*/
 593     if (1 == pAbility->AutoNegotiation)
 594     {
 595         phyData = phyData | (1 << 9);
 596     }
 597
 598     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
 599         return retVal;
 600
 601     return RT_ERR_OK;
 602 }
 603
 604 /* Function Name:
 605  *      rtk_port_phyAutoNegoAbility_get
 606  * Description:
 607  *      Get PHY ability through PHY registers.
 608  * Input:
 609  *      port - Port id.
 610  * Output:
 611  *      pAbility - Ability structure
 612  * Return:
 613  *      RT_ERR_OK               - OK
 614  *      RT_ERR_FAILED           - Failed
 615  *      RT_ERR_SMI              - SMI access error
 616  *      RT_ERR_PORT_ID          - Invalid port number.
 617  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
 618  *      RT_ERR_INPUT            - Invalid input parameters.
 619  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
 620  * Note:
 621  *      Get the capablity of specified PHY.
 622  */
 623 rtk_api_ret_t rtk_port_phyAutoNegoAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 624 {
 625     rtk_api_ret_t       retVal;
 626     rtk_uint32          phyData0;
 627     rtk_uint32          phyData4;
 628     rtk_uint32          phyData9;
 629     rtk_port_media_t    media_type;
 630
 631     /* Check initialization state */
 632     RTK_CHK_INIT_STATE();
 633
 634     /* Check Port Valid */
 635     RTK_CHK_PORT_IS_UTP(port);
 636
 637     if(NULL == pAbility)
 638         return RT_ERR_NULL_POINTER;
 639
 640     if (rtk_switch_isComboPort(port) == RT_ERR_OK)
 641     {
 642         if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
 643             return retVal;
 644
 645         if(media_type == PORT_MEDIA_FIBER)
 646         {
 647             return _rtk_port_FiberModeAbility_get(port, pAbility);
 648         }
 649     }
 650
 651     /*Control register setting and restart auto*/
 652     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData0)) != RT_ERR_OK)
 653         return retVal;
 654
 655     /*Auto-Negotiation control register setting*/
 656     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData4)) != RT_ERR_OK)
 657         return retVal;
 658
 659     /*1000 BASE-T control register setting*/
 660     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData9)) != RT_ERR_OK)
 661         return retVal;
 662
 663     if (phyData9 & (1 << 9))
 664         pAbility->Full_1000 = 1;
 665     else
 666         pAbility->Full_1000 = 0;
 667
 668     if (phyData4 & (1 << 11))
 669         pAbility->AsyFC = 1;
 670     else
 671         pAbility->AsyFC = 0;
 672
 673     if (phyData4 & (1 << 10))
 674         pAbility->FC = 1;
 675     else
 676         pAbility->FC = 0;
 677
 678
 679     if (phyData4 & (1 << 8))
 680         pAbility->Full_100 = 1;
 681     else
 682         pAbility->Full_100 = 0;
 683
 684     if (phyData4 & (1 << 7))
 685         pAbility->Half_100 = 1;
 686     else
 687         pAbility->Half_100 = 0;
 688
 689     if (phyData4 & (1 << 6))
 690         pAbility->Full_10 = 1;
 691     else
 692         pAbility->Full_10 = 0;
 693
 694     if (phyData4 & (1 << 5))
 695         pAbility->Half_10 = 1;
 696     else
 697         pAbility->Half_10 = 0;
 698
 699
 700     if (phyData0 & (1 << 12))
 701         pAbility->AutoNegotiation = 1;
 702     else
 703         pAbility->AutoNegotiation = 0;
 704
 705     return RT_ERR_OK;
 706 }
 707
 708 /* Function Name:
 709  *      rtk_port_phyForceModeAbility_set
 710  * Description:
 711  *      Set the port speed/duplex mode/pause/asy_pause in the PHY force mode.
 712  * Input:
 713  *      port        - port id.
 714  *      pAbility    - Ability structure
 715  * Output:
 716  *      None
 717  * Return:
 718  *      RT_ERR_OK               - OK
 719  *      RT_ERR_FAILED           - Failed
 720  *      RT_ERR_SMI              - SMI access error
 721  *      RT_ERR_PORT_ID          - Invalid port number.
 722  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
 723  *      RT_ERR_INPUT            - Invalid input parameters.
 724  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
 725  * Note:
 726  *      While both AutoNegotiation and Full_1000 are set to 0, the PHY speed and duplex selection will
 727  *      be set as following 100F > 100H > 10F > 10H priority sequence.
 728  *      This API can be used to configure combo port in fiber mode.
 729  *      The possible parameters in fiber mode are Full_1000 and Full 100.
 730  *      All the other fields in rtk_port_phy_ability_t will be ignored in fiber port.
 731  */
 732 rtk_api_ret_t rtk_port_phyForceModeAbility_set(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 733 {
 734      rtk_api_ret_t      retVal;
 735      rtk_uint32         phyData;
 736      rtk_uint32         phyEnMsk0;
 737      rtk_uint32         phyEnMsk4;
 738      rtk_uint32         phyEnMsk9;
 739      rtk_port_media_t   media_type;
 740
 741      /* Check initialization state */
 742      RTK_CHK_INIT_STATE();
 743
 744      /* Check Port Valid */
 745      RTK_CHK_PORT_IS_UTP(port);
 746
 747      if(NULL == pAbility)
 748         return RT_ERR_NULL_POINTER;
 749
 750      if (pAbility->Half_10 >= RTK_ENABLE_END || pAbility->Full_10 >= RTK_ENABLE_END ||
 751         pAbility->Half_100 >= RTK_ENABLE_END || pAbility->Full_100 >= RTK_ENABLE_END ||
 752         pAbility->Full_1000 >= RTK_ENABLE_END || pAbility->AutoNegotiation >= RTK_ENABLE_END ||
 753         pAbility->AsyFC >= RTK_ENABLE_END || pAbility->FC >= RTK_ENABLE_END)
 754          return RT_ERR_INPUT;
 755
 756      if (rtk_switch_isComboPort(port) == RT_ERR_OK)
 757      {
 758          if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
 759              return retVal;
 760
 761          if(media_type == PORT_MEDIA_FIBER)
 762          {
 763              return _rtk_port_FiberModeAbility_set(port, pAbility);
 764          }
 765      }
 766
 767      if (1 == pAbility->Full_1000)
 768          return RT_ERR_INPUT;
 769
 770      /*for PHY force mode setup*/
 771      pAbility->AutoNegotiation = 0;
 772
 773      phyEnMsk0 = 0;
 774      phyEnMsk4 = 0;
 775      phyEnMsk9 = 0;
 776
 777      if (1 == pAbility->Half_10)
 778      {
 779          /*10BASE-TX half duplex capable in reg 4.5*/
 780          phyEnMsk4 = phyEnMsk4 | (1 << 5);
 781
 782          /*Speed selection [1:0] */
 783          /* 11=Reserved*/
 784          /* 10= 1000Mpbs*/
 785          /* 01= 100Mpbs*/
 786          /* 00= 10Mpbs*/
 787          phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 788          phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
 789      }
 790
 791      if (1 == pAbility->Full_10)
 792      {
 793          /*10BASE-TX full duplex capable in reg 4.6*/
 794          phyEnMsk4 = phyEnMsk4 | (1 << 6);
 795          /*Speed selection [1:0] */
 796          /* 11=Reserved*/
 797          /* 10= 1000Mpbs*/
 798          /* 01= 100Mpbs*/
 799          /* 00= 10Mpbs*/
 800          phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 801          phyEnMsk0 = phyEnMsk0 & (~(1 << 13));
 802
 803          /*Full duplex mode in reg 0.8*/
 804          phyEnMsk0 = phyEnMsk0 | (1 << 8);
 805
 806      }
 807
 808      if (1 == pAbility->Half_100)
 809      {
 810          /*100BASE-TX half duplex capable in reg 4.7*/
 811          phyEnMsk4 = phyEnMsk4 | (1 << 7);
 812          /*Speed selection [1:0] */
 813          /* 11=Reserved*/
 814          /* 10= 1000Mpbs*/
 815          /* 01= 100Mpbs*/
 816          /* 00= 10Mpbs*/
 817          phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 818          phyEnMsk0 = phyEnMsk0 | (1 << 13);
 819      }
 820
 821
 822      if (1 == pAbility->Full_100)
 823      {
 824          /*100BASE-TX full duplex capable in reg 4.8*/
 825          phyEnMsk4 = phyEnMsk4 | (1 << 8);
 826          /*Speed selection [1:0] */
 827          /* 11=Reserved*/
 828          /* 10= 1000Mpbs*/
 829          /* 01= 100Mpbs*/
 830          /* 00= 10Mpbs*/
 831          phyEnMsk0 = phyEnMsk0 & (~(1 << 6));
 832          phyEnMsk0 = phyEnMsk0 | (1 << 13);
 833          /*Full duplex mode in reg 0.8*/
 834          phyEnMsk0 = phyEnMsk0 | (1 << 8);
 835      }
 836
 837      if (1 == pAbility->AsyFC)
 838      {
 839          /*Asymetric flow control in reg 4.11*/
 840          phyEnMsk4 = phyEnMsk4 | (1 << 11);
 841      }
 842      if (1 == pAbility->FC)
 843      {
 844          /*Flow control in reg 4.10*/
 845          phyEnMsk4 = phyEnMsk4 | ((1 << 10));
 846      }
 847
 848      /*1000 BASE-T control register setting*/
 849      if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData)) != RT_ERR_OK)
 850          return retVal;
 851
 852      phyData = (phyData & (~0x0200)) | phyEnMsk9 ;
 853
 854      if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, phyData)) != RT_ERR_OK)
 855          return retVal;
 856
 857      /*Auto-Negotiation control register setting*/
 858      if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData)) != RT_ERR_OK)
 859          return retVal;
 860
 861      phyData = (phyData & (~0x0DE0)) | phyEnMsk4;
 862      if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, phyData)) != RT_ERR_OK)
 863          return retVal;
 864
 865      /*Control register setting and power off/on*/
 866      phyData = phyEnMsk0 & (~(1 << 12));
 867      phyData |= (1 << 11);   /* power down PHY, bit 11 should be set to 1 */
 868      if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
 869          return retVal;
 870
 871      phyData = phyData & (~(1 << 11));   /* power on PHY, bit 11 should be set to 0*/
 872      if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, phyData)) != RT_ERR_OK)
 873          return retVal;
 874
 875      return RT_ERR_OK;
 876 }
 877
 878 /* Function Name:
 879  *      rtk_port_phyForceModeAbility_get
 880  * Description:
 881  *      Get PHY ability through PHY registers.
 882  * Input:
 883  *      port - Port id.
 884  * Output:
 885  *      pAbility - Ability structure
 886  * Return:
 887  *      RT_ERR_OK               - OK
 888  *      RT_ERR_FAILED           - Failed
 889  *      RT_ERR_SMI              - SMI access error
 890  *      RT_ERR_PORT_ID          - Invalid port number.
 891  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
 892  *      RT_ERR_INPUT            - Invalid input parameters.
 893  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
 894  * Note:
 895  *      Get the capablity of specified PHY.
 896  */
 897 rtk_api_ret_t rtk_port_phyForceModeAbility_get(rtk_port_t port, rtk_port_phy_ability_t *pAbility)
 898 {
 899     rtk_api_ret_t       retVal;
 900     rtk_uint32          phyData0;
 901     rtk_uint32          phyData4;
 902     rtk_uint32          phyData9;
 903     rtk_port_media_t    media_type;
 904
 905     /* Check initialization state */
 906     RTK_CHK_INIT_STATE();
 907
 908     /* Check Port Valid */
 909      RTK_CHK_PORT_IS_UTP(port);
 910
 911      if(NULL == pAbility)
 912         return RT_ERR_NULL_POINTER;
 913
 914      if (rtk_switch_isComboPort(port) == RT_ERR_OK)
 915      {
 916          if ((retVal = rtk_port_phyComboPortMedia_get(port, &media_type)) != RT_ERR_OK)
 917              return retVal;
 918
 919          if(media_type == PORT_MEDIA_FIBER)
 920          {
 921              return _rtk_port_FiberModeAbility_get(port, pAbility);
 922          }
 923      }
 924
 925     /*Control register setting and restart auto*/
 926     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &phyData0)) != RT_ERR_OK)
 927         return retVal;
 928
 929     /*Auto-Negotiation control register setting*/
 930     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_AN_ADVERTISEMENT_REG, &phyData4)) != RT_ERR_OK)
 931         return retVal;
 932
 933     /*1000 BASE-T control register setting*/
 934     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_1000_BASET_CONTROL_REG, &phyData9)) != RT_ERR_OK)
 935         return retVal;
 936
 937     if (phyData9 & (1 << 9))
 938         pAbility->Full_1000 = 1;
 939     else
 940         pAbility->Full_1000 = 0;
 941
 942     if (phyData4 & (1 << 11))
 943         pAbility->AsyFC = 1;
 944     else
 945         pAbility->AsyFC = 0;
 946
 947     if (phyData4 & ((1 << 10)))
 948         pAbility->FC = 1;
 949     else
 950         pAbility->FC = 0;
 951
 952
 953     if (phyData4 & (1 << 8))
 954         pAbility->Full_100 = 1;
 955     else
 956         pAbility->Full_100 = 0;
 957
 958     if (phyData4 & (1 << 7))
 959         pAbility->Half_100 = 1;
 960     else
 961         pAbility->Half_100 = 0;
 962
 963     if (phyData4 & (1 << 6))
 964         pAbility->Full_10 = 1;
 965     else
 966         pAbility->Full_10 = 0;
 967
 968     if (phyData4 & (1 << 5))
 969         pAbility->Half_10 = 1;
 970     else
 971         pAbility->Half_10 = 0;
 972
 973
 974     if (phyData0 & (1 << 12))
 975         pAbility->AutoNegotiation = 1;
 976     else
 977         pAbility->AutoNegotiation = 0;
 978
 979     return RT_ERR_OK;
 980 }
 981
 982 /* Function Name:
 983  *      rtk_port_phyStatus_get
 984  * Description:
 985  *      Get ethernet PHY linking status
 986  * Input:
 987  *      port - Port id.
 988  * Output:
 989  *      linkStatus  - PHY link status
 990  *      speed       - PHY link speed
 991  *      duplex      - PHY duplex mode
 992  * Return:
 993  *      RT_ERR_OK               - OK
 994  *      RT_ERR_FAILED           - Failed
 995  *      RT_ERR_SMI              - SMI access error
 996  *      RT_ERR_PORT_ID          - Invalid port number.
 997  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
 998  *      RT_ERR_INPUT            - Invalid input parameters.
 999  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1000  * Note:
1001  *      API will return auto negotiation status of phy.
1002  */
1003 rtk_api_ret_t rtk_port_phyStatus_get(rtk_port_t port, rtk_port_linkStatus_t *pLinkStatus, rtk_port_speed_t *pSpeed, rtk_port_duplex_t *pDuplex)
1004 {
1005     rtk_api_ret_t retVal;
1006     rtk_uint32 phyData;
1007
1008     /* Check initialization state */
1009     RTK_CHK_INIT_STATE();
1010
1011     /* Check Port Valid */
1012     RTK_CHK_PORT_IS_UTP(port);
1013
1014     if( (NULL == pLinkStatus) || (NULL == pSpeed) || (NULL == pDuplex) )
1015         return RT_ERR_NULL_POINTER;
1016
1017     /*Get PHY resolved register*/
1018     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_RESOLVED_REG, &phyData)) != RT_ERR_OK)
1019         return retVal;
1020
1021     /*check link status*/
1022     if (phyData & (1<<2))
1023     {
1024         *pLinkStatus = 1;
1025
1026         /*check link speed*/
1027         *pSpeed = (phyData&0x0030) >> 4;
1028
1029         /*check link duplex*/
1030         *pDuplex = (phyData&0x0008) >> 3;
1031     }
1032     else
1033     {
1034         *pLinkStatus = 0;
1035         *pSpeed = 0;
1036         *pDuplex = 0;
1037     }
1038
1039     return RT_ERR_OK;
1040 }
1041
1042 /* Function Name:
1043  *      rtk_port_macForceLink_set
1044  * Description:
1045  *      Set port force linking configuration.
1046  * Input:
1047  *      port            - port id.
1048  *      pPortability    - port ability configuration
1049  * Output:
1050  *      None
1051  * Return:
1052  *      RT_ERR_OK           - OK
1053  *      RT_ERR_FAILED       - Failed
1054  *      RT_ERR_SMI          - SMI access error
1055  *      RT_ERR_PORT_ID      - Invalid port number.
1056  * Note:
1057  *      This API can set Port/MAC force mode properties.
1058  */
1059 rtk_api_ret_t rtk_port_macForceLink_set(rtk_port_t port, rtk_port_mac_ability_t *pPortability)
1060 {
1061     rtk_api_ret_t retVal;
1062     rtl8367c_port_ability_t ability;
1063
1064     /* Check initialization state */
1065     RTK_CHK_INIT_STATE();
1066
1067     /* Check Port Valid */
1068     RTK_CHK_PORT_IS_UTP(port);
1069
1070     if(NULL == pPortability)
1071         return RT_ERR_NULL_POINTER;
1072
1073     if (pPortability->forcemode >1|| pPortability->speed > 2 || pPortability->duplex > 1 ||
1074        pPortability->link > 1 || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
1075         return RT_ERR_INPUT;
1076
1077     if ((retVal = rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
1078         return retVal;
1079
1080     ability.forcemode = pPortability->forcemode;
1081     ability.speed     = pPortability->speed;
1082     ability.duplex    = pPortability->duplex;
1083     ability.link      = pPortability->link;
1084     ability.nway      = pPortability->nway;
1085     ability.txpause   = pPortability->txpause;
1086     ability.rxpause   = pPortability->rxpause;
1087
1088     if ((retVal = rtl8367c_setAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
1089         return retVal;
1090
1091     return RT_ERR_OK;
1092 }
1093
1094 /* Function Name:
1095  *      rtk_port_macForceLink_get
1096  * Description:
1097  *      Get port force linking configuration.
1098  * Input:
1099  *      port - Port id.
1100  * Output:
1101  *      pPortability - port ability configuration
1102  * Return:
1103  *      RT_ERR_OK           - OK
1104  *      RT_ERR_FAILED       - Failed
1105  *      RT_ERR_SMI          - SMI access error
1106  *      RT_ERR_PORT_ID      - Invalid port number.
1107  *      RT_ERR_INPUT        - Invalid input parameters.
1108  * Note:
1109  *      This API can get Port/MAC force mode properties.
1110  */
1111 rtk_api_ret_t rtk_port_macForceLink_get(rtk_port_t port, rtk_port_mac_ability_t *pPortability)
1112 {
1113     rtk_api_ret_t retVal;
1114     rtl8367c_port_ability_t ability;
1115
1116     /* Check initialization state */
1117     RTK_CHK_INIT_STATE();
1118
1119     /* Check Port Valid */
1120     RTK_CHK_PORT_IS_UTP(port);
1121
1122     if(NULL == pPortability)
1123         return RT_ERR_NULL_POINTER;
1124
1125     if ((retVal = rtl8367c_getAsicPortForceLink(rtk_switch_port_L2P_get(port), &ability)) != RT_ERR_OK)
1126         return retVal;
1127
1128     pPortability->forcemode = ability.forcemode;
1129     pPortability->speed     = ability.speed;
1130     pPortability->duplex    = ability.duplex;
1131     pPortability->link      = ability.link;
1132     pPortability->nway      = ability.nway;
1133     pPortability->txpause   = ability.txpause;
1134     pPortability->rxpause   = ability.rxpause;
1135
1136     return RT_ERR_OK;
1137 }
1138
1139 /* Function Name:
1140  *      rtk_port_macForceLinkExt_set
1141  * Description:
1142  *      Set external interface force linking configuration.
1143  * Input:
1144  *      port            - external port ID
1145  *      mode            - external interface mode
1146  *      pPortability    - port ability configuration
1147  * Output:
1148  *      None
1149  * Return:
1150  *      RT_ERR_OK           - OK
1151  *      RT_ERR_FAILED       - Failed
1152  *      RT_ERR_SMI          - SMI access error
1153  *      RT_ERR_INPUT        - Invalid input parameters.
1154  * Note:
1155  *      This API can set external interface force mode properties.
1156  *      The external interface can be set to:
1157  *      - MODE_EXT_DISABLE,
1158  *      - MODE_EXT_RGMII,
1159  *      - MODE_EXT_MII_MAC,
1160  *      - MODE_EXT_MII_PHY,
1161  *      - MODE_EXT_TMII_MAC,
1162  *      - MODE_EXT_TMII_PHY,
1163  *      - MODE_EXT_GMII,
1164  *      - MODE_EXT_RMII_MAC,
1165  *      - MODE_EXT_RMII_PHY,
1166  *      - MODE_EXT_SGMII,
1167  *      - MODE_EXT_HSGMII,
1168  *      - MODE_EXT_1000X_100FX,
1169  *      - MODE_EXT_1000X,
1170  *      - MODE_EXT_100FX,
1171  */
1172 rtk_api_ret_t rtk_port_macForceLinkExt_set(rtk_port_t port, rtk_mode_ext_t mode, rtk_port_mac_ability_t *pPortability)
1173 {
1174     rtk_api_ret_t retVal;
1175     rtl8367c_port_ability_t ability;
1176     rtk_uint32 ext_id;
1177
1178     /* Check initialization state */
1179     RTK_CHK_INIT_STATE();
1180
1181     /* Check Port Valid */
1182     RTK_CHK_PORT_IS_EXT(port);
1183
1184     if(NULL == pPortability)
1185         return RT_ERR_NULL_POINTER;
1186
1187     if (mode >=MODE_EXT_END)
1188         return RT_ERR_INPUT;
1189
1190     if(mode == MODE_EXT_HSGMII)
1191     {
1192         if (pPortability->forcemode > 1 || pPortability->speed != PORT_SPEED_2500M || pPortability->duplex != PORT_FULL_DUPLEX ||
1193            pPortability->link >= PORT_LINKSTATUS_END || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
1194             return RT_ERR_INPUT;
1195
1196         if(rtk_switch_isHsgPort(port) != RT_ERR_OK)
1197             return RT_ERR_PORT_ID;
1198     }
1199     else
1200     {
1201         if (pPortability->forcemode > 1 || pPortability->speed > PORT_SPEED_1000M || pPortability->duplex >= PORT_DUPLEX_END ||
1202            pPortability->link >= PORT_LINKSTATUS_END || pPortability->nway > 1 || pPortability->txpause > 1 || pPortability->rxpause > 1)
1203             return RT_ERR_INPUT;
1204     }
1205
1206     ext_id = port - 15;
1207
1208     if(mode == MODE_EXT_DISABLE)
1209     {
1210         memset(&ability, 0x00, sizeof(rtl8367c_port_ability_t));
1211         if ((retVal = rtl8367c_setAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
1212             return retVal;
1213
1214         if ((retVal = rtl8367c_setAsicPortExtMode(ext_id, mode)) != RT_ERR_OK)
1215             return retVal;
1216     }
1217     else
1218     {
1219         if ((retVal = rtl8367c_setAsicPortExtMode(ext_id, mode)) != RT_ERR_OK)
1220             return retVal;
1221
1222         if ((retVal = rtl8367c_getAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
1223             return retVal;
1224
1225         ability.forcemode = pPortability->forcemode;
1226         ability.speed     = (mode == MODE_EXT_HSGMII) ? PORT_SPEED_1000M : pPortability->speed;
1227         ability.duplex    = pPortability->duplex;
1228         ability.link      = pPortability->link;
1229         ability.nway      = pPortability->nway;
1230         ability.txpause   = pPortability->txpause;
1231         ability.rxpause   = pPortability->rxpause;
1232
1233         if ((retVal = rtl8367c_setAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
1234             return retVal;
1235     }
1236
1237     return RT_ERR_OK;
1238 }
1239
1240 /* Function Name:
1241  *      rtk_port_macForceLinkExt_get
1242  * Description:
1243  *      Set external interface force linking configuration.
1244  * Input:
1245  *      port            - external port ID
1246  * Output:
1247  *      pMode           - external interface mode
1248  *      pPortability    - port ability configuration
1249  * Return:
1250  *      RT_ERR_OK           - OK
1251  *      RT_ERR_FAILED       - Failed
1252  *      RT_ERR_SMI          - SMI access error
1253  *      RT_ERR_INPUT        - Invalid input parameters.
1254  * Note:
1255  *      This API can get external interface force mode properties.
1256  */
1257 rtk_api_ret_t rtk_port_macForceLinkExt_get(rtk_port_t port, rtk_mode_ext_t *pMode, rtk_port_mac_ability_t *pPortability)
1258 {
1259     rtk_api_ret_t retVal;
1260     rtl8367c_port_ability_t ability;
1261     rtk_uint32 ext_id;
1262
1263     /* Check initialization state */
1264     RTK_CHK_INIT_STATE();
1265
1266     /* Check Port Valid */
1267     RTK_CHK_PORT_IS_EXT(port);
1268
1269     if(NULL == pMode)
1270         return RT_ERR_NULL_POINTER;
1271
1272     if(NULL == pPortability)
1273         return RT_ERR_NULL_POINTER;
1274
1275     ext_id = port - 15;
1276
1277     if ((retVal = rtl8367c_getAsicPortExtMode(ext_id, (rtk_uint32 *)pMode)) != RT_ERR_OK)
1278         return retVal;
1279
1280     if ((retVal = rtl8367c_getAsicPortForceLinkExt(ext_id, &ability)) != RT_ERR_OK)
1281         return retVal;
1282
1283     pPortability->forcemode = ability.forcemode;
1284     pPortability->speed     = (*pMode == MODE_EXT_HSGMII) ? PORT_SPEED_2500M : ability.speed;
1285     pPortability->duplex    = ability.duplex;
1286     pPortability->link      = ability.link;
1287     pPortability->nway      = ability.nway;
1288     pPortability->txpause   = ability.txpause;
1289     pPortability->rxpause   = ability.rxpause;
1290
1291     return RT_ERR_OK;
1292
1293 }
1294
1295 /* Function Name:
1296  *      rtk_port_macStatus_get
1297  * Description:
1298  *      Get port link status.
1299  * Input:
1300  *      port - Port id.
1301  * Output:
1302  *      pPortstatus - port ability configuration
1303  * Return:
1304  *      RT_ERR_OK           - OK
1305  *      RT_ERR_FAILED       - Failed
1306  *      RT_ERR_SMI          - SMI access error
1307  *      RT_ERR_PORT_ID      - Invalid port number.
1308  * Note:
1309  *      This API can get Port/PHY properties.
1310  */
1311 rtk_api_ret_t rtk_port_macStatus_get(rtk_port_t port, rtk_port_mac_ability_t *pPortstatus)
1312 {
1313     rtk_api_ret_t retVal;
1314     rtl8367c_port_status_t status;
1315     rtk_uint32 hsgsel;
1316
1317     /* Check initialization state */
1318     RTK_CHK_INIT_STATE();
1319
1320     /* Check Port Valid */
1321     RTK_CHK_PORT_VALID(port);
1322
1323     if(NULL == pPortstatus)
1324         return RT_ERR_NULL_POINTER;
1325
1326     if ((retVal = rtl8367c_getAsicPortStatus(rtk_switch_port_L2P_get(port), &status)) != RT_ERR_OK)
1327         return retVal;
1328
1329
1330     pPortstatus->duplex    = status.duplex;
1331     pPortstatus->link      = status.link;
1332     pPortstatus->nway      = status.nway;
1333     pPortstatus->txpause   = status.txpause;
1334     pPortstatus->rxpause   = status.rxpause;
1335
1336     if( (retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_SDS_MISC, RTL8367C_CFG_MAC8_SEL_HSGMII_OFFSET, &hsgsel)) != RT_ERR_OK)
1337             return retVal;
1338
1339     if( (rtk_switch_isHsgPort(port) == RT_ERR_OK) && (hsgsel == 1) )
1340         pPortstatus->speed = PORT_SPEED_2500M;
1341     else
1342         pPortstatus->speed = status.speed;
1343
1344     return RT_ERR_OK;
1345 }
1346
1347 /* Function Name:
1348  *      rtk_port_macLocalLoopbackEnable_set
1349  * Description:
1350  *      Set Port Local Loopback. (Redirect TX to RX.)
1351  * Input:
1352  *      port    - Port id.
1353  *      enable  - Loopback state, 0:disable, 1:enable
1354  * Output:
1355  *      None.
1356  * Return:
1357  *      RT_ERR_OK           - OK
1358  *      RT_ERR_FAILED       - Failed
1359  *      RT_ERR_SMI          - SMI access error
1360  *      RT_ERR_PORT_ID      - Invalid port number.
1361  * Note:
1362  *      This API can enable/disable Local loopback in MAC.
1363  *      For UTP port, This API will also enable the digital
1364  *      loopback bit in PHY register for sync of speed between
1365  *      PHY and MAC. For EXT port, users need to force the
1366  *      link state by themself.
1367  */
1368 rtk_api_ret_t rtk_port_macLocalLoopbackEnable_set(rtk_port_t port, rtk_enable_t enable)
1369 {
1370     rtk_api_ret_t   retVal;
1371     rtk_uint32      data;
1372
1373     /* Check initialization state */
1374     RTK_CHK_INIT_STATE();
1375
1376     /* Check Port Valid */
1377     RTK_CHK_PORT_VALID(port);
1378
1379     if(enable >= RTK_ENABLE_END)
1380         return RT_ERR_INPUT;
1381
1382     if ((retVal = rtl8367c_setAsicPortLoopback(rtk_switch_port_L2P_get(port), enable)) != RT_ERR_OK)
1383         return retVal;
1384
1385     if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
1386     {
1387         if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, &data)) != RT_ERR_OK)
1388             return retVal;
1389
1390         if(enable == ENABLED)
1391             data |= (0x0001 << 14);
1392         else
1393             data &= ~(0x0001 << 14);
1394
1395         if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), PHY_CONTROL_REG, data)) != RT_ERR_OK)
1396             return retVal;
1397     }
1398
1399     return RT_ERR_OK;
1400 }
1401
1402 /* Function Name:
1403  *      rtk_port_macLocalLoopbackEnable_get
1404  * Description:
1405  *      Get Port Local Loopback. (Redirect TX to RX.)
1406  * Input:
1407  *      port    - Port id.
1408  * Output:
1409  *      pEnable  - Loopback state, 0:disable, 1:enable
1410  * Return:
1411  *      RT_ERR_OK           - OK
1412  *      RT_ERR_FAILED       - Failed
1413  *      RT_ERR_SMI          - SMI access error
1414  *      RT_ERR_PORT_ID      - Invalid port number.
1415  * Note:
1416  *      None.
1417  */
1418 rtk_api_ret_t rtk_port_macLocalLoopbackEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
1419 {
1420     rtk_api_ret_t retVal;
1421
1422     /* Check initialization state */
1423     RTK_CHK_INIT_STATE();
1424
1425     /* Check Port Valid */
1426     RTK_CHK_PORT_VALID(port);
1427
1428     if(NULL == pEnable)
1429         return RT_ERR_NULL_POINTER;
1430
1431     if ((retVal = rtl8367c_getAsicPortLoopback(rtk_switch_port_L2P_get(port), pEnable)) != RT_ERR_OK)
1432         return retVal;
1433
1434     return RT_ERR_OK;
1435 }
1436
1437 /* Function Name:
1438  *      rtk_port_phyReg_set
1439  * Description:
1440  *      Set PHY register data of the specific port.
1441  * Input:
1442  *      port    - port id.
1443  *      reg     - Register id
1444  *      regData - Register data
1445  * Output:
1446  *      None
1447  * Return:
1448  *      RT_ERR_OK               - OK
1449  *      RT_ERR_FAILED           - Failed
1450  *      RT_ERR_SMI              - SMI access error
1451  *      RT_ERR_PORT_ID          - Invalid port number.
1452  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
1453  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1454  * Note:
1455  *      This API can set PHY register data of the specific port.
1456  */
1457 rtk_api_ret_t rtk_port_phyReg_set(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t regData)
1458 {
1459     rtk_api_ret_t retVal;
1460
1461     /* Check initialization state */
1462     RTK_CHK_INIT_STATE();
1463
1464     /* Check Port Valid */
1465     RTK_CHK_PORT_IS_UTP(port);
1466
1467     if ((retVal = rtl8367c_setAsicPHYReg(rtk_switch_port_L2P_get(port), reg, regData)) != RT_ERR_OK)
1468         return retVal;
1469
1470     return RT_ERR_OK;
1471 }
1472
1473 /* Function Name:
1474  *      rtk_port_phyReg_get
1475  * Description:
1476  *      Get PHY register data of the specific port.
1477  * Input:
1478  *      port    - Port id.
1479  *      reg     - Register id
1480  * Output:
1481  *      pData   - Register data
1482  * Return:
1483  *      RT_ERR_OK               - OK
1484  *      RT_ERR_FAILED           - Failed
1485  *      RT_ERR_SMI              - SMI access error
1486  *      RT_ERR_PORT_ID          - Invalid port number.
1487  *      RT_ERR_PHY_REG_ID       - Invalid PHY address
1488  *      RT_ERR_BUSYWAIT_TIMEOUT - PHY access busy
1489  * Note:
1490  *      This API can get PHY register data of the specific port.
1491  */
1492 rtk_api_ret_t rtk_port_phyReg_get(rtk_port_t port, rtk_port_phy_reg_t reg, rtk_port_phy_data_t *pData)
1493 {
1494     rtk_api_ret_t retVal;
1495
1496     /* Check initialization state */
1497     RTK_CHK_INIT_STATE();
1498
1499     /* Check Port Valid */
1500     RTK_CHK_PORT_IS_UTP(port);
1501
1502     if ((retVal = rtl8367c_getAsicPHYReg(rtk_switch_port_L2P_get(port), reg, pData)) != RT_ERR_OK)
1503         return retVal;
1504
1505     return RT_ERR_OK;
1506 }
1507
1508 /* Function Name:
1509  *      rtk_port_backpressureEnable_set
1510  * Description:
1511  *      Set the half duplex backpressure enable status of the specific port.
1512  * Input:
1513  *      port    - port id.
1514  *      enable  - Back pressure status.
1515  * Output:
1516  *      None
1517  * Return:
1518  *      RT_ERR_OK           - OK
1519  *      RT_ERR_FAILED       - Failed
1520  *      RT_ERR_SMI          - SMI access error
1521  *      RT_ERR_PORT_ID      - Invalid port number.
1522  *      RT_ERR_ENABLE       - Invalid enable input.
1523  * Note:
1524  *      This API can set the half duplex backpressure enable status of the specific port.
1525  *      The half duplex backpressure enable status of the port is as following:
1526  *      - DISABLE(Defer)
1527  *      - ENABLE (Backpressure)
1528  */
1529 rtk_api_ret_t rtk_port_backpressureEnable_set(rtk_port_t port, rtk_enable_t enable)
1530 {
1531     rtk_api_ret_t retVal;
1532
1533     /* Check initialization state */
1534     RTK_CHK_INIT_STATE();
1535
1536     if (port != RTK_WHOLE_SYSTEM)
1537         return RT_ERR_PORT_ID;
1538
1539     if (enable >= RTK_ENABLE_END)
1540         return RT_ERR_INPUT;
1541
1542     if ((retVal = rtl8367c_setAsicPortJamMode(!enable)) != RT_ERR_OK)
1543         return retVal;
1544
1545     return RT_ERR_OK;
1546 }
1547
1548 /* Function Name:
1549  *      rtk_port_backpressureEnable_get
1550  * Description:
1551  *      Get the half duplex backpressure enable status of the specific port.
1552  * Input:
1553  *      port - Port id.
1554  * Output:
1555  *      pEnable - Back pressure status.
1556  * Return:
1557  *      RT_ERR_OK           - OK
1558  *      RT_ERR_FAILED       - Failed
1559  *      RT_ERR_SMI          - SMI access error
1560  *      RT_ERR_PORT_ID      - Invalid port number.
1561  * Note:
1562  *      This API can get the half duplex backpressure enable status of the specific port.
1563  *      The half duplex backpressure enable status of the port is as following:
1564  *      - DISABLE(Defer)
1565  *      - ENABLE (Backpressure)
1566  */
1567 rtk_api_ret_t rtk_port_backpressureEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
1568 {
1569     rtk_api_ret_t retVal;
1570     rtk_uint32 regData;
1571
1572     /* Check initialization state */
1573     RTK_CHK_INIT_STATE();
1574
1575     if (port != RTK_WHOLE_SYSTEM)
1576         return RT_ERR_PORT_ID;
1577
1578     if(NULL == pEnable)
1579         return RT_ERR_NULL_POINTER;
1580
1581     if ((retVal = rtl8367c_getAsicPortJamMode(&regData)) != RT_ERR_OK)
1582         return retVal;
1583
1584     *pEnable = !regData;
1585
1586     return RT_ERR_OK;
1587 }
1588
1589 /* Function Name:
1590  *      rtk_port_adminEnable_set
1591  * Description:
1592  *      Set port admin configuration of the specific port.
1593  * Input:
1594  *      port    - port id.
1595  *      enable  - Back pressure status.
1596  * Output:
1597  *      None
1598  * Return:
1599  *      RT_ERR_OK           - OK
1600  *      RT_ERR_FAILED       - Failed
1601  *      RT_ERR_SMI          - SMI access error
1602  *      RT_ERR_PORT_ID      - Invalid port number.
1603  *      RT_ERR_ENABLE       - Invalid enable input.
1604  * Note:
1605  *      This API can set port admin configuration of the specific port.
1606  *      The port admin configuration of the port is as following:
1607  *      - DISABLE
1608  *      - ENABLE
1609  */
1610 rtk_api_ret_t rtk_port_adminEnable_set(rtk_port_t port, rtk_enable_t enable)
1611 {
1612     rtk_api_ret_t retVal;
1613     rtk_uint32      data;
1614
1615     /* Check initialization state */
1616     RTK_CHK_INIT_STATE();
1617
1618     /* Check Port Valid */
1619     RTK_CHK_PORT_IS_UTP(port);
1620
1621     if (enable >= RTK_ENABLE_END)
1622         return RT_ERR_INPUT;
1623
1624     if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
1625         return retVal;
1626
1627     if (ENABLED == enable)
1628     {
1629         data &= 0xF7FF;
1630         data |= 0x0200;
1631     }
1632     else if (DISABLED == enable)
1633     {
1634         data |= 0x0800;
1635     }
1636
1637     if ((retVal = rtk_port_phyReg_set(port, PHY_CONTROL_REG, data)) != RT_ERR_OK)
1638         return retVal;
1639
1640     return RT_ERR_OK;
1641 }
1642
1643 /* Function Name:
1644  *      rtk_port_adminEnable_get
1645  * Description:
1646  *      Get port admin configurationof the specific port.
1647  * Input:
1648  *      port - Port id.
1649  * Output:
1650  *      pEnable - Back pressure status.
1651  * Return:
1652  *      RT_ERR_OK           - OK
1653  *      RT_ERR_FAILED       - Failed
1654  *      RT_ERR_SMI          - SMI access error
1655  *      RT_ERR_PORT_ID      - Invalid port number.
1656  * Note:
1657  *      This API can get port admin configuration of the specific port.
1658  *      The port admin configuration of the port is as following:
1659  *      - DISABLE
1660  *      - ENABLE
1661  */
1662 rtk_api_ret_t rtk_port_adminEnable_get(rtk_port_t port, rtk_enable_t *pEnable)
1663 {
1664     rtk_api_ret_t retVal;
1665     rtk_uint32      data;
1666
1667     /* Check initialization state */
1668     RTK_CHK_INIT_STATE();
1669
1670     /* Check Port Valid */
1671     RTK_CHK_PORT_IS_UTP(port);
1672
1673     if(NULL == pEnable)
1674         return RT_ERR_NULL_POINTER;
1675
1676     if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
1677         return retVal;
1678
1679     if ( (data & 0x0800) == 0x0800)
1680     {
1681         *pEnable = DISABLED;
1682     }
1683     else
1684     {
1685         *pEnable = ENABLED;
1686     }
1687
1688     return RT_ERR_OK;
1689 }
1690
1691 /* Function Name:
1692  *      rtk_port_isolation_set
1693  * Description:
1694  *      Set permitted port isolation portmask
1695  * Input:
1696  *      port         - port id.
1697  *      pPortmask    - Permit port mask
1698  * Output:
1699  *      None
1700  * Return:
1701  *      RT_ERR_OK           - OK
1702  *      RT_ERR_FAILED       - Failed
1703  *      RT_ERR_SMI          - SMI access error
1704  *      RT_ERR_PORT_ID      - Invalid port number.
1705  *      RT_ERR_PORT_MASK    - Invalid portmask.
1706  * Note:
1707  *      This API set the port mask that a port can trasmit packet to of each port
1708  *      A port can only transmit packet to ports included in permitted portmask
1709  */
1710 rtk_api_ret_t rtk_port_isolation_set(rtk_port_t port, rtk_portmask_t *pPortmask)
1711 {
1712     rtk_api_ret_t retVal;
1713     rtk_uint32 pmask;
1714
1715     /* Check initialization state */
1716     RTK_CHK_INIT_STATE();
1717
1718     /* Check Port Valid */
1719     RTK_CHK_PORT_VALID(port);
1720
1721     if(NULL == pPortmask)
1722         return RT_ERR_NULL_POINTER;
1723
1724     /* check port mask */
1725     RTK_CHK_PORTMASK_VALID(pPortmask);
1726
1727     if ((retVal = rtk_switch_portmask_L2P_get(pPortmask, &pmask)) != RT_ERR_OK)
1728         return retVal;
1729
1730     if ((retVal = rtl8367c_setAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port), pmask)) != RT_ERR_OK)
1731         return retVal;
1732
1733     return RT_ERR_OK;
1734 }
1735
1736 /* Function Name:
1737  *      rtk_port_isolation_get
1738  * Description:
1739  *      Get permitted port isolation portmask
1740  * Input:
1741  *      port - Port id.
1742  * Output:
1743  *      pPortmask - Permit port mask
1744  * Return:
1745  *      RT_ERR_OK           - OK
1746  *      RT_ERR_FAILED       - Failed
1747  *      RT_ERR_SMI          - SMI access error
1748  *      RT_ERR_PORT_ID      - Invalid port number.
1749  * Note:
1750  *      This API get the port mask that a port can trasmit packet to of each port
1751  *      A port can only transmit packet to ports included in permitted portmask
1752  */
1753 rtk_api_ret_t rtk_port_isolation_get(rtk_port_t port, rtk_portmask_t *pPortmask)
1754 {
1755     rtk_api_ret_t retVal;
1756     rtk_uint32 pmask;
1757
1758     /* Check initialization state */
1759     RTK_CHK_INIT_STATE();
1760
1761     /* Check Port Valid */
1762     RTK_CHK_PORT_VALID(port);
1763
1764     if(NULL == pPortmask)
1765         return RT_ERR_NULL_POINTER;
1766
1767     if ((retVal = rtl8367c_getAsicPortIsolationPermittedPortmask(rtk_switch_port_L2P_get(port), &pmask)) != RT_ERR_OK)
1768         return retVal;
1769
1770     if ((retVal = rtk_switch_portmask_P2L_get(pmask, pPortmask)) != RT_ERR_OK)
1771         return retVal;
1772
1773     return RT_ERR_OK;
1774 }
1775
1776 /* Function Name:
1777  *      rtk_port_rgmiiDelayExt_set
1778  * Description:
1779  *      Set RGMII interface delay value for TX and RX.
1780  * Input:
1781  *      txDelay - TX delay value, 1 for delay 2ns and 0 for no-delay
1782  *      rxDelay - RX delay value, 0~7 for delay setup.
1783  * Output:
1784  *      None
1785  * Return:
1786  *      RT_ERR_OK           - OK
1787  *      RT_ERR_FAILED       - Failed
1788  *      RT_ERR_SMI          - SMI access error
1789  *      RT_ERR_INPUT        - Invalid input parameters.
1790  * Note:
1791  *      This API can set external interface 2 RGMII delay.
1792  *      In TX delay, there are 2 selection: no-delay and 2ns delay.
1793  *      In RX dekay, there are 8 steps for delay tunning. 0 for no-delay, and 7 for maximum delay.
1794  */
1795 rtk_api_ret_t rtk_port_rgmiiDelayExt_set(rtk_port_t port, rtk_data_t txDelay, rtk_data_t rxDelay)
1796 {
1797     rtk_api_ret_t retVal;
1798     rtk_uint32 regAddr, regData;
1799
1800     /* Check initialization state */
1801     RTK_CHK_INIT_STATE();
1802
1803     /* Check Port Valid */
1804     RTK_CHK_PORT_IS_EXT(port);
1805
1806     if ((txDelay > 1) || (rxDelay > 7))
1807         return RT_ERR_INPUT;
1808
1809     if(port == EXT_PORT0)
1810         regAddr = RTL8367C_REG_EXT1_RGMXF;
1811     else if(port == EXT_PORT1)
1812         regAddr = RTL8367C_REG_EXT2_RGMXF;
1813     else
1814         return RT_ERR_INPUT;
1815
1816     if ((retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
1817         return retVal;
1818
1819     regData = (regData & 0xFFF0) | ((txDelay << 3) & 0x0008) | (rxDelay & 0x0007);
1820
1821     if ((retVal = rtl8367c_setAsicReg(regAddr, regData)) != RT_ERR_OK)
1822         return retVal;
1823
1824     return RT_ERR_OK;
1825 }
1826
1827 /* Function Name:
1828  *      rtk_port_rgmiiDelayExt_get
1829  * Description:
1830  *      Get RGMII interface delay value for TX and RX.
1831  * Input:
1832  *      None
1833  * Output:
1834  *      pTxDelay - TX delay value
1835  *      pRxDelay - RX delay value
1836  * Return:
1837  *      RT_ERR_OK           - OK
1838  *      RT_ERR_FAILED       - Failed
1839  *      RT_ERR_SMI          - SMI access error
1840  *      RT_ERR_INPUT        - Invalid input parameters.
1841  * Note:
1842  *      This API can set external interface 2 RGMII delay.
1843  *      In TX delay, there are 2 selection: no-delay and 2ns delay.
1844  *      In RX dekay, there are 8 steps for delay tunning. 0 for n0-delay, and 7 for maximum delay.
1845  */
1846 rtk_api_ret_t rtk_port_rgmiiDelayExt_get(rtk_port_t port, rtk_data_t *pTxDelay, rtk_data_t *pRxDelay)
1847 {
1848     rtk_api_ret_t retVal;
1849     rtk_uint32 regAddr, regData;
1850
1851     /* Check initialization state */
1852     RTK_CHK_INIT_STATE();
1853
1854     /* Check Port Valid */
1855     RTK_CHK_PORT_IS_EXT(port);
1856
1857     if( (NULL == pTxDelay) || (NULL == pRxDelay) )
1858         return RT_ERR_NULL_POINTER;
1859
1860     if(port == EXT_PORT0)
1861         regAddr = RTL8367C_REG_EXT1_RGMXF;
1862     else if(port == EXT_PORT1)
1863         regAddr = RTL8367C_REG_EXT2_RGMXF;
1864     else
1865         return RT_ERR_INPUT;
1866
1867     if ((retVal = rtl8367c_getAsicReg(regAddr, &regData)) != RT_ERR_OK)
1868         return retVal;
1869
1870     *pTxDelay = (regData & 0x0008) >> 3;
1871     *pRxDelay = regData & 0x0007;
1872
1873     return RT_ERR_OK;
1874 }
1875
1876 /* Function Name:
1877  *      rtk_port_phyEnableAll_set
1878  * Description:
1879  *      Set all PHY enable status.
1880  * Input:
1881  *      enable - PHY Enable State.
1882  * Output:
1883  *      None
1884  * Return:
1885  *      RT_ERR_OK           - OK
1886  *      RT_ERR_FAILED       - Failed
1887  *      RT_ERR_SMI          - SMI access error
1888  *      RT_ERR_ENABLE       - Invalid enable input.
1889  * Note:
1890  *      This API can set all PHY status.
1891  *      The configuration of all PHY is as following:
1892  *      - DISABLE
1893  *      - ENABLE
1894  */
1895 rtk_api_ret_t rtk_port_phyEnableAll_set(rtk_enable_t enable)
1896 {
1897     rtk_api_ret_t retVal;
1898     rtk_uint32 data;
1899     rtk_uint32 port;
1900
1901     /* Check initialization state */
1902     RTK_CHK_INIT_STATE();
1903
1904     if (enable >= RTK_ENABLE_END)
1905         return RT_ERR_ENABLE;
1906
1907     if ((retVal = rtl8367c_setAsicPortEnableAll(enable)) != RT_ERR_OK)
1908         return retVal;
1909
1910     RTK_SCAN_ALL_LOG_PORT(port)
1911     {
1912         if(rtk_switch_isUtpPort(port) == RT_ERR_OK)
1913         {
1914             if ((retVal = rtk_port_phyReg_get(port, PHY_CONTROL_REG, &data)) != RT_ERR_OK)
1915                 return retVal;
1916
1917             if (ENABLED == enable)
1918             {
1919                 data &= 0xF7FF;
1920                 data |= 0x0200;
1921             }
1922             else
1923             {
1924                 data |= 0x0800;
1925             }
1926
1927             if ((retVal = rtk_port_phyReg_set(port, PHY_CONTROL_REG, data)) != RT_ERR_OK)
1928                 return retVal;
1929         }
1930     }
1931
1932     return RT_ERR_OK;
1933
1934 }
1935
1936 /* Function Name:
1937  *      rtk_port_phyEnableAll_get
1938  * Description:
1939  *      Get all PHY enable status.
1940  * Input:
1941  *      None
1942  * Output:
1943  *      pEnable - PHY Enable State.
1944  * Return:
1945  *      RT_ERR_OK           - OK
1946  *      RT_ERR_FAILED       - Failed
1947  *      RT_ERR_SMI          - SMI access error
1948  * Note:
1949  *      This API can set all PHY status.
1950  *      The configuration of all PHY is as following:
1951  *      - DISABLE
1952  *      - ENABLE
1953  */
1954 rtk_api_ret_t rtk_port_phyEnableAll_get(rtk_enable_t *pEnable)
1955 {
1956     rtk_api_ret_t retVal;
1957
1958     /* Check initialization state */
1959     RTK_CHK_INIT_STATE();
1960
1961     if(NULL == pEnable)
1962         return RT_ERR_NULL_POINTER;
1963
1964     if ((retVal = rtl8367c_getAsicPortEnableAll(pEnable)) != RT_ERR_OK)
1965         return retVal;
1966
1967     return RT_ERR_OK;
1968 }
1969
1970 /* Function Name:
1971  *      rtk_port_efid_set
1972  * Description:
1973  *      Set port-based enhanced filtering database
1974  * Input:
1975  *      port - Port id.
1976  *      efid - Specified enhanced filtering database.
1977  * Output:
1978  *      None
1979  * Return:
1980  *      RT_ERR_OK              - OK
1981  *      RT_ERR_FAILED          - Failed
1982  *      RT_ERR_SMI             - SMI access error
1983  *      RT_ERR_L2_FID - Invalid fid.
1984  *      RT_ERR_INPUT - Invalid input parameter.
1985  *      RT_ERR_PORT_ID - Invalid port ID.
1986  * Note:
1987  *      The API can set port-based enhanced filtering database.
1988  */
1989 rtk_api_ret_t rtk_port_efid_set(rtk_port_t port, rtk_data_t efid)
1990 {
1991     rtk_api_ret_t retVal;
1992
1993     /* Check initialization state */
1994     RTK_CHK_INIT_STATE();
1995
1996     /* Check Port Valid */
1997     RTK_CHK_PORT_VALID(port);
1998
1999     /* efid must be 0~7 */
2000     if (efid > RTK_EFID_MAX)
2001         return RT_ERR_INPUT;
2002
2003     if ((retVal = rtl8367c_setAsicPortIsolationEfid(rtk_switch_port_L2P_get(port), efid))!=RT_ERR_OK)
2004         return retVal;
2005
2006     return RT_ERR_OK;
2007 }
2008
2009 /* Function Name:
2010  *      rtk_port_efid_get
2011  * Description:
2012  *      Get port-based enhanced filtering database
2013  * Input:
2014  *      port - Port id.
2015  * Output:
2016  *      pEfid - Specified enhanced filtering database.
2017  * Return:
2018  *      RT_ERR_OK              - OK
2019  *      RT_ERR_FAILED          - Failed
2020  *      RT_ERR_SMI             - SMI access error
2021  *      RT_ERR_INPUT - Invalid input parameters.
2022  *      RT_ERR_PORT_ID - Invalid port ID.
2023  * Note:
2024  *      The API can get port-based enhanced filtering database status.
2025  */
2026 rtk_api_ret_t rtk_port_efid_get(rtk_port_t port, rtk_data_t *pEfid)
2027 {
2028     rtk_api_ret_t retVal;
2029
2030     /* Check initialization state */
2031     RTK_CHK_INIT_STATE();
2032
2033     /* Check Port Valid */
2034     RTK_CHK_PORT_VALID(port);
2035
2036     if(NULL == pEfid)
2037         return RT_ERR_NULL_POINTER;
2038
2039     if ((retVal = rtl8367c_getAsicPortIsolationEfid(rtk_switch_port_L2P_get(port), pEfid))!=RT_ERR_OK)
2040         return retVal;
2041
2042     return RT_ERR_OK;
2043 }
2044
2045 /* Function Name:
2046  *      rtk_port_phyComboPortMedia_set
2047  * Description:
2048  *      Set Combo port media type
2049  * Input:
2050  *      port    - Port id.
2051  *      media   - Media (COPPER or FIBER)
2052  * Output:
2053  *      None.
2054  * Return:
2055  *      RT_ERR_OK               - OK
2056  *      RT_ERR_FAILED           - Failed
2057  *      RT_ERR_SMI              - SMI access error
2058  *      RT_ERR_INPUT            - Invalid input parameters.
2059  *      RT_ERR_PORT_ID          - Invalid port ID.
2060  * Note:
2061  *      The API can Set Combo port media type.
2062  */
2063 rtk_api_ret_t rtk_port_phyComboPortMedia_set(rtk_port_t port, rtk_port_media_t media)
2064 {
2065     rtk_api_ret_t retVal;
2066     rtk_uint32 regData;
2067     rtk_uint32 idx;
2068
2069     /* Check initialization state */
2070     RTK_CHK_INIT_STATE();
2071
2072     /* Check Port Valid */
2073     RTK_CHK_PORT_IS_UTP(port);
2074
2075     /* Check Combo Port ID */
2076     RTK_CHK_PORT_IS_COMBO(port);
2077
2078     if (media >= PORT_MEDIA_END)
2079         return RT_ERR_INPUT;
2080
2081     if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
2082         return retVal;
2083
2084     if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
2085         return retVal;
2086
2087     if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
2088         return retVal;
2089
2090     if(regData != 0x6367)
2091         return RT_ERR_CHIP_NOT_SUPPORTED;
2092
2093     if(media == PORT_MEDIA_FIBER)
2094     {
2095         /* software init */
2096         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 1)) != RT_ERR_OK)
2097             return retVal;
2098
2099         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_MISCELLANEOUS_CONFIGURE0, RTL8367C_DW8051_EN_OFFSET, 1)) != RT_ERR_OK)
2100             return retVal;
2101
2102         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 1)) != RT_ERR_OK)
2103             return retVal;
2104
2105         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
2106             return retVal;
2107
2108         for(idx = 0; idx < FIBER_INIT_SIZE; idx++)
2109         {
2110             if ((retVal = rtl8367c_setAsicReg(0xE000 + idx, (rtk_uint32)Fiber[idx])) != RT_ERR_OK)
2111                 return retVal;
2112         }
2113
2114         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_IROM_MSB_OFFSET, 0)) != RT_ERR_OK)
2115             return retVal;
2116
2117         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_ACS_IROM_ENABLE_OFFSET, 0)) != RT_ERR_OK)
2118             return retVal;
2119
2120         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_CHIP_RESET, RTL8367C_DW8051_RST_OFFSET, 0)) != RT_ERR_OK)
2121             return retVal;
2122     }
2123     else
2124     {
2125         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_UTP_FIB_DET, RTL8367C_UTP_FIRST_OFFSET, 1))!=RT_ERR_OK)
2126             return retVal;
2127
2128         if ((retVal = rtl8367c_setAsicRegBit(RTL8367C_REG_DW8051_RDY, RTL8367C_DW8051_READY_OFFSET, 0)) != RT_ERR_OK)
2129             return retVal;
2130     }
2131
2132     return RT_ERR_OK;
2133 }
2134
2135 /* Function Name:
2136  *      rtk_port_phyComboPortMedia_get
2137  * Description:
2138  *      Get Combo port media type
2139  * Input:
2140  *      port    - Port id.
2141  * Output:
2142  *      pMedia  - Media (COPPER or FIBER)
2143  * Return:
2144  *      RT_ERR_OK               - OK
2145  *      RT_ERR_FAILED           - Failed
2146  *      RT_ERR_SMI              - SMI access error
2147  *      RT_ERR_INPUT            - Invalid input parameters.
2148  *      RT_ERR_PORT_ID          - Invalid port ID.
2149  * Note:
2150  *      The API can Set Combo port media type.
2151  */
2152 rtk_api_ret_t rtk_port_phyComboPortMedia_get(rtk_port_t port, rtk_port_media_t *pMedia)
2153 {
2154     rtk_api_ret_t   retVal;
2155     rtk_uint32      regData;
2156     rtk_uint32      data;
2157
2158     /* Check initialization state */
2159     RTK_CHK_INIT_STATE();
2160
2161     /* Check Port Valid */
2162     RTK_CHK_PORT_IS_UTP(port);
2163
2164     /* Check Combo Port ID */
2165     RTK_CHK_PORT_IS_COMBO(port);
2166
2167     if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0249)) != RT_ERR_OK)
2168         return retVal;
2169
2170     if((retVal = rtl8367c_getAsicReg(0x1300, &regData)) != RT_ERR_OK)
2171         return retVal;
2172
2173     if((retVal = rtl8367c_setAsicReg(0x13C2, 0x0000)) != RT_ERR_OK)
2174         return retVal;
2175
2176     if(regData != 0x6367)
2177     {
2178         *pMedia = PORT_MEDIA_COPPER;
2179     }
2180     else
2181     {
2182         if ((retVal = rtl8367c_getAsicRegBit(RTL8367C_REG_UTP_FIB_DET, RTL8367C_UTP_FIRST_OFFSET, &data))!=RT_ERR_OK)
2183                 return retVal;
2184
2185         if(data == 1)
2186             *pMedia = PORT_MEDIA_COPPER;
2187         else
2188             *pMedia = PORT_MEDIA_FIBER;
2189     }
2190
2191     return RT_ERR_OK;
2192 }
2193
2194 /* Function Name:
2195  *      rtk_port_rtctEnable_set
2196  * Description:
2197  *      Enable RTCT test
2198  * Input:
2199  *      pPortmask    - Port mask of RTCT enabled port
2200  * Output:
2201  *      None
2202  * Return:
2203  *      RT_ERR_OK               - OK
2204  *      RT_ERR_FAILED           - Failed
2205  *      RT_ERR_SMI              - SMI access error
2206  *      RT_ERR_PORT_MASK        - Invalid port mask.
2207  * Note:
2208  *      The API can enable RTCT Test
2209  */
2210 rtk_api_ret_t rtk_port_rtctEnable_set(rtk_portmask_t *pPortmask)
2211 {
2212     rtk_api_ret_t   retVal;
2213
2214     /* Check initialization state */
2215     RTK_CHK_INIT_STATE();
2216
2217     /* Check Port Mask Valid */
2218     RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask);
2219
2220     if ((retVal = rtl8367c_setAsicPortRTCTEnable(pPortmask->bits[0]))!=RT_ERR_OK)
2221         return retVal;
2222
2223     return RT_ERR_OK;
2224 }
2225
2226 /* Function Name:
2227  *      rtk_port_rtctDisable_set
2228  * Description:
2229  *      Disable RTCT test
2230  * Input:
2231  *      pPortmask    - Port mask of RTCT disabled port
2232  * Output:
2233  *      None
2234  * Return:
2235  *      RT_ERR_OK               - OK
2236  *      RT_ERR_FAILED           - Failed
2237  *      RT_ERR_SMI              - SMI access error
2238  *      RT_ERR_PORT_MASK        - Invalid port mask.
2239  * Note:
2240  *      The API can disable RTCT Test
2241  */
2242 rtk_api_ret_t rtk_port_rtctDisable_set(rtk_portmask_t *pPortmask)
2243 {
2244     rtk_api_ret_t   retVal;
2245
2246     /* Check initialization state */
2247     RTK_CHK_INIT_STATE();
2248
2249     /* Check Port Mask Valid */
2250     RTK_CHK_PORTMASK_VALID_ONLY_UTP(pPortmask);
2251
2252     if ((retVal = rtl8367c_setAsicPortRTCTDisable(pPortmask->bits[0]))!=RT_ERR_OK)
2253         return retVal;
2254
2255     return RT_ERR_OK;
2256 }
2257
2258
2259 /* Function Name:
2260  *      rtk_port_rtctResult_get
2261  * Description:
2262  *      Get the result of RTCT test
2263  * Input:
2264  *      port        - Port ID
2265  * Output:
2266  *      pRtctResult - The result of RTCT result
2267  * Return:
2268  *      RT_ERR_OK                   - OK
2269  *      RT_ERR_FAILED               - Failed
2270  *      RT_ERR_SMI                  - SMI access error
2271  *      RT_ERR_PORT_ID              - Invalid port ID.
2272  *      RT_ERR_PHY_RTCT_NOT_FINISH  - Testing does not finish.
2273  * Note:
2274  *      The API can get RTCT test result.
2275  *      RTCT test may takes 4.8 seconds to finish its test at most.
2276  *      Thus, if this API return RT_ERR_PHY_RTCT_NOT_FINISH or
2277  *      other error code, the result can not be referenced and
2278  *      user should call this API again until this API returns
2279  *      a RT_ERR_OK.
2280  *      The result is stored at pRtctResult->ge_result
2281  *      pRtctResult->linkType is unused.
2282  *      The unit of channel length is 2.5cm. Ex. 300 means 300 * 2.5 = 750cm = 7.5M
2283  */
2284 rtk_api_ret_t rtk_port_rtctResult_get(rtk_port_t port, rtk_rtctResult_t *pRtctResult)
2285 {
2286     rtk_api_ret_t               retVal;
2287     rtl8367c_port_rtct_result_t result;
2288
2289     /* Check initialization state */
2290     RTK_CHK_INIT_STATE();
2291
2292     /* Check Port Valid */
2293     RTK_CHK_PORT_IS_UTP(port);
2294
2295     memset(pRtctResult, 0x00, sizeof(rtk_rtctResult_t));
2296     if ((retVal = rtl8367c_getAsicPortRTCTResult(port, &result))!=RT_ERR_OK)
2297         return retVal;
2298
2299     pRtctResult->result.ge_result.channelALen = result.channelALen;
2300     pRtctResult->result.ge_result.channelBLen = result.channelBLen;
2301     pRtctResult->result.ge_result.channelCLen = result.channelCLen;
2302     pRtctResult->result.ge_result.channelDLen = result.channelDLen;
2303
2304     pRtctResult->result.ge_result.channelALinedriver = result.channelALinedriver;
2305     pRtctResult->result.ge_result.channelBLinedriver = result.channelBLinedriver;
2306     pRtctResult->result.ge_result.channelCLinedriver = result.channelCLinedriver;
2307     pRtctResult->result.ge_result.channelDLinedriver = result.channelDLinedriver;
2308
2309     pRtctResult->result.ge_result.channelAMismatch = result.channelAMismatch;
2310     pRtctResult->result.ge_result.channelBMismatch = result.channelBMismatch;
2311     pRtctResult->result.ge_result.channelCMismatch = result.channelCMismatch;
2312     pRtctResult->result.ge_result.channelDMismatch = result.channelDMismatch;
2313
2314     pRtctResult->result.ge_result.channelAOpen = result.channelAOpen;
2315     pRtctResult->result.ge_result.channelBOpen = result.channelBOpen;
2316     pRtctResult->result.ge_result.channelCOpen = result.channelCOpen;
2317     pRtctResult->result.ge_result.channelDOpen = result.channelDOpen;
2318
2319     pRtctResult->result.ge_result.channelAShort = result.channelAShort;
2320     pRtctResult->result.ge_result.channelBShort = result.channelBShort;
2321     pRtctResult->result.ge_result.channelCShort = result.channelCShort;
2322     pRtctResult->result.ge_result.channelDShort = result.channelDShort;
2323
2324     return RT_ERR_OK;
2325 }
2326
2327 /* Function Name:
2328  *      rtk_port_sds_reset
2329  * Description:
2330  *      Reset Serdes
2331  * Input:
2332  *      port        - Port ID
2333  * Output:
2334  *      None.
2335  * Return:
2336  *      RT_ERR_OK                   - OK
2337  *      RT_ERR_FAILED               - Failed
2338  *      RT_ERR_SMI                  - SMI access error
2339  *      RT_ERR_PORT_ID              - Invalid port ID.
2340  * Note:
2341  *      The API can reset Serdes
2342  */
2343 rtk_api_ret_t rtk_port_sds_reset(rtk_port_t port)
2344 {
2345     rtk_uint32 ext_id;
2346
2347     /* Check initialization state */
2348     RTK_CHK_INIT_STATE();
2349
2350     /* Check Port Valid */
2351     if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
2352         return RT_ERR_PORT_ID;
2353
2354     ext_id = port - 15;
2355     return rtl8367c_sdsReset(ext_id);
2356 }
2357
2358 /* Function Name:
2359  *      rtk_port_sgmiiLinkStatus_get
2360  * Description:
2361  *      Get SGMII status
2362  * Input:
2363  *      port        - Port ID
2364  * Output:
2365  *      pSignalDetect   - Signal detect
2366  *      pSync           - Sync
2367  *      pLink           - Link
2368  * Return:
2369  *      RT_ERR_OK                   - OK
2370  *      RT_ERR_FAILED               - Failed
2371  *      RT_ERR_SMI                  - SMI access error
2372  *      RT_ERR_PORT_ID              - Invalid port ID.
2373  * Note:
2374  *      The API can reset Serdes
2375  */
2376 rtk_api_ret_t rtk_port_sgmiiLinkStatus_get(rtk_port_t port, rtk_data_t *pSignalDetect, rtk_data_t *pSync, rtk_port_linkStatus_t *pLink)
2377 {
2378     rtk_uint32 ext_id;
2379
2380     /* Check initialization state */
2381     RTK_CHK_INIT_STATE();
2382
2383     /* Check Port Valid */
2384     if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
2385         return RT_ERR_PORT_ID;
2386
2387     if(NULL == pSignalDetect)
2388         return RT_ERR_NULL_POINTER;
2389
2390     if(NULL == pSync)
2391         return RT_ERR_NULL_POINTER;
2392
2393     if(NULL == pLink)
2394         return RT_ERR_NULL_POINTER;
2395
2396     ext_id = port - 15;
2397     return rtl8367c_getSdsLinkStatus(ext_id, (rtk_uint32 *)pSignalDetect, (rtk_uint32 *)pSync, (rtk_uint32 *)pLink);
2398 }
2399
2400 /* Function Name:
2401  *      rtk_port_sgmiiNway_set
2402  * Description:
2403  *      Configure SGMII/HSGMII port Nway state
2404  * Input:
2405  *      port        - Port ID
2406  *      state       - Nway state
2407  * Output:
2408  *      None.
2409  * Return:
2410  *      RT_ERR_OK                   - OK
2411  *      RT_ERR_FAILED               - Failed
2412  *      RT_ERR_SMI                  - SMI access error
2413  *      RT_ERR_PORT_ID              - Invalid port ID.
2414  * Note:
2415  *      The API configure SGMII/HSGMII port Nway state
2416  */
2417 rtk_api_ret_t rtk_port_sgmiiNway_set(rtk_port_t port, rtk_enable_t state)
2418 {
2419     rtk_uint32 ext_id;
2420
2421      /* Check initialization state */
2422     RTK_CHK_INIT_STATE();
2423
2424     /* Check Port Valid */
2425     if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
2426         return RT_ERR_PORT_ID;
2427
2428     if(state >= RTK_ENABLE_END)
2429         return RT_ERR_INPUT;
2430
2431     ext_id = port - 15;
2432     return rtl8367c_setSgmiiNway(ext_id, (rtk_uint32)state);
2433 }
2434
2435 /* Function Name:
2436  *      rtk_port_sgmiiNway_get
2437  * Description:
2438  *      Get SGMII/HSGMII port Nway state
2439  * Input:
2440  *      port        - Port ID
2441  * Output:
2442  *      pState      - Nway state
2443  * Return:
2444  *      RT_ERR_OK                   - OK
2445  *      RT_ERR_FAILED               - Failed
2446  *      RT_ERR_SMI                  - SMI access error
2447  *      RT_ERR_PORT_ID              - Invalid port ID.
2448  * Note:
2449  *      The API can get SGMII/HSGMII port Nway state
2450  */
2451 rtk_api_ret_t rtk_port_sgmiiNway_get(rtk_port_t port, rtk_enable_t *pState)
2452 {
2453     rtk_uint32 ext_id;
2454
2455      /* Check initialization state */
2456     RTK_CHK_INIT_STATE();
2457
2458     /* Check Port Valid */
2459     if(rtk_switch_isSgmiiPort(port) != RT_ERR_OK)
2460         return RT_ERR_PORT_ID;
2461
2462     if(NULL == pState)
2463         return RT_ERR_NULL_POINTER;
2464
2465     ext_id = port - 15;
2466     return rtl8367c_getSgmiiNway(ext_id, (rtk_uint32 *)pState);
2467 }