target/linux/mediatek/patches-5.15/930-spi-mt65xx-enable-sel-clk.patch

   1 --- a/drivers/spi/spi-mt65xx.c
   2 +++ b/drivers/spi/spi-mt65xx.c
   3 @@ -1231,10 +1231,16 @@ static int mtk_spi_probe(struct platform
   4                 goto err_disable_spi_hclk;
   5         }
   6
   7 +       ret = clk_prepare_enable(mdata->sel_clk);
   8 +       if (ret < 0) {
   9 +               dev_err(&pdev->dev, "failed to enable sel_clk (%d)\n", ret);
  10 +               goto err_disable_spi_clk;
  11 +       }
  12 +
  13         ret = clk_set_parent(mdata->sel_clk, mdata->parent_clk);
  14         if (ret < 0) {
  15                 dev_err(&pdev->dev, "failed to clk_set_parent (%d)\n", ret);
  16 -               goto err_disable_spi_clk;
  17 +               goto err_disable_spi_sel_clk;
  18         }
  19
  20         mdata->spi_clk_hz = clk_get_rate(mdata->spi_clk);
  21 @@ -1285,6 +1291,8 @@ static int mtk_spi_probe(struct platform
  22
  23  err_disable_runtime_pm:
  24         pm_runtime_disable(&pdev->dev);
  25 +err_disable_spi_sel_clk:
  26 +       clk_disable_unprepare(mdata->sel_clk);
  27  err_disable_spi_clk:
  28         clk_disable_unprepare(mdata->spi_clk);
  29  err_disable_spi_hclk: