target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts

   1 /*
   2  * TP-Link TL-WDR4900 v1 Device Tree Source
   3  *
   4  * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/gpio/gpio.h>
  14
  15 /include/ "fsl/p1010si-pre.dtsi"
  16
  17 / {
  18         model = "TP-Link TL-WDR4900 v1";
  19         compatible = "tplink,tl-wdr4900-v1";
  20
  21         chosen {
  22                 bootargs = "console=ttyS0,115200";
  23 /*
  24                 stdout-path = "/soc@ffe00000/serial@4500";
  25 */
  26         };
  27
  28         aliases {
  29                 spi0 = &spi0;
  30                 led-boot = &system_green;
  31                 led-failsafe = &system_green;
  32                 led-running = &system_green;
  33                 led-upgrade = &system_green;
  34                 label-mac-device = &enet0;
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39         };
  40
  41         soc: soc@ffe00000 {
  42                 ranges = <0x0 0x0 0xffe00000 0x100000>;
  43
  44                 spi0: spi@7000 {
  45                         flash@0 {
  46                                 compatible = "jedec,spi-nor";
  47                                 reg = <0>;
  48                                 spi-max-frequency = <25000000>;
  49
  50                                 partitions {
  51                                         compatible = "fixed-partitions";
  52                                         #address-cells = <1>;
  53                                         #size-cells = <1>;
  54
  55                                         uboot: partition@0 {
  56                                                 reg = <0x0 0x0050000>;
  57                                                 label = "u-boot";
  58                                                 read-only;
  59
  60                                                 compatible = "nvmem-cells";
  61                                                 #address-cells = <1>;
  62                                                 #size-cells = <1>;
  63
  64                                                 macaddr_uboot_4fc00: macaddr@4fc00 {
  65                                                         reg = <0x4fc00 0x6>;
  66                                                 };
  67                                         };
  68
  69                                         partition@50000 {
  70                                                 reg = <0x00050000 0x00010000>;
  71                                                 label = "dtb";
  72                                                 read-only;
  73                                         };
  74
  75                                         partition@60000 {
  76                                                 compatible = "tplink,firmware";
  77                                                 reg = <0x00060000 0x00f80000>;
  78                                                 label = "firmware";
  79                                         };
  80
  81                                         partition@fe0000 {
  82                                                 reg = <0x00fe0000 0x00010000>;
  83                                                 label = "config";
  84                                                 read-only;
  85                                         };
  86
  87                                         partition@ff0000 {
  88                                                 reg = <0x00ff0000 0x00010000>;
  89                                                 label = "caldata";
  90                                                 read-only;
  91                                         };
  92                                 };
  93                         };
  94                 };
  95
  96                 gpio0: gpio-controller@fc00 {
  97                 };
  98
  99                 usb@22000 {
 100                         phy_type = "utmi";
 101                         dr_mode = "host";
 102                 };
 103
 104                 mdio@24000 {
 105                         phy0: ethernet-phy@0 {
 106                                 reg = <0x0>;
 107                                 qca,ar8327-initvals = <
 108                                         0x00004 0x07600000 /* PAD0_MODE */
 109                                         0x00008 0x00000000 /* PAD5_MODE */
 110                                         0x0000c 0x01000000 /* PAD6_MODE */
 111                                         0x00010 0x40000000 /* POWER_ON_STRAP */
 112                                         0x00050 0xcf35cf35 /* LED_CTRL0 */
 113                                         0x00054 0xcf35cf35 /* LED_CTRL1 */
 114                                         0x00058 0xcf35cf35 /* LED_CTRL2 */
 115                                         0x0005c 0x03ffff00 /* LED_CTRL3 */
 116                                         0x0007c 0x0000007e /* PORT0_STATUS */
 117                                         0x00094 0x00000200 /* PORT6_STATUS */
 118                                 >;
 119                         };
 120                 };
 121
 122                 mdio@25000 {
 123                         status = "disabled";
 124                 };
 125
 126                 mdio@26000 {
 127                         status = "disabled";
 128                 };
 129
 130                 enet0: ethernet@b0000 {
 131                         phy-handle = <&phy0>;
 132                         phy-connection-type = "rgmii-id";
 133                         nvmem-cells = <&macaddr_uboot_4fc00>;
 134                         nvmem-cell-names = "mac-address";
 135                 };
 136
 137                 enet1: ethernet@b1000 {
 138                         status = "disabled";
 139                 };
 140
 141                 enet2: ethernet@b2000 {
 142                         status = "disabled";
 143                 };
 144
 145                 sdhc@2e000 {
 146                         status = "disabled";
 147                 };
 148
 149                 serial1: serial@4600 {
 150                         status = "disabled";
 151                 };
 152
 153                 can0: can@1c000 {
 154                         status = "disabled";
 155                 };
 156
 157                 can1: can@1d000 {
 158                         status = "disabled";
 159                 };
 160
 161                 ptp_clock@b0e00 {
 162                         compatible = "fsl,etsec-ptp";
 163                         reg = <0xb0e00 0xb0>;
 164                         interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
 165                         fsl,cksel       = <1>;
 166                         fsl,tclk-period = <5>;
 167                         fsl,tmr-prsc    = <2>;
 168                         fsl,tmr-add     = <0xcccccccd>;
 169                         fsl,tmr-fiper1  = <0x3b9ac9fb>; /* 1PPS */
 170                         fsl,tmr-fiper2  = <0x00018696>;
 171                         fsl,max-adj     = <249999999>;
 172                 };
 173         };
 174
 175         pci0: pcie@ffe09000 {
 176                 reg = <0 0xffe09000 0 0x1000>;
 177                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 178                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 179                 pcie@0 {
 180                         ranges = <0x2000000 0x0 0xa0000000
 181                                   0x2000000 0x0 0xa0000000
 182                                   0x0 0x20000000
 183
 184                                   0x1000000 0x0 0x0
 185                                   0x1000000 0x0 0x0
 186                                   0x0 0x100000>;
 187                 };
 188         };
 189
 190         pci1: pcie@ffe0a000 {
 191                 reg = <0 0xffe0a000 0 0x1000>;
 192                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 193                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 194                 pcie@0 {
 195                         ranges = <0x2000000 0x0 0x80000000
 196                                   0x2000000 0x0 0x80000000
 197                                   0x0 0x20000000
 198
 199                                   0x1000000 0x0 0x0
 200                                   0x1000000 0x0 0x0
 201                                   0x0 0x100000>;
 202                 };
 203         };
 204
 205         ifc: ifc@ffe1e000 {
 206                 status = "disabled";
 207         };
 208
 209         leds {
 210                 compatible = "gpio-leds";
 211
 212                 system_green: system {
 213                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 214                         label = "tp-link:blue:system";
 215                 };
 216
 217                 usb1 {
 218                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 219                         label = "tp-link:green:usb1";
 220                 };
 221
 222                 usb2 {
 223                         gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
 224                         label = "tp-link:green:usb2";
 225                 };
 226
 227                 usbpower {
 228                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
 229                         label = "tp-link:usb:power";
 230                 };
 231         };
 232
 233         buttons {
 234                 compatible = "gpio-keys";
 235
 236                 reset {
 237                         label = "Reset button";
 238                         gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
 239                         linux,code = <KEY_RESTART>;
 240                 };
 241
 242                 rfkill {
 243                         label = "RFKILL switch";
 244                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 245                         linux,code = <KEY_RFKill>;
 246                 };
 247         };
 248 };
 249
 250 /include/ "fsl/p1010si-post.dtsi"
 251
 252 / {
 253         cpus {
 254                 PowerPC,P1010@0 {
 255                         bus-frequency = <399999996>;
 256                         timebase-frequency = <49999999>;
 257                         clock-frequency = <799999992>;
 258                 };
 259         };
 260
 261         memory {
 262                 reg = <0x0 0x0 0x0 0x8000000>;
 263         };
 264
 265         soc@ffe00000 {
 266                 bus-frequency = <399999996>;
 267
 268                 serial@4600 {
 269                         clock-frequency = <399999996>;
 270                 };
 271
 272                 serial@4500 {
 273                         clock-frequency = <399999996>;
 274                 };
 275
 276                 pic@40000 {
 277                         clock-frequency = <399999996>;
 278                 };
 279         };
 280 };
 281
 282 /*
 283  * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
 284  * related to the P1010.
 285  *
 286  * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
 287  * datasheet states that the P1014 does not include the accelerated crypto
 288  * module (CAAM/SEC4) which is present in the P1010.
 289  *
 290  * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
 291  * SEC4 module, but states that SoCs with System Version Register values
 292  * 0x80F10110 or 0x80F10120 do not have the security feature.
 293  *
 294  * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
 295  * as: core rev 1.0, "P1014 (without security)".
 296  *
 297  * The SVR value is reported by uboot on the serial console.
 298  */
 299
 300 / {
 301         soc: soc@ffe00000 {
 302                 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
 303         };
 304 };