ef46d8f14affee81688cddbf703c1fe9a4f4606b
[openwrt/openwrt.git] / target / linux / mpc85xx / files / arch / powerpc / boot / dts / tl-wdr4900-v1.dts
1 /*
2 * TP-Link TL-WDR4900 v1 Device Tree Source
3 *
4 * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14
15 /include/ "fsl/p1010si-pre.dtsi"
16
17 / {
18 model = "TP-Link TL-WDR4900 v1";
19 compatible = "tplink,tl-wdr4900-v1";
20
21 chosen {
22 bootargs = "console=ttyS0,115200";
23 /*
24 stdout-path = "/soc@ffe00000/serial@4500";
25 */
26 };
27
28 aliases {
29 spi0 = &spi0;
30 led-boot = &system_green;
31 led-failsafe = &system_green;
32 led-running = &system_green;
33 led-upgrade = &system_green;
34 label-mac-device = &enet0;
35 };
36
37 memory {
38 device_type = "memory";
39 };
40
41 soc: soc@ffe00000 {
42 ranges = <0x0 0x0 0xffe00000 0x100000>;
43
44 spi0: spi@7000 {
45 flash@0 {
46 compatible = "jedec,spi-nor";
47 reg = <0>;
48 spi-max-frequency = <25000000>;
49
50 partitions {
51 compatible = "fixed-partitions";
52 #address-cells = <1>;
53 #size-cells = <1>;
54
55 uboot: partition@0 {
56 reg = <0x0 0x0050000>;
57 label = "u-boot";
58 read-only;
59
60 nvmem-layout {
61 compatible = "fixed-layout";
62 #address-cells = <1>;
63 #size-cells = <1>;
64
65 macaddr_uboot_4fc00: macaddr@4fc00 {
66 reg = <0x4fc00 0x6>;
67 };
68 };
69 };
70
71 partition@50000 {
72 reg = <0x00050000 0x00010000>;
73 label = "dtb";
74 read-only;
75 };
76
77 partition@60000 {
78 compatible = "tplink,firmware";
79 reg = <0x00060000 0x00f80000>;
80 label = "firmware";
81 };
82
83 partition@fe0000 {
84 reg = <0x00fe0000 0x00010000>;
85 label = "config";
86 read-only;
87 };
88
89 partition@ff0000 {
90 reg = <0x00ff0000 0x00010000>;
91 label = "caldata";
92 read-only;
93 };
94 };
95 };
96 };
97
98 gpio0: gpio-controller@fc00 {
99 };
100
101 usb@22000 {
102 phy_type = "utmi";
103 dr_mode = "host";
104 };
105
106 mdio@24000 {
107
108 phy_port1: phy@0 {
109 reg = <0>;
110 };
111
112 phy_port2: phy@1 {
113 reg = <1>;
114 };
115
116 phy_port3: phy@2 {
117 reg = <2>;
118 };
119
120 phy_port4: phy@3 {
121 reg = <3>;
122 };
123
124 phy_port5: phy@4 {
125 reg = <4>;
126 };
127
128 switch@0 {
129 compatible = "qca,qca8327";
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0x10>;
133
134 ports {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 port@0 {
139 reg = <0>;
140 ethernet = <&enet0>;
141 phy-mode = "rgmii-id";
142
143 fixed-link {
144 speed = <1000>;
145 full-duplex;
146 };
147 };
148
149 port@1 {
150 reg = <1>;
151 label = "wan";
152 phy-handle = <&phy_port1>;
153 };
154
155 port@2 {
156 reg = <2>;
157 label = "lan1";
158 phy-handle = <&phy_port2>;
159 };
160
161 port@3 {
162 reg = <3>;
163 label = "lan2";
164 phy-handle = <&phy_port3>;
165 };
166
167 port@4 {
168 reg = <4>;
169 label = "lan3";
170 phy-handle = <&phy_port4>;
171 };
172
173 port@5 {
174 reg = <5>;
175 label = "lan4";
176 phy-handle = <&phy_port5>;
177 };
178 };
179 };
180 };
181
182 mdio@25000 {
183 status = "disabled";
184 };
185
186 mdio@26000 {
187 status = "disabled";
188 };
189
190 enet0: ethernet@b0000 {
191 phy-connection-type = "rgmii-id";
192 nvmem-cells = <&macaddr_uboot_4fc00>;
193 nvmem-cell-names = "mac-address";
194
195 fixed-link {
196 speed = <1000>;
197 full-duplex;
198 };
199 };
200
201 enet1: ethernet@b1000 {
202 status = "disabled";
203 };
204
205 enet2: ethernet@b2000 {
206 status = "disabled";
207 };
208
209 sdhc@2e000 {
210 status = "disabled";
211 };
212
213 serial1: serial@4600 {
214 status = "disabled";
215 };
216
217 can0: can@1c000 {
218 status = "disabled";
219 };
220
221 can1: can@1d000 {
222 status = "disabled";
223 };
224
225 ptp_clock@b0e00 {
226 compatible = "fsl,etsec-ptp";
227 reg = <0xb0e00 0xb0>;
228 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
229 fsl,cksel = <1>;
230 fsl,tclk-period = <5>;
231 fsl,tmr-prsc = <2>;
232 fsl,tmr-add = <0xcccccccd>;
233 fsl,tmr-fiper1 = <0x3b9ac9fb>; /* 1PPS */
234 fsl,tmr-fiper2 = <0x00018696>;
235 fsl,max-adj = <249999999>;
236 };
237 };
238
239 pci0: pcie@ffe09000 {
240 reg = <0 0xffe09000 0 0x1000>;
241 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
242 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
243 pcie@0 {
244 ranges = <0x2000000 0x0 0xa0000000
245 0x2000000 0x0 0xa0000000
246 0x0 0x20000000
247
248 0x1000000 0x0 0x0
249 0x1000000 0x0 0x0
250 0x0 0x100000>;
251 };
252 };
253
254 pci1: pcie@ffe0a000 {
255 reg = <0 0xffe0a000 0 0x1000>;
256 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
257 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
258 pcie@0 {
259 ranges = <0x2000000 0x0 0x80000000
260 0x2000000 0x0 0x80000000
261 0x0 0x20000000
262
263 0x1000000 0x0 0x0
264 0x1000000 0x0 0x0
265 0x0 0x100000>;
266 };
267 };
268
269 ifc: ifc@ffe1e000 {
270 status = "disabled";
271 };
272
273 leds {
274 compatible = "gpio-leds";
275
276 system_green: system {
277 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
278 label = "tp-link:blue:system";
279 };
280
281 usb1 {
282 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
283 label = "tp-link:green:usb1";
284 };
285
286 usb2 {
287 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
288 label = "tp-link:green:usb2";
289 };
290
291 usbpower {
292 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
293 label = "tp-link:usb:power";
294 };
295 };
296
297 buttons {
298 compatible = "gpio-keys";
299
300 reset {
301 label = "Reset button";
302 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
303 linux,code = <KEY_RESTART>;
304 };
305
306 rfkill {
307 label = "RFKILL switch";
308 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
309 linux,code = <KEY_RFKILL>;
310 };
311 };
312 };
313
314 /include/ "fsl/p1010si-post.dtsi"
315
316 / {
317 cpus {
318 PowerPC,P1010@0 {
319 bus-frequency = <399999996>;
320 timebase-frequency = <49999999>;
321 clock-frequency = <799999992>;
322 };
323 };
324
325 memory {
326 reg = <0x0 0x0 0x0 0x8000000>;
327 };
328
329 soc@ffe00000 {
330 bus-frequency = <399999996>;
331
332 serial@4600 {
333 clock-frequency = <399999996>;
334 };
335
336 serial@4500 {
337 clock-frequency = <399999996>;
338 };
339
340 pic@40000 {
341 clock-frequency = <399999996>;
342 };
343 };
344 };
345
346 /*
347 * The TL-WDR4900 v1 uses the NXP (Freescale) P1014 SoC which is closely
348 * related to the P1010.
349 *
350 * NXP QP1010FS.pdf "QorIQ P1010 and P1014 Communications Processors"
351 * datasheet states that the P1014 does not include the accelerated crypto
352 * module (CAAM/SEC4) which is present in the P1010.
353 *
354 * NXP Appliation Note AN4938 Rev. 2 implies that some P1014 may contain the
355 * SEC4 module, but states that SoCs with System Version Register values
356 * 0x80F10110 or 0x80F10120 do not have the security feature.
357 *
358 * All v1.3 TL-WDR4900 tested have SVR == 0x80F10110 which AN4938 describes
359 * as: core rev 1.0, "P1014 (without security)".
360 *
361 * The SVR value is reported by uboot on the serial console.
362 */
363
364 / {
365 soc: soc@ffe00000 {
366 /delete-node/ crypto@30000; /* Pulled in by p1010si-post */
367 };
368 };
369
370 /*
371 * For the OpenWrt 22.03 release, since Linux 5.10.138 now uses
372 * aliases to determine PCI domain numbers, drop aliases so as not to
373 * change the sysfs path of our wireless netdevs.
374 */
375
376 / {
377 aliases {
378 /delete-property/ pci0;
379 /delete-property/ pci1;
380 };
381 };