7385f3402cffed5e3500e831a8db1fe832d254d0
[openwrt/openwrt.git] / target / linux / mpc85xx / files / arch / powerpc / boot / dts / ws-ap3825i.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later or MIT
2
3 /include/ "fsl/p1020si-pre.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Extreme Networks WS-AP3825i";
10 compatible = "extreme-networks,ws-ap3825i";
11
12 aliases {
13 ethernet0 = &enet0;
14 ethernet1 = &enet2;
15 led-boot = &led_power_green;
16 led-failsafe = &led_power_red;
17 led-running = &led_power_green;
18 led-upgrade = &led_power_red;
19 };
20
21 chosen {
22 bootargs-override = "console=ttyS0,115200";
23 };
24
25 memory {
26 device_type = "memory";
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 wifi1 {
33 gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
34 label = "ws-ap3825i:green:radio1";
35 linux,default-trigger = "phy0tpt";
36 };
37
38 wifi2 {
39 gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
40 label = "ws-ap3825i:green:radio2";
41 linux,default-trigger = "phy1tpt";
42 };
43
44 led_power_green: power_green {
45 gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
46 label = "ws-ap3825i:green:power";
47 };
48
49 led_power_red: power_red {
50 gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
51 label = "ws-ap3825i:red:power";
52 };
53
54 eth0_red {
55 gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
56 label = "ws-ap3825i:red:eth0";
57 };
58
59 eth0_green {
60 gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
61 label = "ws-ap3825i:green:eth0";
62 };
63
64 eth1_red {
65 gpios = <&spi_gpio 7 GPIO_ACTIVE_HIGH>;
66 label = "ws-ap3825i:red:eth1";
67 };
68
69 eth1_green {
70 gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
71 label = "ws-ap3825i:green:eth1";
72 };
73 };
74
75 keys {
76 compatible = "gpio-keys";
77
78 reset {
79 label = "Reset button";
80 gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
81 linux,code = <KEY_RESTART>;
82 };
83 };
84
85 lbc: localbus@ffe05000 {
86 reg = <0 0xffe05000 0 0x1000>;
87 ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
88
89 nor@0 {
90 #address-cells = <1>;
91 #size-cells = <1>;
92 compatible = "cfi-flash";
93 reg = <0x0 0x0 0x4000000>;
94 bank-width = <2>;
95 device-width = <1>;
96
97 partitions {
98 compatible = "fixed-partitions";
99 #address-cells = <1>;
100 #size-cells = <1>;
101
102 partition@0 {
103 compatible = "denx,fit";
104 reg = <0x0 0x3d60000>;
105 label = "firmware";
106 };
107
108 partition@3d60000 {
109 reg = <0x3d60000 0x20000>;
110 label = "calib";
111 read-only;
112 };
113
114 partition@3d80000{
115 reg = <0x3d80000 0x80000>;
116 label = "u-boot";
117 read-only;
118 };
119
120 partition@3e00000{
121 reg = <0x3e00000 0x100000>;
122 label = "nvram";
123 read-only;
124 };
125
126 partition@3f00000 {
127 reg = <0x3f00000 0x20000>;
128 label = "cfg2";
129 read-only;
130 };
131
132 partition@3f20000 {
133 reg = <0x3f20000 0x20000>;
134 label = "cfg1";
135 read-only;
136 };
137 };
138 };
139 };
140
141 soc: soc@ffe00000 {
142 ranges = <0x0 0x0 0xffe00000 0x100000>;
143
144 gpio0: gpio-controller@fc00 {
145 };
146
147 mdio@24000 {
148 phy0: ethernet-phy@0 {
149 interrupts = <3 1 0 0>;
150 reg = <0x5>;
151 reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
152 };
153
154 phy2: ethernet-phy@2 {
155 interrupts = <1 1 0 0>;
156 reg = <0x6>;
157 reset-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
158 };
159 };
160
161 mdio@25000 {
162 status = "disabled";
163 };
164
165 mdio@26000 {
166 status = "disabled";
167 };
168
169 enet0: ethernet@b0000 {
170 status = "okay";
171 phy-handle = <&phy0>;
172 phy-connection-type = "rgmii-id";
173 };
174
175 enet1: ethernet@b1000 {
176 status = "disabled";
177 };
178
179 enet2: ethernet@b2000 {
180 status = "okay";
181 phy-handle = <&phy2>;
182 phy-connection-type = "rgmii-id";
183 };
184
185 usb@22000 {
186 phy_type = "ulpi";
187 dr_mode = "host";
188 };
189
190 usb@23000 {
191 status = "disabled";
192 };
193 };
194
195 pci0: pcie@ffe09000 {
196 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
197 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
198 reg = <0 0xffe09000 0 0x1000>;
199 pcie@0 {
200 ranges = <0x2000000 0x0 0xa0000000
201 0x2000000 0x0 0xa0000000
202 0x0 0x20000000
203
204 0x1000000 0x0 0x0
205 0x1000000 0x0 0x0
206 0x0 0x100000>;
207 };
208 };
209
210 pci1: pcie@ffe0a000 {
211 reg = <0 0xffe0a000 0 0x1000>;
212 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
213 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
214 pcie@0 {
215 ranges = <0x2000000 0x0 0x80000000
216 0x2000000 0x0 0x80000000
217 0x0 0x20000000
218
219 0x1000000 0x0 0x0
220 0x1000000 0x0 0x0
221 0x0 0x100000>;
222 };
223 };
224 };
225
226 &soc {
227 led_spi {
228 /*
229 * This is currently non-functioning because the spi-gpio
230 * driver refuses to register when presented with this node.
231 */
232 compatible = "spi-gpio";
233 #address-cells = <1>;
234 #size-cells = <0>;
235
236 sck-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
237 mosi-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
238 num-chipselects = <0>;
239
240 spi_gpio: led_gpio@0 {
241 compatible = "fairchild,74hc595";
242 reg = <0>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 registers-number = <1>;
246 spi-max-frequency = <100000>;
247 };
248 };
249 };
250
251 /include/ "fsl/p1020si-post.dtsi"