target/linux/ramips/dts/GL-MT750.dts

   1 /dts-v1/;
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "glinet,gl-mt750", "ralink,mt7620a-soc";
  10         model = "GL-MT750";
  11
  12         chosen {
  13                 bootargs = "console=ttyS0,115200";
  14         };
  15
  16         gpio-leds {
  17                 compatible = "gpio-leds";
  18
  19                 wan {
  20                         label = "gl-mt750:wan";
  21                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  22                 };
  23
  24                 lan {
  25                         label = "gl-mt750:lan";
  26                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  27                 };
  28
  29                 wlan {
  30                         label = "gl-mt750:wlan";
  31                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  32                 };
  33
  34         };
  35
  36         gpio-keys-polled {
  37                 compatible = "gpio-keys-polled";
  38                 poll-interval = <20>;
  39                 reset {
  40                         label = "reset";
  41                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_RESTART>;
  43                 };
  44
  45                 BTN_0 {
  46                         label = "BTN_0";
  47                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  48                         linux,code = <BTN_0>;
  49                 };
  50
  51                 BTN_1 {
  52                         label = "BTN_1";
  53                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  54                         linux,code = <BTN_1>;
  55                 };
  56         };
  57 };
  58
  59 &gpio0 {
  60         status = "okay";
  61 };
  62
  63 &gpio1 {
  64         status = "okay";
  65 };
  66
  67 &gpio2 {
  68         status = "okay";
  69 };
  70
  71 &gpio3 {
  72         status = "okay";
  73 };
  74
  75 &spi0 {
  76         status = "okay";
  77
  78         m25p80@0 {
  79                 compatible = "jedec,spi-nor";
  80                 reg = <0>;
  81                 spi-max-frequency = <10000000>;
  82
  83                 partitions {
  84                         compatible = "fixed-partitions";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87
  88                         partition@0 {
  89                                 label = "u-boot";
  90                                 reg = <0x0 0x30000>;
  91                         };
  92
  93                         partition@30000 {
  94                                 label = "u-boot-env";
  95                                 reg = <0x30000 0x10000>;
  96                                 read-only;
  97                         };
  98
  99                         factory: partition@40000 {
 100                                 label = "factory";
 101                                 reg = <0x40000 0x10000>;
 102                                 read-only;
 103                         };
 104
 105                         partition@50000 {
 106                                 label = "firmware";
 107                                 reg = <0x50000 0xf80000>;
 108                         };
 109
 110                         partition@ff0000 {
 111                                 label = "art";
 112                                 reg = <0xff0000 0x10000>;
 113                         };
 114                 };
 115         };
 116 };
 117
 118 &sdhci {
 119         status = "okay";
 120 };
 121
 122 &ehci {
 123         status = "okay";
 124 };
 125
 126 &ohci {
 127         status = "okay";
 128 };
 129
 130 &ethernet {
 131         mtd-mac-address = <&factory 0x4000>;
 132         mediatek,portmap = "llllw";
 133 };
 134
 135 &wmac {
 136         ralink,mtd-eeprom = <&factory 0>;
 137 };
 138
 139 &pcie {
 140         status = "okay";
 141 };
 142
 143 &pcie0 {
 144         mt76@0,0 {
 145                 reg = <0x0000 0 0 0 0>;
 146                 mediatek,mtd-eeprom = <&factory 0x8000>;
 147         };
 148 };
 149
 150 &pinctrl {
 151         state_default: pinctrl0 {
 152                 gpio {
 153                         ralink,group = "wled","ephy","uartf";
 154                         ralink,function = "gpio";
 155                 };
 156         };
 157 };