target/linux/ramips/dts/mt7620a_dlink_dwr-118-a2.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/mtd/partitions/uimage.h>
   6
   7 / {
   8         compatible = "dlink,dwr-118-a2", "ralink,mt7620a-soc";
   9         model = "D-Link DWR-118 A2";
  10
  11         aliases {
  12                 led-boot = &led_internet;
  13                 led-failsafe = &led_internet;
  14         };
  15
  16         keys {
  17                 compatible = "gpio-keys";
  18
  19                 wps {
  20                         label = "wps";
  21                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  22                         linux,code = <KEY_WPS_BUTTON>;
  23                 };
  24
  25                 reset {
  26                         label = "reset";
  27                         gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
  28                         linux,code = <KEY_RESTART>;
  29                 };
  30         };
  31
  32         leds {
  33                 compatible = "gpio-leds";
  34
  35                 wan {
  36                         label = "green:wan";
  37                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  38                 };
  39
  40                 led_internet: internet {
  41                         label = "green:internet";
  42                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
  43                 };
  44
  45                 lan {
  46                         label = "green:lan";
  47                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  48                 };
  49
  50                 wlan2g {
  51                         label = "green:wlan2g";
  52                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  53                 };
  54
  55                 usb {
  56                         label = "green:usb";
  57                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  58                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  59                         linux,default-trigger = "usbport";
  60                 };
  61         };
  62
  63         gpio_export {
  64                 compatible = "gpio-export";
  65                 #size-cells = <0>;
  66
  67                 usb {
  68                         gpio-export,name = "usb";
  69                         gpio-export,output = <1>;
  70                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  71                 };
  72         };
  73 };
  74
  75 &gpio1 {
  76         status = "okay";
  77 };
  78
  79 &gpio2 {
  80         status = "okay";
  81 };
  82
  83 &gpio3 {
  84         status = "okay";
  85 };
  86
  87 &spi0 {
  88         status = "okay";
  89
  90         flash@0 {
  91                 compatible = "jedec,spi-nor";
  92                 reg = <0>;
  93                 spi-max-frequency = <50000000>;
  94
  95                 partitions {
  96                         compatible = "fixed-partitions";
  97                         #address-cells = <1>;
  98                         #size-cells = <1>;
  99
 100                         partition@0 {
 101                                 label = "jboot";
 102                                 reg = <0x0 0x10000>;
 103                                 read-only;
 104                         };
 105
 106                         partition@10000 {
 107                                 compatible = "openwrt,uimage", "denx,uimage";
 108                                 openwrt,ih-magic = <IH_MAGIC_OKLI>;
 109                                 openwrt,offset = <0x10000>;
 110                                 label = "firmware";
 111                                 reg = <0x10000 0xfe0000>;
 112                         };
 113
 114                         config: partition@ff0000 {
 115                                 label = "config";
 116                                 reg = <0xff0000 0x10000>;
 117                                 read-only;
 118
 119                                 nvmem-layout {
 120                                         compatible = "fixed-layout";
 121                                         #address-cells = <1>;
 122                                         #size-cells = <1>;
 123
 124                                         macaddr_config_e4a8: macaddr@e4a8 {
 125                                                 compatible = "mac-base";
 126                                                 reg = <0xe4a8 0x6>;
 127                                                 #nvmem-cell-cells = <1>;
 128                                         };
 129                                 };
 130                         };
 131                 };
 132         };
 133 };
 134
 135 &ehci {
 136         status = "okay";
 137 };
 138
 139 &ohci {
 140         status = "okay";
 141 };
 142
 143 &state_default {
 144         default {
 145                 groups = "ephy", "uartf", "spi refclk", "wled";
 146                 function = "gpio";
 147         };
 148 };
 149
 150 &pcie {
 151         status = "okay";
 152 };
 153
 154 &pcie0 {
 155         wifi@0,0 {
 156                 reg = <0x0000 0 0 0 0>;
 157                 ieee80211-freq-limit = <5000000 6000000>;
 158                 nvmem-cells = <&macaddr_config_e4a8 2>;
 159                 nvmem-cell-names = "mac-address";
 160
 161                 led {
 162                         led-sources = <2>;
 163                         led-active-low;
 164                 };
 165         };
 166 };
 167
 168 &ethernet {
 169         pinctrl-names = "default";
 170         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 171
 172         mediatek,portmap = "wllll";
 173
 174         port@4 {
 175                 status = "okay";
 176                 phy-handle = <&phy0>;
 177                 phy-mode = "rgmii";
 178         };
 179
 180         mdio-bus {
 181                 status = "okay";
 182
 183                 phy0: ethernet-phy@0 {
 184                         reg = <0>;
 185                         phy-mode = "rgmii-rxid";
 186                 };
 187         };
 188 };
 189
 190 &gsw {
 191         mediatek,port4-gmac;
 192         mediatek,ephy-base = /bits/ 8 <2>;
 193 };