063d65a70d8a280eb5206fe112489ec8c7f70ecb
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_dlink_dwr-960.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include "mt7620a.dtsi"
5
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/gpio/gpio.h>
8
9 / {
10 compatible = "dlink,dwr-960", "ralink,mt7620a-soc";
11 model = "D-Link DWR-960";
12
13 aliases {
14 led-boot = &led_status;
15 led-failsafe = &led_status;
16 led-running = &led_status;
17 led-upgrade = &led_status;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28
29 wps {
30 label = "wps";
31 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_WPS_BUTTON>;
33 };
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_status: status {
40 label = "dwr-960:green:status";
41 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
42 };
43
44 wan {
45 label = "dwr-960:green:wan";
46 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
47 };
48
49 lan {
50 label = "dwr-960:green:lan";
51 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
52 };
53
54 sms {
55 label = "dwr-960:green:sms";
56 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
57 };
58
59 signal_green {
60 label = "dwr-960:green:signal";
61 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
62 };
63
64 signal_red {
65 label = "dwr-960:red:signal";
66 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
67 };
68
69 4g {
70 label = "dwr-960:green:4g";
71 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
72 };
73
74 3g {
75 label = "dwr-960:green:3g";
76 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
77 };
78
79 wlan5g {
80 label = "dwr-960:green:wlan5g";
81 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
82 linux,default-trigger = "phy0tpt";
83 };
84
85 wlan2g {
86 label = "dwr-960:green:wlan2g";
87 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
88 linux,default-trigger = "phy1tpt";
89 };
90 };
91 };
92
93 &ethernet {
94 status = "okay";
95
96 pinctrl-names = "default";
97 pinctrl-0 = <&rgmii2_pins &mdio_pins>;
98 mediatek,portmap = "wllll";
99
100 port@5 {
101 status = "okay";
102 phy-mode = "rgmii-txid";
103 phy-handle = <&phy7>;
104 };
105
106 mdio-bus {
107 status = "okay";
108
109 phy7: ethernet-phy@7 {
110 reg = <7>;
111 phy-mode = "rgmii-id";
112 };
113 };
114 };
115
116 &gpio1 {
117 status = "okay";
118 };
119
120 &gpio2 {
121 status = "okay";
122 };
123
124 &gpio3 {
125 status = "okay";
126 };
127
128 &spi0 {
129 status = "okay";
130
131 flash@0 {
132 compatible = "jedec,spi-nor";
133 reg = <0>;
134 spi-max-frequency = <50000000>;
135
136 partitions {
137 compatible = "fixed-partitions";
138 #address-cells = <1>;
139 #size-cells = <1>;
140
141 partition@0 {
142 label = "jboot";
143 reg = <0x0 0x10000>;
144 read-only;
145 };
146
147 partition@10000 {
148 compatible = "amit,jimage";
149 label = "firmware";
150 reg = <0x10000 0xfe0000>;
151 };
152
153 config: partition@ff0000 {
154 label = "config";
155 reg = <0xff0000 0x10000>;
156 read-only;
157 };
158 };
159 };
160 };
161
162 &ehci {
163 status = "okay";
164 };
165
166 &ohci {
167 status = "okay";
168 };
169
170 &pcie {
171 status = "okay";
172 };
173
174 &pcie0 {
175 wifi@0,0 {
176 compatible = "mediatek,mt76";
177 reg = <0x0000 0 0 0 0>;
178 ieee80211-freq-limit = <5000000 6000000>;
179 mediatek,mtd-eeprom = <&config 0xe08e>;
180 mtd-mac-address = <&config 0xe50e>;
181 mtd-mac-address-increment = <2>;
182 };
183 };
184
185 &state_default {
186 default {
187 ralink,group = "i2c", "wled", "spi refclk", "uartf", "ephy";
188 ralink,function = "gpio";
189 };
190 };