target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/leds/common.h>
   4
   5 #include "mt7620a_iptime.dtsi"
   6
   7 / {
   8         compatible = "iptime,a1004ns", "ralink,mt7620a-soc";
   9         model = "ipTIME A1004ns";
  10
  11         aliases {
  12                 led-boot = &led_cpu;
  13                 led-failsafe = &led_cpu;
  14                 led-running = &led_cpu;
  15                 led-upgrade = &led_cpu;
  16         };
  17
  18         leds {
  19                 compatible = "gpio-leds";
  20
  21                 led_cpu: cpu {
  22                         function = LED_FUNCTION_CPU;
  23                         color = <LED_COLOR_ID_BLUE>;
  24                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  25                 };
  26
  27                 usb {
  28                         function = LED_FUNCTION_USB;
  29                         color = <LED_COLOR_ID_BLUE>;
  30                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  31                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  32                         linux,default-trigger = "usbport";
  33                 };
  34         };
  35
  36         keys {
  37                 compatible = "gpio-keys";
  38
  39                 reset {
  40                         label = "reset";
  41                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_RESTART>;
  43                 };
  44
  45                 wps {
  46                         label = "wps";
  47                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_WPS_BUTTON>;
  49                 };
  50         };
  51 };
  52
  53 &firmware {
  54         reg = <0x30000 0xfd0000>;
  55 };
  56
  57 &state_default {
  58         gpio {
  59                 groups = "i2c", "uartf", "spi refclk";
  60                 function = "gpio";
  61         };
  62 };
  63
  64 &ethernet {
  65         pinctrl-names = "default";
  66         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
  67
  68         port@5 {
  69                 status = "okay";
  70                 mediatek,fixed-link = <1000 1 1 1>;
  71                 phy-mode = "rgmii";
  72         };
  73
  74         mdio-bus {
  75                 status = "okay";
  76
  77                 ethernet-phy@0 {
  78                         reg = <0>;
  79                         phy-mode = "rgmii";
  80                 };
  81
  82                 ethernet-phy@1 {
  83                         reg = <1>;
  84                         phy-mode = "rgmii";
  85                 };
  86
  87                 ethernet-phy@2 {
  88                         reg = <2>;
  89                         phy-mode = "rgmii";
  90                 };
  91
  92                 ethernet-phy@3 {
  93                         reg = <3>;
  94                         phy-mode = "rgmii";
  95                 };
  96
  97                 ethernet-phy@4 {
  98                         reg = <4>;
  99                         phy-mode = "rgmii";
 100                 };
 101
 102                 ethernet-phy@1f {
 103                         reg = <0x1f>;
 104                         phy-mode = "rgmii";
 105                 };
 106         };
 107 };
 108
 109 &gsw {
 110         mediatek,ephy-base = /bits/ 8 <12>;
 111 };