target/linux/ramips/dts/mt7620a_linksys_e1700.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
   4  */
   5
   6 #include "mt7620a.dtsi"
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/leds/common.h>
  11
  12 / {
  13         compatible = "linksys,e1700", "ralink,mt7620a-soc";
  14         model = "Linksys E1700";
  15
  16         aliases {
  17                 led-boot = &led_power;
  18                 led-failsafe = &led_power;
  19                 led-running = &led_power;
  20                 led-upgrade = &led_power;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25
  26                 reset {
  27                         label = "reset";
  28                         gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  29                         linux,code = <KEY_RESTART>;
  30                 };
  31
  32                 wps {
  33                         label = "wps";
  34                         gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
  35                         linux,code = <KEY_WPS_BUTTON>;
  36                 };
  37         };
  38
  39         leds {
  40                 compatible = "gpio-leds";
  41
  42                 led_power: power {
  43                         function = LED_FUNCTION_POWER;
  44                         color = <LED_COLOR_ID_GREEN>;
  45                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 wan {
  49                         function = LED_FUNCTION_WPS;
  50                         color = <LED_COLOR_ID_GREEN>;
  51                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  52                 };
  53         };
  54 };
  55
  56 &spi0 {
  57         status = "okay";
  58
  59         flash@0 {
  60                 compatible = "jedec,spi-nor";
  61                 reg = <0>;
  62                 spi-max-frequency = <10000000>;
  63
  64                 partitions {
  65                         compatible = "fixed-partitions";
  66                         #address-cells = <1>;
  67                         #size-cells = <1>;
  68
  69                         partition@0 {
  70                                 label = "u-boot";
  71                                 reg = <0x0 0x30000>;
  72                                 read-only;
  73                         };
  74
  75                         partition@30000 {
  76                                 label = "config";
  77                                 reg = <0x30000 0x10000>;
  78                                 read-only;
  79                         };
  80
  81                         factory: partition@40000 {
  82                                 label = "factory";
  83                                 reg = <0x40000 0x10000>;
  84                                 read-only;
  85
  86                                 nvmem-layout {
  87                                         compatible = "fixed-layout";
  88                                         #address-cells = <1>;
  89                                         #size-cells = <1>;
  90
  91                                         eeprom_factory_0: eeprom@0 {
  92                                                 reg = <0x0 0x200>;
  93                                         };
  94
  95                                         macaddr_factory_28: macaddr@28 {
  96                                                 reg = <0x28 0x6>;
  97                                         };
  98                                 };
  99                         };
 100
 101                         partition@50000 {
 102                                 compatible = "denx,uimage";
 103                                 label = "firmware";
 104                                 reg = <0x50000 0x7b0000>;
 105                         };
 106                 };
 107         };
 108 };
 109
 110 &state_default {
 111         gpio {
 112                 groups = "i2c", "uartf";
 113                 function = "gpio";
 114         };
 115 };
 116
 117 &ethernet {
 118         pinctrl-names = "default";
 119         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 120
 121         nvmem-cells = <&macaddr_factory_28>;
 122         nvmem-cell-names = "mac-address";
 123
 124         port@5 {
 125                 status = "okay";
 126                 mediatek,fixed-link = <1000 1 1 1>;
 127                 phy-mode = "rgmii";
 128         };
 129
 130         mdio-bus {
 131                 status = "okay";
 132
 133                 phy0: ethernet-phy@0 {
 134                         reg = <0>;
 135                         phy-mode = "rgmii";
 136                 };
 137
 138                 phy1: ethernet-phy@1 {
 139                         reg = <1>;
 140                         phy-mode = "rgmii";
 141                 };
 142
 143                 phy2: ethernet-phy@2 {
 144                         reg = <2>;
 145                         phy-mode = "rgmii";
 146                 };
 147
 148                 phy3: ethernet-phy@3 {
 149                         reg = <3>;
 150                         phy-mode = "rgmii";
 151                 };
 152
 153                 phy4: ethernet-phy@4 {
 154                         reg = <4>;
 155                         phy-mode = "rgmii";
 156                 };
 157
 158                 phy1f: ethernet-phy@1f {
 159                         reg = <0x1f>;
 160                         phy-mode = "rgmii";
 161                 };
 162         };
 163 };
 164
 165 &gsw {
 166         mediatek,ephy-base = /bits/ 8 <12>;
 167 };
 168
 169 &wmac {
 170         nvmem-cells = <&eeprom_factory_0>;
 171         nvmem-cell-names = "eeprom";
 172 };