target/linux/ramips/dts/mt7620a_phicomm_psg1208.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6
   7 / {
   8         compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
   9         model = "Phicomm PSG1208";
  10
  11         aliases {
  12                 led-boot = &led_wps;
  13                 led-failsafe = &led_wps;
  14                 led-running = &led_wps;
  15                 led-upgrade = &led_wps;
  16         };
  17
  18         leds {
  19                 compatible = "gpio-leds";
  20
  21                 led_wps: wps {
  22                         function = LED_FUNCTION_WPS;
  23                         color = <LED_COLOR_ID_WHITE>;
  24                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  25                 };
  26
  27                 wlan {
  28                         label = "white:wlan2g";
  29                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  30                 };
  31         };
  32
  33         keys {
  34                 compatible = "gpio-keys";
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                 };
  41         };
  42 };
  43
  44 &gpio1 {
  45         status = "okay";
  46 };
  47
  48 &gpio3 {
  49         status = "okay";
  50 };
  51
  52 &spi0 {
  53         status = "okay";
  54
  55         flash@0 {
  56                 compatible = "jedec,spi-nor";
  57                 reg = <0>;
  58                 spi-max-frequency = <80000000>;
  59                 m25p,fast-read;
  60
  61                 partitions {
  62                         compatible = "fixed-partitions";
  63                         #address-cells = <1>;
  64                         #size-cells = <1>;
  65
  66                         partition@0 {
  67                                 label = "u-boot";
  68                                 reg = <0x0 0x30000>;
  69                                 read-only;
  70                         };
  71
  72                         partition@30000 {
  73                                 label = "u-boot-env";
  74                                 reg = <0x30000 0x10000>;
  75                                 read-only;
  76                         };
  77
  78                         partition@40000 {
  79                                 label = "factory";
  80                                 reg = <0x40000 0x10000>;
  81                                 read-only;
  82
  83                                 nvmem-layout {
  84                                         compatible = "fixed-layout";
  85                                         #address-cells = <1>;
  86                                         #size-cells = <1>;
  87
  88                                         eeprom_factory_0: eeprom@0 {
  89                                                 reg = <0x0 0x200>;
  90                                         };
  91
  92                                         eeprom_factory_8000: eeprom@8000 {
  93                                                 reg = <0x8000 0x200>;
  94                                         };
  95
  96                                         macaddr_factory_4: macaddr@4 {
  97                                                 reg = <0x4 0x6>;
  98                                         };
  99                                 };
 100                         };
 101
 102                         partition@50000 {
 103                                 compatible = "denx,uimage";
 104                                 label = "firmware";
 105                                 reg = <0x50000 0x7b0000>;
 106                         };
 107                 };
 108         };
 109 };
 110
 111 &state_default {
 112         gpio {
 113                 groups = "i2c", "spi refclk", "wled";
 114                 function = "gpio";
 115         };
 116 };
 117
 118 &ethernet {
 119         pinctrl-names = "default";
 120         pinctrl-0 = <&ephy_pins>;
 121
 122         nvmem-cells = <&macaddr_factory_4>;
 123         nvmem-cell-names = "mac-address";
 124
 125         mediatek,portmap = "llllw";
 126 };
 127
 128 &pcie {
 129         status = "okay";
 130 };
 131
 132 &pcie0 {
 133         mt76@0,0 {
 134                 reg = <0x0000 0 0 0 0>;
 135                 nvmem-cells = <&eeprom_factory_8000>;
 136                 nvmem-cell-names = "eeprom";
 137                 ieee80211-freq-limit = <5000000 6000000>;
 138         };
 139 };
 140
 141 &wmac {
 142         nvmem-cells = <&eeprom_factory_0>;
 143         nvmem-cell-names = "eeprom";
 144 };