target/linux/ramips/dts/mt7620a_planex_db-wrt01.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6
   7 / {
   8         compatible = "planex,db-wrt01", "ralink,mt7620a-soc";
   9         model = "Planex DB-WRT01";
  10
  11         aliases {
  12                 led-boot = &led_power;
  13                 led-failsafe = &led_power;
  14                 led-running = &led_power;
  15                 led-upgrade = &led_power;
  16         };
  17
  18         leds {
  19                 compatible = "gpio-leds";
  20
  21                 led_power: power {
  22                         function = LED_FUNCTION_POWER;
  23                         color = <LED_COLOR_ID_ORANGE>;
  24                         gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
  25                 };
  26         };
  27
  28         keys {
  29                 compatible = "gpio-keys";
  30
  31                 s1 {
  32                         label = "wps";
  33                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_WPS_BUTTON>;
  35                 };
  36         };
  37 };
  38
  39 &gpio1 {
  40         status = "okay";
  41 };
  42
  43 &spi0 {
  44         status = "okay";
  45
  46         flash@0 {
  47                 compatible = "jedec,spi-nor";
  48                 reg = <0>;
  49                 spi-max-frequency = <10000000>;
  50
  51                 partitions {
  52                         compatible = "fixed-partitions";
  53                         #address-cells = <1>;
  54                         #size-cells = <1>;
  55
  56                         partition@0 {
  57                                 label = "u-boot";
  58                                 reg = <0x0 0x30000>;
  59                                 read-only;
  60                         };
  61
  62                         partition@30000 {
  63                                 label = "u-boot-env";
  64                                 reg = <0x30000 0x10000>;
  65                                 read-only;
  66                         };
  67
  68                         factory: partition@40000 {
  69                                 label = "factory";
  70                                 reg = <0x40000 0x10000>;
  71                                 read-only;
  72
  73                                 nvmem-layout {
  74                                         compatible = "fixed-layout";
  75                                         #address-cells = <1>;
  76                                         #size-cells = <1>;
  77
  78                                         eeprom_factory_0: eeprom@0 {
  79                                                         reg = <0x0 0x200>;
  80                                         };
  81
  82                                         macaddr_factory_4: macaddr@4 {
  83                                                 reg = <0x4 0x6>;
  84                                         };
  85                                 };
  86                         };
  87
  88                         partition@50000 {
  89                                 compatible = "denx,uimage";
  90                                 label = "firmware";
  91                                 reg = <0x50000 0x7b0000>;
  92                         };
  93                 };
  94         };
  95 };
  96
  97 &state_default {
  98         gpio {
  99                 groups = "i2c", "spi refclk", "rgmii1";
 100                 function = "gpio";
 101         };
 102 };
 103
 104 &ethernet {
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&ephy_pins>;
 107
 108         nvmem-cells = <&macaddr_factory_4>;
 109         nvmem-cell-names = "mac-address";
 110
 111         mediatek,portmap = "llllw";
 112 };
 113
 114 &wmac {
 115         nvmem-cells = <&eeprom_factory_0>;
 116         nvmem-cell-names = "eeprom";
 117 };