target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/leds/common.h>
   8
   9 / {
  10         compatible = "sitecom,wlr-4100-v1-002", "ralink,mt7620a-soc";
  11         model = "Sitecom WLR-4100 v1 002";
  12
  13         chosen {
  14                 bootargs = "console=ttyS0,115200";
  15         };
  16
  17         aliases {
  18                 led-boot = &led_power;
  19                 led-failsafe = &led_power;
  20                 led-running = &led_power;
  21                 led-upgrade = &led_power;
  22         };
  23
  24         leds {
  25                 compatible = "gpio-leds";
  26
  27                 led_power: power {
  28                         function = LED_FUNCTION_POWER;
  29                         color = <LED_COLOR_ID_AMBER>;
  30                         gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
  31                         default-state = "on";
  32                 };
  33
  34                 wifi {
  35                         label = "blue:wifi";
  36                         gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
  37                         linux,default-trigger = "phy1tpt";
  38                 };
  39
  40                 wps {
  41                         function = LED_FUNCTION_WPS;
  42                         color = <LED_COLOR_ID_WHITE>;
  43                         gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  44                 };
  45         };
  46
  47         keys {
  48                 compatible = "gpio-keys";
  49
  50                 wps {
  51                         label = "wps";
  52                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  53                         linux,code = <KEY_WPS_BUTTON>;
  54                 };
  55
  56                 reset {
  57                         label = "reset";
  58                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  59                         linux,code = <KEY_RESTART>;
  60                 };
  61         };
  62
  63         gpio_export {
  64                 compatible = "gpio-export";
  65                 #size-cells = <0>;
  66
  67                 usb-power {
  68                         gpio-export,name = "usb-power";
  69                         gpio-export,output = <1>;
  70                         gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  71                 };
  72         };
  73 };
  74
  75 &gpio1 {
  76         status = "okay";
  77 };
  78
  79 &gpio3 {
  80         status = "okay";
  81 };
  82
  83 &spi0 {
  84         status = "okay";
  85
  86         flash@0 {
  87                 compatible = "jedec,spi-nor";
  88                 reg = <0>;
  89                 spi-max-frequency = <20000000>;
  90
  91                 partitions {
  92                         compatible = "fixed-partitions";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95
  96                         partition@0 {
  97                                 label = "uboot";
  98                                 reg = <0x0 0x30000>;
  99                                 read-only;
 100                         };
 101
 102                         partition@30000 {
 103                                 label = "u-boot-env";
 104                                 reg = <0x30000 0x10000>;
 105                                 read-only;
 106                         };
 107
 108                         factory: partition@40000 {
 109                                 label = "factory";
 110                                 reg = <0x40000 0x10000>;
 111                                 read-only;
 112
 113                                 nvmem-layout {
 114                                         compatible = "fixed-layout";
 115                                         #address-cells = <1>;
 116                                         #size-cells = <1>;
 117
 118                                         eeprom_factory_0: eeprom@0 {
 119                                                 reg = <0x0 0x200>;
 120                                         };
 121
 122                                         macaddr_factory_4: macaddr@4 {
 123                                                 reg = <0x4 0x6>;
 124                                         };
 125                                 };
 126                         };
 127
 128                         partition@50000 {
 129                                 compatible = "denx,uimage";
 130                                 label = "firmware";
 131                                 reg = <0x50000 0x790000>;
 132                         };
 133
 134                         partition@7e0000 {
 135                                 label = "backup";
 136                                 reg = <0x7e0000 0x10000>;
 137                                 read-only;
 138                         };
 139
 140                         partition@7f0000 {
 141                                 label = "storage";
 142                                 reg = <0x7f0000 0x10000>;
 143                                 read-only;
 144                         };
 145                 };
 146         };
 147 };
 148
 149 &ethernet {
 150         pinctrl-names = "default";
 151         pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 152
 153         nvmem-cells = <&macaddr_factory_4>;
 154         nvmem-cell-names = "mac-address";
 155
 156         port@5 {
 157                 status = "okay";
 158
 159                 phy-mode = "rgmii";
 160                 mediatek,fixed-link = <1000 1 1 1>;
 161         };
 162
 163         mdio-bus {
 164                 status = "okay";
 165
 166                 ethernet-phy@0 {
 167                         reg = <0>;
 168                         phy-mode = "rgmii";
 169
 170                         qca,ar8327-initvals = <
 171                                 0x04 0x06200000  /* PORT0 PAD MODE CTRL */
 172                                 0x08 0x01000000  /* PORT5 PAD MODE CTRL  RX delay EN all ports 0, 5, 6 */
 173                                 0x7c 0x0000007e  /* PORT0_STATUS */
 174                                 0x94 0x00000000  /* PORT6_STATUS */
 175                         >;
 176                 };
 177         };
 178 };
 179
 180 &gsw {
 181         mediatek,ephy-base = /bits/ 8 <8>;
 182 };
 183
 184 &ehci {
 185         status = "okay";
 186 };
 187
 188 &ohci {
 189         status = "okay";
 190 };
 191
 192 &wmac {
 193         nvmem-cells = <&eeprom_factory_0>;
 194         nvmem-cell-names = "eeprom";
 195 };
 196
 197 &state_default {
 198         gpio {
 199                 groups = "uartf", "i2c", "wled", "spi refclk";
 200                 function = "gpio";
 201         };
 202 };