ramips: convert to new LED color/function format where possible
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_wavlink_wl-wn579x3.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "mt7620a.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 compatible = "wavlink,wl-wn579x3", "ralink,mt7620a-soc";
11 model = "Wavlink WL-WN579X3";
12
13 aliases {
14 led-boot = &led_wps;
15 led-failsafe = &led_wps;
16 led-running = &led_wps;
17 led-upgrade = &led_wps;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 reset {
24 label = "reset";
25 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28
29 wps {
30 label = "wps";
31 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_WPS_BUTTON>;
33 };
34
35 switch_aps {
36 label = "mode_aps";
37 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
38 linux,code = <BTN_1>;
39 linux,input-type = <EV_SW>;
40 };
41
42 switch_repeater {
43 label = "mode_repeater";
44 gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
45 linux,code = <BTN_0>;
46 linux,input-type = <EV_SW>;
47 };
48 };
49
50 leds {
51 compatible = "gpio-leds";
52
53 led_wps: wps {
54 function = LED_FUNCTION_WPS;
55 color = <LED_COLOR_ID_BLUE>;
56 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
57 };
58
59 lan {
60 function = LED_FUNCTION_LAN;
61 color = <LED_COLOR_ID_BLUE>;
62 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
63 };
64
65 wan {
66 function = LED_FUNCTION_WAN;
67 color = <LED_COLOR_ID_BLUE>;
68 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
69 };
70
71 wifi {
72 label = "blue:wifi";
73 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
74 };
75
76 /* These three form the signal wifi strength segments */
77 wifi_high {
78 label = "blue:wifi_high";
79 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
80 };
81
82 wifi_medium {
83 label = "blue:wifi_medium";
84 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
85 };
86
87 wifi_low {
88 label = "blue:wifi_low";
89 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
90 };
91 };
92 };
93
94 &gpio2 {
95 status = "okay";
96 };
97
98 &gpio3 {
99 status = "okay";
100 };
101
102 &spi0 {
103 status = "okay";
104
105 flash@0 {
106 compatible = "jedec,spi-nor";
107 reg = <0>;
108 spi-max-frequency = <50000000>;
109
110 partitions {
111 compatible = "fixed-partitions";
112 #address-cells = <1>;
113 #size-cells = <1>;
114
115 partition@0 {
116 label = "u-boot";
117 reg = <0x0 0x30000>;
118 read-only;
119 };
120
121 partition@30000 {
122 label = "config";
123 reg = <0x30000 0x10000>;
124 read-only;
125 };
126
127 factory: partition@40000 {
128 label = "factory";
129 reg = <0x40000 0x10000>;
130 read-only;
131
132 nvmem-layout {
133 compatible = "fixed-layout";
134 #address-cells = <1>;
135 #size-cells = <1>;
136
137 eeprom_factory_0: eeprom@0 {
138 reg = <0x0 0x200>;
139 };
140
141 eeprom_factory_8000: eeprom@8000 {
142 reg = <0x8000 0x200>;
143 };
144
145 macaddr_factory_28: macaddr@28 {
146 reg = <0x28 0x6>;
147 };
148 };
149 };
150
151 partition@50000 {
152 compatible = "denx,uimage";
153 label = "firmware";
154 reg = <0x50000 0x790000>;
155 };
156
157 partition@7e0000 {
158 label = "board_data";
159 reg = <0x7e0000 0x10000>;
160 read-only;
161 };
162
163 partition@7f0000 {
164 label = "nvram";
165 reg = <0x7f0000 0x10000>;
166 read-only;
167 };
168 };
169 };
170 };
171
172 &pcie {
173 status = "okay";
174 };
175
176 &pcie0 {
177 wifi@0,0 {
178 reg = <0x0000 0 0 0 0>;
179 nvmem-cells = <&eeprom_factory_8000>;
180 nvmem-cell-names = "eeprom";
181 ieee80211-freq-limit = <5000000 6000000>;
182 };
183 };
184
185 &ethernet {
186 pinctrl-names = "default";
187 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
188
189 nvmem-cells = <&macaddr_factory_28>;
190 nvmem-cell-names = "mac-address";
191
192 mediatek,portmap = "llllw";
193
194 port@4 {
195 status = "okay";
196 phy-handle = <&phy4>;
197 phy-mode = "rgmii";
198 };
199
200 port@5 {
201 status = "okay";
202 phy-handle = <&phy5>;
203 phy-mode = "rgmii";
204 };
205
206 mdio-bus {
207 status = "okay";
208
209 phy4: ethernet-phy@4 {
210 reg = <4>;
211 phy-mode = "rgmii";
212 };
213
214 phy5: ethernet-phy@5 {
215 reg = <5>;
216 phy-mode = "rgmii";
217 };
218 };
219 };
220
221 &gsw {
222 mediatek,port4-gmac;
223 mediatek,ephy-base = /bits/ 8 <8>;
224 };
225
226 &wmac {
227 nvmem-cells = <&eeprom_factory_0>;
228 nvmem-cell-names = "eeprom";
229 };
230
231 &state_default {
232 gpio {
233 groups = "ephy", "i2c", "wled", "uartf";
234 function = "gpio";
235 };
236 };