20063e2b47d790b1bc06d7663ef61b29719232bf
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620n_zbtlink_zbt-wr8305rt.dts
1 #include "mt7620n.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "zbtlink,zbt-wr8305rt", "ralink,mt7620n-soc";
8 model = "Zbtlink ZBT-WR8305RT";
9
10 aliases {
11 led-boot = &led_sys;
12 led-failsafe = &led_sys;
13 led-running = &led_sys;
14 led-upgrade = &led_sys;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 led_sys: sys {
21 label = "green:sys";
22 gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
23 };
24
25 lan {
26 label = "green:usb";
27 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
28 trigger-sources = <&ohci_port1>, <&ehci_port1>;
29 linux,default-trigger = "usbport";
30 };
31
32 wifi {
33 label = "green:wifi";
34 gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
35 };
36 };
37
38 keys {
39 compatible = "gpio-keys";
40
41 reset {
42 label = "reset";
43 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_RESTART>;
45 };
46 };
47 };
48
49 &gpio1 {
50 status = "okay";
51 };
52
53 &gpio3 {
54 status = "okay";
55 };
56
57 &spi0 {
58 status = "okay";
59
60 flash@0 {
61 compatible = "jedec,spi-nor";
62 reg = <0>;
63 spi-max-frequency = <10000000>;
64
65 partitions {
66 compatible = "fixed-partitions";
67 #address-cells = <1>;
68 #size-cells = <1>;
69
70 partition@0 {
71 label = "u-boot";
72 reg = <0x0 0x30000>;
73 read-only;
74 };
75
76 partition@30000 {
77 label = "u-boot-env";
78 reg = <0x30000 0x10000>;
79 read-only;
80 };
81
82 factory: partition@40000 {
83 label = "factory";
84 reg = <0x40000 0x10000>;
85 read-only;
86
87 nvmem-layout {
88 compatible = "fixed-layout";
89 #address-cells = <1>;
90 #size-cells = <1>;
91
92 eeprom_factory_0: eeprom@0 {
93 reg = <0x0 0x200>;
94 };
95
96 macaddr_factory_4: macaddr@4 {
97 reg = <0x4 0x6>;
98 };
99 };
100 };
101
102 partition@50000 {
103 compatible = "denx,uimage";
104 label = "firmware";
105 reg = <0x50000 0x7b0000>;
106 };
107 };
108 };
109 };
110
111 &ehci {
112 status = "okay";
113 };
114
115 &ohci {
116 status = "okay";
117 };
118
119 &ethernet {
120 pinctrl-names = "default";
121 pinctrl-0 = <&ephy_pins>;
122
123 nvmem-cells = <&macaddr_factory_4>;
124 nvmem-cell-names = "mac-address";
125
126 mediatek,portmap = "llllw";
127 };
128
129 &wmac {
130 nvmem-cells = <&eeprom_factory_0>;
131 nvmem-cell-names = "eeprom";
132 };
133
134 &state_default {
135 default {
136 groups = "i2c", "uartf", "spi refclk", "wled";
137 function = "gpio";
138 };
139 };