3a6822452685516561369f2e6e0e30649674bca2
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7621_linksys_re6500.dts
1 #include "mt7621.dtsi"
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 / {
7 compatible = "linksys,re6500", "mediatek,mt7621-soc";
8 model = "Linksys RE6500";
9
10 aliases {
11 led-boot = &led_power;
12 led-failsafe = &led_power;
13 led-running = &led_power;
14 led-upgrade = &led_power;
15 };
16
17 leds {
18 compatible = "gpio-leds";
19
20 wifi {
21 label = "orange:wifi";
22 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
23 };
24
25 led_power: power {
26 label = "white:power";
27 gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
28 };
29 };
30
31 keys {
32 compatible = "gpio-keys";
33
34 wps {
35 label = "wps";
36 gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
37 linux,code = <KEY_WPS_BUTTON>;
38 };
39
40 reset {
41 label = "reset";
42 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
43 linux,code = <KEY_RESTART>;
44 };
45 };
46 };
47
48 &spi0 {
49 status = "okay";
50
51 flash@0 {
52 compatible = "jedec,spi-nor";
53 reg = <0>;
54 spi-max-frequency = <10000000>;
55
56 partitions {
57 compatible = "fixed-partitions";
58 #address-cells = <1>;
59 #size-cells = <1>;
60
61 partition@0 {
62 label = "u-boot";
63 reg = <0x0 0x30000>;
64 read-only;
65 };
66
67 partition@30000 {
68 label = "u-boot-env";
69 reg = <0x30000 0x10000>;
70 read-only;
71 };
72
73 factory: partition@40000 {
74 label = "factory";
75 reg = <0x40000 0x10000>;
76 read-only;
77
78 nvmem-layout {
79 compatible = "fixed-layout";
80 #address-cells = <1>;
81 #size-cells = <1>;
82
83 eeprom_factory_0: eeprom@0 {
84 reg = <0x0 0x200>;
85 };
86
87 eeprom_factory_8000: eeprom@8000 {
88 reg = <0x8000 0x200>;
89 };
90
91 macaddr_factory_2e: macaddr@2e {
92 reg = <0x2e 0x6>;
93 };
94 };
95 };
96
97 partition@50000 {
98 compatible = "denx,uimage";
99 label = "firmware";
100 reg = <0x50000 0x7b0000>;
101 };
102 };
103 };
104 };
105
106 &state_default {
107 gpio {
108 groups = "i2c", "uart2";
109 function = "gpio";
110 };
111 };
112
113 &pcie {
114 status = "okay";
115 };
116
117 &pcie0 {
118 mt76@0,0 {
119 reg = <0x0000 0 0 0 0>;
120 nvmem-cells = <&eeprom_factory_0>;
121 nvmem-cell-names = "eeprom";
122 ieee80211-freq-limit = <5000000 6000000>;
123 };
124 };
125
126 &pcie1 {
127 mt76@0,0 {
128 reg = <0x0000 0 0 0 0>;
129 nvmem-cells = <&eeprom_factory_8000>;
130 nvmem-cell-names = "eeprom";
131 ieee80211-freq-limit = <2400000 2500000>;
132 };
133 };
134
135 &gmac0 {
136 nvmem-cells = <&macaddr_factory_2e>;
137 nvmem-cell-names = "mac-address";
138 };
139
140 &gmac1 {
141 status = "okay";
142 label = "lan1";
143 phy-handle = <&ethphy0>;
144
145 nvmem-cells = <&macaddr_factory_2e>;
146 nvmem-cell-names = "mac-address";
147 };
148
149 &mdio {
150 ethphy0: ethernet-phy@0 {
151 reg = <0>;
152 };
153 };
154
155 &switch0 {
156 ports {
157 port@1 {
158 status = "okay";
159 label = "lan2";
160 };
161
162 port@2 {
163 status = "okay";
164 label = "lan3";
165 };
166
167 port@3 {
168 status = "okay";
169 label = "lan4";
170 };
171 };
172 };
173
174 &xhci {
175 status = "disabled";
176 };