bcm27xx-utils: update to latest version
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7628an_minew_g1-c.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7628an.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Minew G1-C";
10 compatible = "minew,g1-c", "mediatek,mt7628an-soc";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 };
18
19 keys {
20 compatible = "gpio-keys-polled";
21 poll-interval = <20>;
22
23 reset {
24 label = "reset";
25 gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
26 linux,code = <KEY_RESTART>;
27 };
28 };
29
30 leds {
31 compatible = "gpio-leds";
32
33 led_system: system {
34 label = "red:system";
35 gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
36 default-state = "on";
37 };
38 };
39
40 gpio-export {
41 compatible = "gpio-export";
42 #size-cells = <0>;
43
44 ws2812 {
45 gpio-export,name = "ws2812";
46 gpio-export,output = <1>;
47 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
48 };
49
50 nrf_power {
51 gpio-export,name = "nrf_power";
52 gpio-export,output = <1>;
53 gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
54 };
55 };
56 };
57
58 &state_default {
59 gpio {
60 groups = "gpio";
61 function = "gpio";
62 };
63
64 p0led_an {
65 groups = "p0led_an";
66 function = "gpio";
67 };
68
69 uart1 {
70 groups = "uart1";
71 function = "gpio";
72 };
73
74 wdt {
75 groups = "wdt";
76 function = "gpio";
77 };
78 };
79
80 &spi0 {
81 status = "okay";
82
83 pinctrl-names = "default";
84 pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
85
86 m25p80@0 {
87 compatible = "jedec,spi-nor";
88 reg = <0>;
89 spi-max-frequency = <40000000>;
90
91 partitions {
92 compatible = "fixed-partitions";
93 #address-cells = <1>;
94 #size-cells = <1>;
95
96 partition@0 {
97 label = "u-boot";
98 reg = <0x0 0x30000>;
99 read-only;
100 };
101
102 partition@30000 {
103 label = "u-boot-env";
104 reg = <0x30000 0x10000>;
105 };
106
107 partition@40000 {
108 label = "factory";
109 reg = <0x40000 0x10000>;
110 read-only;
111
112 nvmem-layout {
113 compatible = "fixed-layout";
114 #address-cells = <1>;
115 #size-cells = <1>;
116
117 eeprom_factory_0: eeprom@0 {
118 reg = <0x0 0x400>;
119 };
120
121 macaddr_factory_28: macaddr@28 {
122 reg = <0x28 0x6>;
123 };
124 };
125 };
126
127 partition@50000 {
128 compatible = "denx,uimage";
129 label = "firmware";
130 reg = <0x50000 0xfb0000>;
131 };
132 };
133 };
134 };
135
136 &ethernet {
137 nvmem-cells = <&macaddr_factory_28>;
138 nvmem-cell-names = "mac-address";
139 };
140
141 &esw {
142 mediatek,portmap = <0x3e>;
143 };
144
145 &wmac {
146 status = "okay";
147
148 nvmem-cells = <&eeprom_factory_0>;
149 nvmem-cell-names = "eeprom";
150 };
151
152 &sdhci {
153 status = "okay";
154 mediatek,cd-high;
155 };