01c8bb942a07bb83fc9b5f672e786af10240b688
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7628an_wiznet_wizfi630s.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7628an.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "wiznet,wizfi630s", "mediatek,mt7628an-soc";
10 model = "WIZnet WizFi630S";
11
12 chosen {
13 bootargs = "console=ttyS1,115200";
14 };
15
16 aliases {
17 led-boot = &led_run;
18 led-failsafe = &led_run;
19 led-running = &led_run;
20 led-upgrade = &led_run;
21 serial0 = &uart1;
22 serial1 = &uartlite;
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 led_run: run {
29 label = "green:run";
30 gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
31 };
32
33 ledwps {
34 label = "green:wps";
35 gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
36 };
37
38 leduart1 {
39 label = "green:uart1";
40 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
41 };
42
43 leduart2 {
44 label = "green:uart2";
45 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
46 };
47 };
48
49 keys {
50 compatible = "gpio-keys";
51
52 reset {
53 label = "reset";
54 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
55 linux,code = <KEY_RESTART>;
56 };
57
58 wps {
59 label = "wps";
60 gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
61 linux,code = <KEY_WPS_BUTTON>;
62 };
63
64 scm1 {
65 label = "SCM1";
66 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
67 linux,code = <BTN_1>;
68 linux,input-type = <EV_SW>;
69 };
70
71 scm2 {
72 label = "SCM2";
73 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
74 linux,code = <BTN_2>;
75 linux,input-type = <EV_SW>;
76 };
77 };
78 };
79
80 &state_default {
81 gpio {
82 groups = "gpio", "i2s", "i2c", "wdt", "refclk", "p1led_an", "p2led_an";
83 function = "gpio";
84 };
85 };
86
87 &spi0 {
88 status = "okay";
89
90 pinctrl-names = "default";
91 pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;
92
93 flash@0 {
94 compatible = "jedec,spi-nor";
95 reg = <0>;
96 spi-max-frequency = <40000000>;
97 broken-flash-reset;
98
99 partitions {
100 compatible = "fixed-partitions";
101 #address-cells = <1>;
102 #size-cells = <1>;
103
104 partition@0 {
105 label = "u-boot";
106 reg = <0x0 0x30000>;
107 read-only;
108 };
109
110 partition@30000 {
111 label = "u-boot-env";
112 reg = <0x30000 0x10000>;
113 read-only;
114 };
115
116 factory: partition@40000 {
117 label = "factory";
118 reg = <0x40000 0x10000>;
119 read-only;
120
121 nvmem-layout {
122 compatible = "fixed-layout";
123 #address-cells = <1>;
124 #size-cells = <1>;
125
126 eeprom_factory_0: eeprom@0 {
127 reg = <0x0 0x400>;
128 };
129
130 macaddr_factory_2e: macaddr@2e {
131 reg = <0x2e 0x6>;
132 };
133 };
134 };
135
136 partition@50000 {
137 compatible = "denx,uimage";
138 label = "firmware";
139 reg = <0x50000 0x1fb0000>;
140 };
141 };
142 };
143 };
144
145 &uart1 {
146 status = "okay";
147 };
148
149 &uart2 {
150 status = "okay";
151 };
152
153 &pwm {
154 status = "okay";
155 };
156
157 &ethernet {
158 nvmem-cells = <&macaddr_factory_2e>;
159 nvmem-cell-names = "mac-address";
160 };
161
162 &esw {
163 mediatek,portmap = <0x3e>;
164 mediatek,portdisable = <0x26>;
165 };
166
167 &sdhci {
168 status = "okay";
169 mediatek,cd-high;
170 };
171
172 &wmac {
173 status = "okay";
174
175 nvmem-cells = <&eeprom_factory_0>;
176 nvmem-cell-names = "eeprom";
177 };