ramips: ethernet: ralink: use the reset controller api for esw & ephy
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3352.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,rt3352-soc";
7
8 aliases {
9 spi0 = &spi0;
10 spi1 = &spi1;
11 serial0 = &uartlite;
12 };
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu@0 {
19 compatible = "mips,mips24KEc";
20 reg = <0>;
21 };
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 cpuintc: cpuintc {
29 #address-cells = <0>;
30 #interrupt-cells = <1>;
31 interrupt-controller;
32 compatible = "mti,cpu-interrupt-controller";
33 };
34
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
39
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 sysc: sysc@0 {
44 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc", "syscon";
45 reg = <0x0 0x100>;
46 };
47
48 timer: timer@100 {
49 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
50 reg = <0x100 0x20>;
51
52 interrupt-parent = <&intc>;
53 interrupts = <1>;
54 };
55
56 watchdog: watchdog@120 {
57 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
58 reg = <0x120 0x10>;
59
60 resets = <&rstctrl 8>;
61 reset-names = "wdt";
62
63 interrupt-parent = <&intc>;
64 interrupts = <1>;
65 };
66
67 intc: intc@200 {
68 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
69 reg = <0x200 0x100>;
70
71 interrupt-controller;
72 #interrupt-cells = <1>;
73
74 interrupt-parent = <&cpuintc>;
75 interrupts = <2>;
76 };
77
78 memc: memc@300 {
79 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
80 reg = <0x300 0x100>;
81
82 resets = <&rstctrl 20>;
83 reset-names = "mc";
84
85 interrupt-parent = <&intc>;
86 interrupts = <3>;
87 };
88
89 uart: uart@500 {
90 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
91 reg = <0x500 0x100>;
92
93 resets = <&rstctrl 12>;
94 reset-names = "uart";
95
96 interrupt-parent = <&intc>;
97 interrupts = <5>;
98
99 reg-shift = <2>;
100
101 status = "disabled";
102 };
103
104 gpio0: gpio@600 {
105 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
106 reg = <0x600 0x34>;
107
108 gpio-controller;
109 #gpio-cells = <2>;
110
111 ngpios = <24>;
112 ralink,gpio-base = <0>;
113 ralink,register-map = [ 00 04 08 0c
114 20 24 28 2c
115 30 34 ];
116 resets = <&rstctrl 13>;
117 reset-names = "pio";
118
119 interrupt-parent = <&intc>;
120 interrupts = <6>;
121 };
122
123 gpio1: gpio@638 {
124 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
125 reg = <0x638 0x24>;
126
127 gpio-controller;
128 #gpio-cells = <2>;
129
130 ngpios = <16>;
131 ralink,gpio-base = <24>;
132 ralink,register-map = [ 00 04 08 0c
133 10 14 18 1c
134 20 24 ];
135
136 status = "disabled";
137 };
138
139 gpio2: gpio@660 {
140 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
141 reg = <0x660 0x24>;
142
143 gpio-controller;
144 #gpio-cells = <2>;
145
146 ngpios = <6>;
147 ralink,gpio-base = <40>;
148 ralink,register-map = [ 00 04 08 0c
149 10 14 18 1c
150 20 24 ];
151
152 status = "disabled";
153 };
154
155 i2c@900 {
156 compatible = "ralink,rt2880-i2c";
157 reg = <0x900 0x100>;
158
159 resets = <&rstctrl 16>;
160 reset-names = "i2c";
161
162 #address-cells = <1>;
163 #size-cells = <0>;
164
165 status = "disabled";
166
167 pinctrl-names = "default";
168 pinctrl-0 = <&i2c_pins>;
169 };
170
171 i2s@a00 {
172 compatible = "ralink,rt3352-i2s";
173 reg = <0xa00 0x100>;
174
175 resets = <&rstctrl 17>;
176 reset-names = "i2s";
177
178 interrupt-parent = <&intc>;
179 interrupts = <10>;
180
181 txdma-req = <2>;
182 rxdma-req = <3>;
183
184 dmas = <&gdma 4>,
185 <&gdma 6>;
186 dma-names = "tx", "rx";
187
188 status = "disabled";
189 };
190
191 spi0: spi@b00 {
192 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
193 reg = <0xb00 0x40>;
194 #address-cells = <1>;
195 #size-cells = <0>;
196
197 resets = <&rstctrl 18>;
198 reset-names = "spi";
199
200 pinctrl-names = "default";
201 pinctrl-0 = <&spi_pins>;
202
203 status = "disabled";
204 };
205
206 spi1: spi@b40 {
207 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
208 reg = <0xb40 0x60>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211
212 resets = <&rstctrl 18>;
213 reset-names = "spi";
214
215 pinctrl-names = "default";
216 pinctrl-0 = <&spi_cs1>;
217
218 status = "disabled";
219 };
220
221 uartlite: uartlite@c00 {
222 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
223 reg = <0xc00 0x100>;
224
225 resets = <&rstctrl 19>;
226 reset-names = "uartl";
227
228 interrupt-parent = <&intc>;
229 interrupts = <12>;
230
231 reg-shift = <2>;
232
233 pinctrl-names = "default";
234 pinctrl-0 = <&uartlite_pins>;
235 };
236
237 gdma: gdma@2800 {
238 compatible = "ralink,rt3883-gdma";
239 reg = <0x2800 0x800>;
240
241 resets = <&rstctrl 14>;
242 reset-names = "dma";
243
244 interrupt-parent = <&intc>;
245 interrupts = <7>;
246
247 #dma-cells = <1>;
248 #dma-channels = <16>;
249 #dma-requests = <16>;
250
251 status = "disabled";
252 };
253 };
254
255 pinctrl: pinctrl {
256 compatible = "ralink,rt2880-pinmux";
257
258 pinctrl-names = "default";
259 pinctrl-0 = <&state_default>;
260
261 state_default: pinctrl0 {
262 };
263
264 i2c_pins: i2c_pins {
265 i2c_pins {
266 groups = "i2c";
267 function = "i2c";
268 };
269 };
270
271 mdio_pins: mdio {
272 mdio {
273 groups = "mdio";
274 function = "mdio";
275 };
276 };
277
278 rgmii_pins: rgmii {
279 rgmii {
280 groups = "rgmii";
281 function = "rgmii";
282 };
283 };
284
285 spi_pins: spi_pins {
286 spi_pins {
287 groups = "spi";
288 function = "spi";
289 };
290 };
291
292 spi_cs1: spi1 {
293 spi1 {
294 groups = "spi_cs1";
295 function = "spi_cs1";
296 };
297 };
298
299 uartlite_pins: uartlite {
300 uart {
301 groups = "uartlite";
302 function = "uartlite";
303 };
304 };
305 };
306
307 rstctrl: rstctrl {
308 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
309 #reset-cells = <1>;
310 };
311
312 clkctrl: clkctrl {
313 compatible = "ralink,rt2880-clock";
314 #clock-cells = <1>;
315 };
316
317 ethernet: ethernet@10100000 {
318 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
319 reg = <0x10100000 0x10000>;
320
321 resets = <&rstctrl 21>;
322 reset-names = "fe";
323
324 interrupt-parent = <&cpuintc>;
325 interrupts = <5>;
326
327 mediatek,switch = <&esw>;
328 };
329
330 esw: esw@10110000 {
331 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
332 reg = <0x10110000 0x8000>;
333
334 resets = <&rstctrl 23 &rstctrl 24>;
335 reset-names = "esw", "ephy";
336
337 interrupt-parent = <&intc>;
338 interrupts = <17>;
339 };
340
341 usbphy: usbphy {
342 compatible = "ralink,rt3352-usbphy";
343 #phy-cells = <0>;
344
345 ralink,sysctl = <&sysc>;
346 resets = <&rstctrl 22 &rstctrl 25>;
347 reset-names = "host", "device";
348 clocks = <&clkctrl 18 &clkctrl 20>;
349 clock-names = "host", "device";
350 };
351
352 wmac: wmac@10180000 {
353 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
354 reg = <0x10180000 0x40000>;
355
356 interrupt-parent = <&cpuintc>;
357 interrupts = <6>;
358
359 ralink,eeprom = "soc_wmac.eeprom";
360 };
361
362 ehci: ehci@101c0000 {
363 #address-cells = <1>;
364 #size-cells = <0>;
365 compatible = "generic-ehci";
366 reg = <0x101c0000 0x1000>;
367
368 phys = <&usbphy>;
369 phy-names = "usb";
370
371 interrupt-parent = <&intc>;
372 interrupts = <18>;
373
374 status = "disabled";
375
376 ehci_port1: port@1 {
377 reg = <1>;
378 #trigger-source-cells = <0>;
379 };
380 };
381
382 ohci: ohci@101c1000 {
383 #address-cells = <1>;
384 #size-cells = <0>;
385 compatible = "generic-ohci";
386 reg = <0x101c1000 0x1000>;
387
388 phys = <&usbphy>;
389 phy-names = "usb";
390
391 interrupt-parent = <&intc>;
392 interrupts = <18>;
393
394 status = "disabled";
395
396 ohci_port1: port@1 {
397 reg = <1>;
398 #trigger-source-cells = <0>;
399 };
400 };
401 };