d490d700d601b2620d112e14ba150b99f69b895f
[openwrt/openwrt.git] / target / linux / ramips / dts / rt3883.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,rt3883-soc";
7
8 aliases {
9 spi0 = &spi0;
10 spi1 = &spi1;
11 serial0 = &uartlite;
12 };
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu@0 {
19 compatible = "mips,mips74Kc";
20 reg = <0>;
21 };
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 cpuintc: cpuintc {
29 #address-cells = <0>;
30 #interrupt-cells = <1>;
31 interrupt-controller;
32 compatible = "mti,cpu-interrupt-controller";
33 };
34
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
39
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 sysc: syscon@0 {
44 compatible = "ralink,rt3883-sysc", "syscon";
45 reg = <0x0 0x100>;
46 #clock-cells = <1>;
47 #reset-cells = <1>;
48 };
49
50 timer: timer@100 {
51 compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
52 reg = <0x100 0x20>;
53
54 clocks = <&sysc 3>;
55
56 interrupt-parent = <&intc>;
57 interrupts = <1>;
58 };
59
60 watchdog: watchdog@120 {
61 compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
62 reg = <0x120 0x10>;
63
64 clocks = <&sysc 4>;
65
66 resets = <&sysc 8>;
67 reset-names = "wdt";
68
69 interrupt-parent = <&intc>;
70 interrupts = <1>;
71 };
72
73 intc: intc@200 {
74 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
75 reg = <0x200 0x100>;
76
77 resets = <&sysc 19>;
78 reset-names = "intc";
79
80 interrupt-controller;
81 #interrupt-cells = <1>;
82
83 interrupt-parent = <&cpuintc>;
84 interrupts = <2>;
85 };
86
87 memc: memc@300 {
88 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
89 reg = <0x300 0x100>;
90
91 resets = <&sysc 20>;
92 reset-names = "mc";
93
94 interrupt-parent = <&intc>;
95 interrupts = <3>;
96 };
97
98 uart: uart@500 {
99 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
100 reg = <0x500 0x100>;
101
102 clocks = <&sysc 5>;
103
104 resets = <&sysc 12>;
105
106 interrupt-parent = <&intc>;
107 interrupts = <5>;
108
109 reg-shift = <2>;
110
111 status = "disabled";
112 };
113
114 gpio0: gpio@600 {
115 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
116 reg = <0x600 0x34>;
117
118 resets = <&sysc 13>;
119 reset-names = "pio";
120
121 interrupt-parent = <&intc>;
122 interrupts = <6>;
123
124 gpio-controller;
125 #gpio-cells = <2>;
126
127 ngpios = <24>;
128 ralink,gpio-base = <0>;
129 ralink,register-map = [ 00 04 08 0c
130 20 24 28 2c
131 30 34 ];
132 };
133
134 gpio1: gpio@638 {
135 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
136 reg = <0x638 0x24>;
137
138 gpio-controller;
139 #gpio-cells = <2>;
140
141 ngpios = <16>;
142 ralink,gpio-base = <24>;
143 ralink,register-map = [ 00 04 08 0c
144 10 14 18 1c
145 20 24 ];
146
147 status = "disabled";
148 };
149
150 gpio2: gpio@660 {
151 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
152 reg = <0x660 0x24>;
153
154 gpio-controller;
155 #gpio-cells = <2>;
156
157 ngpios = <32>;
158 ralink,gpio-base = <40>;
159 ralink,register-map = [ 00 04 08 0c
160 10 14 18 1c
161 20 24 ];
162
163 status = "disabled";
164 };
165
166 gpio3: gpio@688 {
167 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
168 reg = <0x688 0x24>;
169
170 gpio-controller;
171 #gpio-cells = <2>;
172
173 ngpios = <24>;
174 ralink,gpio-base = <72>;
175 ralink,register-map = [ 00 04 08 0c
176 10 14 18 1c
177 20 24 ];
178
179 status = "disabled";
180 };
181
182 i2c@900 {
183 compatible = "ralink,rt2880-i2c";
184 reg = <0x900 0x100>;
185
186 clocks = <&sysc 6>;
187
188 resets = <&sysc 16>;
189 reset-names = "i2c";
190
191 #address-cells = <1>;
192 #size-cells = <0>;
193
194 status = "disabled";
195
196 pinctrl-names = "default";
197 pinctrl-0 = <&i2c_pins>;
198 };
199
200 i2s@a00 {
201 compatible = "ralink,rt3883-i2s";
202 reg = <0xa00 0x100>;
203
204 clocks = <&sysc 7>;
205
206 resets = <&sysc 17>;
207 reset-names = "i2s";
208
209 interrupt-parent = <&intc>;
210 interrupts = <10>;
211
212 txdma-req = <2>;
213 rxdma-req = <3>;
214
215 dmas = <&gdma 4>,
216 <&gdma 6>;
217 dma-names = "tx", "rx";
218
219 status = "disabled";
220 };
221
222 spi0: spi@b00 {
223 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
224 reg = <0xb00 0x40>;
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 clocks = <&sysc 8>;
229
230 resets = <&sysc 18>;
231 reset-names = "spi";
232
233 pinctrl-names = "default";
234 pinctrl-0 = <&spi_pins>;
235
236 status = "disabled";
237 };
238
239 spi1: spi@b40 {
240 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
241 reg = <0xb40 0x60>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244
245 clocks = <&sysc 9>;
246
247 resets = <&sysc 18>;
248 reset-names = "spi";
249
250 pinctrl-names = "default";
251 pinctrl-0 = <&spi_cs1>;
252
253 status = "disabled";
254 };
255
256 uartlite: uartlite@c00 {
257 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
258 reg = <0xc00 0x100>;
259
260 clocks = <&sysc 10>;
261
262 resets = <&sysc 19>;
263
264 interrupt-parent = <&intc>;
265 interrupts = <12>;
266
267 reg-shift = <2>;
268
269 pinctrl-names = "default";
270 pinctrl-0 = <&uartlite_pins>;
271 };
272
273 gdma: gdma@2800 {
274 compatible = "ralink,rt3883-gdma";
275 reg = <0x2800 0x800>;
276
277 resets = <&sysc 14>;
278 reset-names = "dma";
279
280 interrupt-parent = <&intc>;
281 interrupts = <7>;
282
283 #dma-cells = <1>;
284 #dma-channels = <16>;
285 #dma-requests = <16>;
286
287 status = "disabled";
288 };
289 };
290
291 pinctrl: pinctrl {
292 compatible = "ralink,rt2880-pinmux";
293
294 pinctrl-names = "default";
295 pinctrl-0 = <&state_default>;
296
297 state_default: pinctrl0 {
298 };
299
300 i2c_pins: i2c_pins {
301 i2c_pins {
302 groups = "i2c";
303 function = "i2c";
304 };
305 };
306
307 spi_pins: spi_pins {
308 spi_pins {
309 groups = "spi";
310 function = "spi";
311 };
312 };
313
314 spi_cs1: spi1 {
315 spi1 {
316 groups = "pci";
317 function = "pci-func";
318 };
319 };
320
321 uartlite_pins: uartlite {
322 uart {
323 groups = "uartlite";
324 function = "uartlite";
325 };
326 };
327
328 pci_pins: pci {
329 pci {
330 groups = "pci";
331 function = "pci-fnc";
332 };
333 };
334 };
335
336 ethernet: ethernet@10100000 {
337 compatible = "ralink,rt3883-eth";
338 #address-cells = <1>;
339 #size-cells = <0>;
340 reg = <0x10100000 0x10000>;
341
342 clocks = <&sysc 11>;
343
344 resets = <&sysc 21>;
345 reset-names = "fe";
346
347 interrupt-parent = <&cpuintc>;
348 interrupts = <5>;
349
350 port@0 {
351 compatible = "ralink,rt3883-port", "mediatek,eth-port";
352 reg = <0>;
353 };
354
355 mdio-bus {
356 #address-cells = <1>;
357 #size-cells = <0>;
358
359 status = "disabled";
360 };
361 };
362
363 pci: pci@10140000 {
364 compatible = "ralink,rt3883-pci";
365 reg = <0x10140000 0x20000>;
366 #address-cells = <1>;
367 #size-cells = <1>;
368 ranges; /* direct mapping */
369
370 pinctrl-names = "default";
371 pinctrl-0 = <&pci_pins>;
372
373 status = "disabled";
374
375 pciintc: interrupt-controller {
376 interrupt-controller;
377 #address-cells = <0>;
378 #interrupt-cells = <1>;
379
380 interrupt-parent = <&cpuintc>;
381 interrupts = <4>;
382 };
383
384 pci@0 {
385 #address-cells = <3>;
386 #size-cells = <2>;
387 #interrupt-cells = <1>;
388
389 device_type = "pci";
390
391 bus-range = <0 255>;
392 ranges = <
393 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
394 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
395 >;
396
397 interrupt-map-mask = <0xf800 0 0 7>;
398 interrupt-map = <
399 /* IDSEL 17 */
400 0x8800 0 0 1 &pciintc 18
401 0x8800 0 0 2 &pciintc 18
402 0x8800 0 0 3 &pciintc 18
403 0x8800 0 0 4 &pciintc 18
404 /* IDSEL 18 */
405 0x9000 0 0 1 &pciintc 19
406 0x9000 0 0 2 &pciintc 19
407 0x9000 0 0 3 &pciintc 19
408 0x9000 0 0 4 &pciintc 19
409 >;
410
411 pci1: pci@1 {
412 reg = <0x0800 0 0 0 0>;
413 device_type = "pci";
414 #interrupt-cells = <1>;
415 #address-cells = <3>;
416 #size-cells = <2>;
417
418 status = "disabled";
419
420 interrupt-map-mask = <0x0 0 0 0>;
421 interrupt-map = <0x0 0 0 0 &pciintc 20>;
422
423 bus-range = <1 255>;
424 ranges;
425 };
426
427 pci17: pci@11,0 {
428 reg = <0x8800 0 0 0 0>;
429 #interrupt-cells = <1>;
430 #address-cells = <3>;
431 #size-cells = <2>;
432
433 status = "disabled";
434 };
435
436 pci18: pci@12,0 {
437 reg = <0x9000 0 0 0 0>;
438 #interrupt-cells = <1>;
439 #address-cells = <3>;
440 #size-cells = <2>;
441
442 status = "disabled";
443 };
444 };
445 };
446
447 usbphy: usbphy {
448 compatible = "ralink,rt3352-usbphy";
449 #phy-cells = <0>;
450
451 ralink,sysctl = <&sysc>;
452 resets = <&sysc 22>, <&sysc 25>;
453 reset-names = "host", "device";
454 };
455
456 wmac: wmac@10180000 {
457 compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
458 reg = <0x10180000 0x40000>;
459
460 clocks = <&sysc 12>;
461
462 interrupt-parent = <&cpuintc>;
463 interrupts = <6>;
464
465 ralink,eeprom = "soc_wmac.eeprom";
466 };
467
468 ehci: ehci@101c0000 {
469 #address-cells = <1>;
470 #size-cells = <0>;
471 compatible = "generic-ehci";
472 reg = <0x101c0000 0x1000>;
473
474 phys = <&usbphy>;
475 phy-names = "usb";
476
477 interrupt-parent = <&intc>;
478 interrupts = <18>;
479
480 status = "disabled";
481
482 ehci_port1: port@1 {
483 reg = <1>;
484 #trigger-source-cells = <0>;
485 };
486 };
487
488 ohci: ohci@101c1000 {
489 #address-cells = <1>;
490 #size-cells = <0>;
491 compatible = "generic-ohci";
492 reg = <0x101c1000 0x1000>;
493
494 phys = <&usbphy>;
495 phy-names = "usb";
496
497 interrupt-parent = <&intc>;
498 interrupts = <18>;
499
500 status = "disabled";
501
502 ohci_port1: port@1 {
503 reg = <1>;
504 #trigger-source-cells = <0>;
505 };
506 };
507 };