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[openwrt/openwrt.git] / target / linux / ramips / patches-3.14 / 0020-MIPS-ralink-update-dts-files.patch
1 From 0c1e8630dca36c2d5a9bf98a5f1f8c15f75d0253 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 12 Aug 2013 18:11:33 +0200
4 Subject: [PATCH 20/57] MIPS: ralink: update dts files
5
6 Add the devicetree nodes needed to make the newly merged drivers work.
7
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 ---
10 arch/mips/ralink/dts/mt7620a.dtsi | 135 +++++++++++++++++++++++
11 arch/mips/ralink/dts/rt3050.dtsi | 156 ++++++++++++++++++++++++++
12 arch/mips/ralink/dts/rt3883.dtsi | 219 +++++++++++++++++++++++++++++++++++++
13 3 files changed, 510 insertions(+)
14
15 diff --git a/arch/mips/ralink/dts/mt7620a.dtsi b/arch/mips/ralink/dts/mt7620a.dtsi
16 index 08bf24f..df6cb79 100644
17 --- a/arch/mips/ralink/dts/mt7620a.dtsi
18 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
19 @@ -29,10 +29,32 @@
20 reg = <0x0 0x100>;
21 };
22
23 + timer@100 {
24 + compatible = "ralink,mt7620a-timer", "ralink,rt2880-timer";
25 + reg = <0x100 0x20>;
26 +
27 + interrupt-parent = <&intc>;
28 + interrupts = <1>;
29 + };
30 +
31 + watchdog@120 {
32 + compatible = "ralink,mt7620a-wdt", "ralink,rt2880-wdt";
33 + reg = <0x120 0x10>;
34 +
35 + resets = <&rstctrl 8>;
36 + reset-names = "wdt";
37 +
38 + interrupt-parent = <&intc>;
39 + interrupts = <1>;
40 + };
41 +
42 intc: intc@200 {
43 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
44 reg = <0x200 0x100>;
45
46 + resets = <&rstctrl 19>;
47 + reset-names = "intc";
48 +
49 interrupt-controller;
50 #interrupt-cells = <1>;
51
52 @@ -43,16 +65,129 @@
53 memc@300 {
54 compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
55 reg = <0x300 0x100>;
56 +
57 + resets = <&rstctrl 20>;
58 + reset-names = "mc";
59 +
60 + interrupt-parent = <&intc>;
61 + interrupts = <3>;
62 + };
63 +
64 + uart@500 {
65 + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
66 + reg = <0x500 0x100>;
67 +
68 + resets = <&rstctrl 12>;
69 + reset-names = "uart";
70 +
71 + interrupt-parent = <&intc>;
72 + interrupts = <5>;
73 +
74 + reg-shift = <2>;
75 +
76 + status = "disabled";
77 + };
78 +
79 + gpio0: gpio@600 {
80 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
81 + reg = <0x600 0x34>;
82 +
83 + resets = <&rstctrl 13>;
84 + reset-names = "pio";
85 +
86 + interrupt-parent = <&intc>;
87 + interrupts = <6>;
88 +
89 + gpio-controller;
90 + #gpio-cells = <2>;
91 +
92 + ralink,gpio-base = <0>;
93 + ralink,num-gpios = <24>;
94 + ralink,register-map = [ 00 04 08 0c
95 + 20 24 28 2c
96 + 30 34 ];
97 +
98 + status = "disabled";
99 + };
100 +
101 + gpio1: gpio@638 {
102 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
103 + reg = <0x638 0x24>;
104 +
105 + interrupt-parent = <&intc>;
106 + interrupts = <6>;
107 +
108 + gpio-controller;
109 + #gpio-cells = <2>;
110 +
111 + ralink,gpio-base = <24>;
112 + ralink,num-gpios = <16>;
113 + ralink,register-map = [ 00 04 08 0c
114 + 10 14 18 1c
115 + 20 24 ];
116 +
117 + status = "disabled";
118 + };
119 +
120 + gpio2: gpio@660 {
121 + compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
122 + reg = <0x660 0x24>;
123 +
124 + interrupt-parent = <&intc>;
125 + interrupts = <6>;
126 +
127 + gpio-controller;
128 + #gpio-cells = <2>;
129 +
130 + ralink,gpio-base = <40>;
131 + ralink,num-gpios = <32>;
132 + ralink,register-map = [ 00 04 08 0c
133 + 10 14 18 1c
134 + 20 24 ];
135 +
136 + status = "disabled";
137 + };
138 +
139 + spi@b00 {
140 + compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
141 + reg = <0xb00 0x100>;
142 +
143 + resets = <&rstctrl 18>;
144 + reset-names = "spi";
145 +
146 + #address-cells = <1>;
147 + #size-cells = <1>;
148 +
149 + status = "disabled";
150 };
151
152 uartlite@c00 {
153 compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
154 reg = <0xc00 0x100>;
155
156 + resets = <&rstctrl 19>;
157 + reset-names = "uartl";
158 +
159 interrupt-parent = <&intc>;
160 interrupts = <12>;
161
162 reg-shift = <2>;
163 };
164 +
165 + systick@d00 {
166 + compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
167 + reg = <0xd00 0x10>;
168 +
169 + resets = <&rstctrl 28>;
170 + reset-names = "intc";
171 +
172 + interrupt-parent = <&cpuintc>;
173 + interrupts = <7>;
174 + };
175 + };
176 +
177 + rstctrl: rstctrl {
178 + compatible = "ralink,mt7620a-reset", "ralink,rt2880-reset";
179 + #reset-cells = <1>;
180 };
181 };
182 diff --git a/arch/mips/ralink/dts/rt3050.dtsi b/arch/mips/ralink/dts/rt3050.dtsi
183 index e3203d4..49622d7 100644
184 --- a/arch/mips/ralink/dts/rt3050.dtsi
185 +++ b/arch/mips/ralink/dts/rt3050.dtsi
186 @@ -9,6 +9,10 @@
187 };
188 };
189
190 + chosen {
191 + bootargs = "console=ttyS0,57600";
192 + };
193 +
194 cpuintc: cpuintc@0 {
195 #address-cells = <0>;
196 #interrupt-cells = <1>;
197 @@ -29,10 +33,32 @@
198 reg = <0x0 0x100>;
199 };
200
201 + timer@100 {
202 + compatible = "ralink,rt3052-timer", "ralink,rt2880-timer";
203 + reg = <0x100 0x20>;
204 +
205 + interrupt-parent = <&intc>;
206 + interrupts = <1>;
207 + };
208 +
209 + watchdog@120 {
210 + compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
211 + reg = <0x120 0x10>;
212 +
213 + resets = <&rstctrl 8>;
214 + reset-names = "wdt";
215 +
216 + interrupt-parent = <&intc>;
217 + interrupts = <1>;
218 + };
219 +
220 intc: intc@200 {
221 compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
222 reg = <0x200 0x100>;
223
224 + resets = <&rstctrl 19>;
225 + reset-names = "intc";
226 +
227 interrupt-controller;
228 #interrupt-cells = <1>;
229
230 @@ -43,17 +69,144 @@
231 memc@300 {
232 compatible = "ralink,rt3052-memc", "ralink,rt3050-memc";
233 reg = <0x300 0x100>;
234 +
235 + resets = <&rstctrl 20>;
236 + reset-names = "mc";
237 +
238 + interrupt-parent = <&intc>;
239 + interrupts = <3>;
240 + };
241 +
242 + uart@500 {
243 + compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
244 + reg = <0x500 0x100>;
245 +
246 + resets = <&rstctrl 12>;
247 + reset-names = "uart";
248 +
249 + interrupt-parent = <&intc>;
250 + interrupts = <5>;
251 +
252 + reg-shift = <2>;
253 +
254 + status = "disabled";
255 + };
256 +
257 + gpio0: gpio@600 {
258 + compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
259 + reg = <0x600 0x34>;
260 +
261 + gpio-controller;
262 + #gpio-cells = <2>;
263 +
264 + ralink,gpio-base = <0>;
265 + ralink,num-gpios = <24>;
266 + ralink,register-map = [ 00 04 08 0c
267 + 20 24 28 2c
268 + 30 34 ];
269 +
270 + resets = <&rstctrl 13>;
271 + reset-names = "pio";
272 +
273 + interrupt-parent = <&intc>;
274 + interrupts = <6>;
275 +
276 + status = "disabled";
277 + };
278 +
279 + gpio1: gpio@638 {
280 + compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
281 + reg = <0x638 0x24>;
282 +
283 + gpio-controller;
284 + #gpio-cells = <2>;
285 +
286 + ralink,gpio-base = <24>;
287 + ralink,num-gpios = <16>;
288 + ralink,register-map = [ 00 04 08 0c
289 + 10 14 18 1c
290 + 20 24 ];
291 +
292 + status = "disabled";
293 + };
294 +
295 + gpio2: gpio@660 {
296 + compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
297 + reg = <0x660 0x24>;
298 +
299 + gpio-controller;
300 + #gpio-cells = <2>;
301 +
302 + ralink,gpio-base = <40>;
303 + ralink,num-gpios = <12>;
304 + ralink,register-map = [ 00 04 08 0c
305 + 10 14 18 1c
306 + 20 24 ];
307 +
308 + status = "disabled";
309 + };
310 +
311 + spi@b00 {
312 + compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
313 + reg = <0xb00 0x100>;
314 +
315 + resets = <&rstctrl 18>;
316 + reset-names = "spi";
317 +
318 + #address-cells = <1>;
319 + #size-cells = <0>;
320 +
321 + status = "disabled";
322 };
323
324 uartlite@c00 {
325 compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
326 reg = <0xc00 0x100>;
327
328 + resets = <&rstctrl 19>;
329 + reset-names = "uartl";
330 +
331 interrupt-parent = <&intc>;
332 interrupts = <12>;
333
334 reg-shift = <2>;
335 };
336 +
337 + };
338 +
339 + rstctrl: rstctrl {
340 + compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
341 + #reset-cells = <1>;
342 + };
343 +
344 + ethernet@10100000 {
345 + compatible = "ralink,rt3050-eth";
346 + reg = <0x10100000 10000>;
347 +
348 + interrupt-parent = <&cpuintc>;
349 + interrupts = <5>;
350 +
351 + status = "disabled";
352 + };
353 +
354 + esw@10110000 {
355 + compatible = "ralink,rt3050-esw";
356 + reg = <0x10110000 8000>;
357 +
358 + interrupt-parent = <&intc>;
359 + interrupts = <17>;
360 +
361 + status = "disabled";
362 + };
363 +
364 + wmac@10180000 {
365 + compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
366 + reg = <0x10180000 40000>;
367 +
368 + interrupt-parent = <&cpuintc>;
369 + interrupts = <6>;
370 +
371 + status = "disabled";
372 };
373
374 usb@101c0000 {
375 @@ -63,6 +216,9 @@
376 interrupt-parent = <&intc>;
377 interrupts = <18>;
378
379 + resets = <&rstctrl 22>;
380 + reset-names = "otg";
381 +
382 status = "disabled";
383 };
384 };
385 diff --git a/arch/mips/ralink/dts/rt3883.dtsi b/arch/mips/ralink/dts/rt3883.dtsi
386 index 3b131dd..4d092b1 100644
387 --- a/arch/mips/ralink/dts/rt3883.dtsi
388 +++ b/arch/mips/ralink/dts/rt3883.dtsi
389 @@ -29,10 +29,32 @@
390 reg = <0x0 0x100>;
391 };
392
393 + timer@100 {
394 + compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
395 + reg = <0x100 0x20>;
396 +
397 + interrupt-parent = <&intc>;
398 + interrupts = <1>;
399 + };
400 +
401 + watchdog@120 {
402 + compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
403 + reg = <0x120 0x10>;
404 +
405 + resets = <&rstctrl 8>;
406 + reset-names = "wdt";
407 +
408 + interrupt-parent = <&intc>;
409 + interrupts = <1>;
410 + };
411 +
412 intc: intc@200 {
413 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
414 reg = <0x200 0x100>;
415
416 + resets = <&rstctrl 19>;
417 + reset-names = "intc";
418 +
419 interrupt-controller;
420 #interrupt-cells = <1>;
421
422 @@ -43,16 +65,213 @@
423 memc@300 {
424 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
425 reg = <0x300 0x100>;
426 +
427 + resets = <&rstctrl 20>;
428 + reset-names = "mc";
429 +
430 + interrupt-parent = <&intc>;
431 + interrupts = <3>;
432 + };
433 +
434 + uart@500 {
435 + compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
436 + reg = <0x500 0x100>;
437 +
438 + resets = <&rstctrl 12>;
439 + reset-names = "uart";
440 +
441 + interrupt-parent = <&intc>;
442 + interrupts = <5>;
443 +
444 + reg-shift = <2>;
445 +
446 + status = "disabled";
447 + };
448 +
449 + gpio0: gpio@600 {
450 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
451 + reg = <0x600 0x34>;
452 +
453 + resets = <&rstctrl 13>;
454 + reset-names = "pio";
455 +
456 + interrupt-parent = <&intc>;
457 + interrupts = <6>;
458 +
459 + gpio-controller;
460 + #gpio-cells = <2>;
461 +
462 + ralink,gpio-base = <0>;
463 + ralink,num-gpios = <24>;
464 + ralink,register-map = [ 00 04 08 0c
465 + 20 24 28 2c
466 + 30 34 ];
467 +
468 + status = "disabled";
469 + };
470 +
471 + gpio1: gpio@638 {
472 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
473 + reg = <0x638 0x24>;
474 +
475 + gpio-controller;
476 + #gpio-cells = <2>;
477 +
478 + ralink,gpio-base = <24>;
479 + ralink,num-gpios = <16>;
480 + ralink,register-map = [ 00 04 08 0c
481 + 10 14 18 1c
482 + 20 24 ];
483 +
484 + status = "disabled";
485 + };
486 +
487 + gpio2: gpio@660 {
488 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
489 + reg = <0x660 0x24>;
490 +
491 + gpio-controller;
492 + #gpio-cells = <2>;
493 +
494 + ralink,gpio-base = <40>;
495 + ralink,num-gpios = <32>;
496 + ralink,register-map = [ 00 04 08 0c
497 + 10 14 18 1c
498 + 20 24 ];
499 +
500 + status = "disabled";
501 + };
502 +
503 + gpio3: gpio@688 {
504 + compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
505 + reg = <0x688 0x24>;
506 +
507 + gpio-controller;
508 + #gpio-cells = <2>;
509 +
510 + ralink,gpio-base = <72>;
511 + ralink,num-gpios = <24>;
512 + ralink,register-map = [ 00 04 08 0c
513 + 10 14 18 1c
514 + 20 24 ];
515 +
516 + status = "disabled";
517 + };
518 +
519 + spi0: spi@b00 {
520 + compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
521 + reg = <0xb00 0x100>;
522 + #address-cells = <1>;
523 + #size-cells = <0>;
524 +
525 + resets = <&rstctrl 18>;
526 + reset-names = "spi";
527 +
528 + status = "disabled";
529 };
530
531 uartlite@c00 {
532 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
533 reg = <0xc00 0x100>;
534
535 + resets = <&rstctrl 19>;
536 + reset-names = "uartl";
537 +
538 interrupt-parent = <&intc>;
539 interrupts = <12>;
540
541 reg-shift = <2>;
542 };
543 };
544 +
545 + rstctrl: rstctrl {
546 + compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
547 + #reset-cells = <1>;
548 + };
549 +
550 + pci@10140000 {
551 + compatible = "ralink,rt3883-pci";
552 + reg = <0x10140000 0x20000>;
553 + #address-cells = <1>;
554 + #size-cells = <1>;
555 + ranges; /* direct mapping */
556 +
557 + status = "disabled";
558 +
559 + pciintc: interrupt-controller {
560 + interrupt-controller;
561 + #address-cells = <0>;
562 + #interrupt-cells = <1>;
563 +
564 + interrupt-parent = <&cpuintc>;
565 + interrupts = <4>;
566 + };
567 +
568 + host-bridge {
569 + #address-cells = <3>;
570 + #size-cells = <2>;
571 + #interrupt-cells = <1>;
572 +
573 + device_type = "pci";
574 +
575 + bus-range = <0 255>;
576 + ranges = <
577 + 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
578 + 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
579 + >;
580 +
581 + interrupt-map-mask = <0xf800 0 0 7>;
582 + interrupt-map = <
583 + /* IDSEL 17 */
584 + 0x8800 0 0 1 &pciintc 18
585 + 0x8800 0 0 2 &pciintc 18
586 + 0x8800 0 0 3 &pciintc 18
587 + 0x8800 0 0 4 &pciintc 18
588 + /* IDSEL 18 */
589 + 0x9000 0 0 1 &pciintc 19
590 + 0x9000 0 0 2 &pciintc 19
591 + 0x9000 0 0 3 &pciintc 19
592 + 0x9000 0 0 4 &pciintc 19
593 + >;
594 +
595 + pci-bridge@1 {
596 + reg = <0x0800 0 0 0 0>;
597 + device_type = "pci";
598 + #interrupt-cells = <1>;
599 + #address-cells = <3>;
600 + #size-cells = <2>;
601 +
602 + status = "disabled";
603 +
604 + ralink,pci-slot = <1>;
605 +
606 + interrupt-map-mask = <0x0 0 0 0>;
607 + interrupt-map = <0x0 0 0 0 &pciintc 20>;
608 + };
609 +
610 + pci-slot@17 {
611 + reg = <0x8800 0 0 0 0>;
612 + device_type = "pci";
613 + #interrupt-cells = <1>;
614 + #address-cells = <3>;
615 + #size-cells = <2>;
616 +
617 + ralink,pci-slot = <17>;
618 +
619 + status = "disabled";
620 + };
621 +
622 + pci-slot@18 {
623 + reg = <0x9000 0 0 0 0>;
624 + device_type = "pci";
625 + #interrupt-cells = <1>;
626 + #address-cells = <3>;
627 + #size-cells = <2>;
628 +
629 + ralink,pci-slot = <18>;
630 +
631 + status = "disabled";
632 + };
633 + };
634 + };
635 };
636 --
637 1.7.10.4
638
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