target/linux/ramips/patches-4.3/0023-arch-mips-ralink-unify-soc-id.patch

   1 From 4ede4fbb485d0a88839df1f02371fc00755db636 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 7 Dec 2015 17:31:41 +0100
   4 Subject: [PATCH 23/53] arch: mips: ralink: unify soc id
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/mt7620.c |   19 ++++++++-----------
   9  1 file changed, 8 insertions(+), 11 deletions(-)
  10
  11 --- a/arch/mips/ralink/mt7620.c
  12 +++ b/arch/mips/ralink/mt7620.c
  13 @@ -37,9 +37,6 @@
  14  #define PMU1_CFG               0x8C
  15  #define DIG_SW_SEL             BIT(25)
  16
  17 -/* is this a MT7620 or a MT7628 */
  18 -enum mt762x_soc_type mt762x_soc;
  19 -
  20  /* clock scaling */
  21  #define CLKCFG_FDIV_MASK       0x1f00
  22  #define CLKCFG_FDIV_USB_VAL    0x0300
  23 @@ -410,7 +407,7 @@ void __init ralink_clk_init(void)
  24  #define RINT(x)                ((x) / 1000000)
  25  #define RFRAC(x)       (((x) / 1000) % 1000)
  26
  27 -       if (mt762x_soc == MT762X_SOC_MT7628AN || mt762x_soc == MT762X_SOC_MT7688) {
  28 +       if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688) {
  29                 if (xtal_rate == MHZ(40))
  30                         cpu_rate = MHZ(580);
  31                 else
  32 @@ -455,7 +452,7 @@ void __init ralink_clk_init(void)
  33         ralink_clk_add("10180000.wmac", xtal_rate);
  34
  35         if (IS_ENABLED(CONFIG_USB) &&
  36 -               (mt762x_soc == MT762X_SOC_MT7620A || mt762x_soc == MT762X_SOC_MT7620N)) {
  37 +               (ralink_soc == MT762X_SOC_MT7620A || ralink_soc == MT762X_SOC_MT7620N)) {
  38                 /*
  39                  * When the CPU goes into sleep mode, the BUS clock will be too low for
  40                  * USB to function properly
  41 @@ -543,11 +540,11 @@ void prom_soc_init(struct ralink_soc_inf
  42
  43         if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {
  44                 if (bga) {
  45 -                       mt762x_soc = MT762X_SOC_MT7620A;
  46 +                       ralink_soc = MT762X_SOC_MT7620A;
  47                         name = "MT7620A";
  48                         soc_info->compatible = "ralink,mt7620a-soc";
  49                 } else {
  50 -                       mt762x_soc = MT762X_SOC_MT7620N;
  51 +                       ralink_soc = MT762X_SOC_MT7620N;
  52                         name = "MT7620N";
  53                         soc_info->compatible = "ralink,mt7620n-soc";
  54                 }
  55 @@ -555,10 +552,10 @@ void prom_soc_init(struct ralink_soc_inf
  56                 u32 efuse = __raw_readl(sysc + SYSC_REG_EFUSE_CFG);
  57
  58                 if (efuse & EFUSE_MT7688) {
  59 -                       mt762x_soc = MT762X_SOC_MT7688;
  60 +                       ralink_soc = MT762X_SOC_MT7688;
  61                         name = "MT7688";
  62                 } else {
  63 -                       mt762x_soc = MT762X_SOC_MT7628AN;
  64 +                       ralink_soc = MT762X_SOC_MT7628AN;
  65                         name = "MT7628AN";
  66                 }
  67                 soc_info->compatible = "ralink,mt7628an-soc";
  68 @@ -580,7 +577,7 @@ void prom_soc_init(struct ralink_soc_inf
  69                 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
  70
  71         soc_info->mem_base = MT7620_DRAM_BASE;
  72 -       if (mt762x_soc == MT762X_SOC_MT7628AN)
  73 +       if (ralink_soc == MT762X_SOC_MT7628AN)
  74                 mt7628_dram_init(soc_info);
  75         else
  76                 mt7620_dram_init(soc_info);
  77 @@ -593,7 +590,7 @@ void prom_soc_init(struct ralink_soc_inf
  78         pr_info("Digital PMU set to %s control\n",
  79                 (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
  80
  81 -       if (mt762x_soc == MT762X_SOC_MT7628AN || mt762x_soc == MT762X_SOC_MT7688)
  82 +       if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
  83                 rt2880_pinmux_data = mt7628an_pinmux_data;
  84         else
  85                 rt2880_pinmux_data = mt7620a_pinmux_data;