target/linux/ramips/patches-5.4/301-MIPS-ralink-mt7621-introduce-soc_device-initializati.patch

   1 From f798b7588bd7397bbab958281ca6c88d08714941 Mon Sep 17 00:00:00 2001
   2 From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
   3 Date: Thu, 12 Mar 2020 12:29:15 +0100
   4 Subject: [PATCH] MIPS: ralink: mt7621: introduce 'soc_device' initialization
   5
   6 mt7621 SoC has its own 'ralink_soc_info' structure with some
   7 information about the soc itself. Pcie controller and pcie phy
   8 drivers for this soc which are still in staging git tree make uses
   9 of 'soc_device_attribute' looking for revision 'E2' in order to
  10 know if reset lines are or not inverted. This way of doing things
  11 seems to be necessary in order to make things clean and properly.
  12 Hence, introduce this 'soc_device' to be able to properly use those
  13 attributes in drivers. Also set 'data' pointer points to the struct
  14 'ralink_soc_info' to be able to export also current soc information
  15 using this mechanism.
  16
  17 Cc: Paul Burton <paul.burton@mips.com>
  18 Cc: ralf@linux-mips.org
  19 Cc: jhogan@kernel.org
  20 Cc: john@phrozen.org
  21 Cc: NeilBrown <neil@brown.name>
  22 Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  23 Cc: linux-mips@vger.kernel.org
  24
  25 Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
  26 Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
  27 ---
  28  arch/mips/ralink/mt7621.c | 32 +++++++++++++++++++++++++++++++-
  29  1 file changed, 31 insertions(+), 1 deletion(-)
  30
  31 --- a/arch/mips/ralink/mt7621.c
  32 +++ b/arch/mips/ralink/mt7621.c
  33 @@ -7,6 +7,8 @@
  34
  35  #include <linux/kernel.h>
  36  #include <linux/init.h>
  37 +#include <linux/slab.h>
  38 +#include <linux/sys_soc.h>
  39  #include <linux/jiffies.h>
  40  #include <linux/clk.h>
  41  #include <linux/clkdev.h>
  42 @@ -294,6 +296,33 @@ static int udelay_recal(void)
  43  }
  44  device_initcall(udelay_recal);
  45
  46 +static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
  47 +{
  48 +       struct soc_device *soc_dev;
  49 +       struct soc_device_attribute *soc_dev_attr;
  50 +
  51 +       soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  52 +       if (!soc_dev_attr)
  53 +               return;
  54 +
  55 +       soc_dev_attr->soc_id = "mt7621";
  56 +       soc_dev_attr->family = "Ralink";
  57 +
  58 +       if (((rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK) == 1 &&
  59 +           (rev & CHIP_REV_ECO_MASK) == 1)
  60 +               soc_dev_attr->revision = "E2";
  61 +       else
  62 +               soc_dev_attr->revision = "E1";
  63 +
  64 +       soc_dev_attr->data = soc_info;
  65 +
  66 +       soc_dev = soc_device_register(soc_dev_attr);
  67 +       if (IS_ERR(soc_dev)) {
  68 +               kfree(soc_dev_attr);
  69 +               return;
  70 +       }
  71 +}
  72 +
  73  void prom_soc_init(struct ralink_soc_info *soc_info)
  74  {
  75         void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
  76 @@ -345,11 +374,12 @@ void prom_soc_init(struct ralink_soc_inf
  77         soc_info->mem_detect = mt7621_memory_detect;
  78         rt2880_pinmux_data = mt7621_pinmux_data;
  79
  80 -
  81         if (!register_cps_smp_ops())
  82                 return;
  83         if (!register_cmp_smp_ops())
  84                 return;
  85         if (!register_vsmp_smp_ops())
  86                 return;
  87 +
  88 +       soc_dev_init(soc_info, rev);
  89  }