target/linux/sunxi/patches-5.4/441-arm64-dts-add-PWM-node.patch

   1 From: Jernej Skrabec <jernej.skrabec@siol.net>
   2
   3 Allwinner H6 PWM is similar to that in A20 except that it has additional
   4 bus clock and reset line.
   5
   6 Note that first PWM channel is connected to output pin and second
   7 channel is used internally, as a clock source to AC200 co-packaged chip.
   8 This means that any combination of these two channels can be used and
   9 thus it doesn't make sense to add pinctrl nodes at this point.
  10
  11 Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
  12 Signed-off-by: Clément Péron <peron.clem@gmail.com>
  13 ---
  14  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 10 ++++++++++
  15  1 file changed, 10 insertions(+)
  16
  17 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
  18 +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
  19 @@ -231,6 +231,16 @@
  20                         status = "disabled";
  21                 };
  22
  23 +               pwm: pwm@300a000 {
  24 +                       compatible = "allwinner,sun50i-h6-pwm";
  25 +                       reg = <0x0300a000 0x400>;
  26 +                       clocks = <&osc24M>, <&ccu CLK_BUS_PWM>;
  27 +                       clock-names = "mod", "bus";
  28 +                       resets = <&ccu RST_BUS_PWM>;
  29 +                       #pwm-cells = <3>;
  30 +                       status = "disabled";
  31 +               };
  32 +
  33                 pio: pinctrl@300b000 {
  34                         compatible = "allwinner,sun50i-h6-pinctrl";
  35                         reg = <0x0300b000 0x400>;