ag71xx: fix wrong register definition issue

[openwrt/openwrt.git] / target / linux / ath79 / files / drivers / net / ethernet / atheros / ag71xx / ag71xx_main.c

diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 8f95210e0f8c370e23654603177a7d919056b087..8a5cd3bcde97ef6a4c79cd2952f044bb98d16b37 100644 (file)
--- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -407,11 +407,11 @@ static void ag71xx_dma_reset(struct ag71xx *ag)
                         FIFO_CFG4_VT)
 
 #define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \
-                        FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \
-                        FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \
-                        FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \
-                        FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \
-                        FIFO_CFG5_17 | FIFO_CFG5_SF)
+                        FIFO_CFG5_CE | FIFO_CFG5_LM | FIFO_CFG5_LO | \
+                        FIFO_CFG5_OK | FIFO_CFG5_MC | FIFO_CFG5_BC | \
+                        FIFO_CFG5_DR | FIFO_CFG5_CF | FIFO_CFG5_UO | \
+                        FIFO_CFG5_VT | FIFO_CFG5_LE | FIFO_CFG5_FT | \
+                        FIFO_CFG5_UC | FIFO_CFG5_SF)
 
 static void ag71xx_hw_stop(struct ag71xx *ag)
 {