ar71xx: enable GPIO support for the AR934x SoCs
authorGabor Juhos <juhosg@openwrt.org>
Thu, 7 Apr 2011 20:53:00 +0000 (20:53 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Thu, 7 Apr 2011 20:53:00 +0000 (20:53 +0000)
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com>
SVN-Revision: 26513

target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h

index cdb614bbe1e50081e0cb7e45d54b855fbcb65a15..0ee68470036f0595c9bb3477dfd56c4ee5a257f2 100644 (file)
@@ -172,6 +172,12 @@ void __init ar71xx_gpio_init(void)
                ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT;
                break;
 
+       case AR71XX_SOC_AR9341:
+       case AR71XX_SOC_AR9342:
+       case AR71XX_SOC_AR9344:
+               ar71xx_gpio_chip.ngpio = AR934X_GPIO_COUNT;
+               break;
+
        default:
                BUG();
        }
index ab00d19e189213dc36929948b55b0a85dfc653f0..e671f58ed7c16628dd152892af7ea49d99c07055 100644 (file)
@@ -427,6 +427,12 @@ static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
 
 #define AR91XX_GPIO_COUNT      22
 
+#define AR934X_GPIO_FUNC_SPI_CS_1_EN   BIT(14)
+#define AR934X_GPIO_FUNC_SPI_CS_0_EN   BIT(13)
+
+#define AR934X_GPIO_COUNT              32
+#define AR934X_GPIO_FUNC_DDR_DQOE_EN   BIT(17)
+
 extern void __iomem *ar71xx_gpio_base;
 
 static inline void ar71xx_gpio_wr(unsigned reg, u32 value)