projects / openwrt / openwrt.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 7963782)
ralink: update pcie driver to load ranges from dts
authorJohn Crispin <john@openwrt.org>
Fri, 14 Nov 2014 16:53:07 +0000 (16:53 +0000)
committerJohn Crispin <john@openwrt.org>
Fri, 14 Nov 2014 16:53:07 +0000 (16:53 +0000)
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 43249

target/linux/ramips/dts/mt7620a.dtsi patch | blob | history
target/linux/ramips/dts/mt7621.dtsi patch | blob | history
target/linux/ramips/dts/mt7628an.dtsi patch | blob | history
target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch patch | blob | history

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 37b65600ef8fbc6e8496baa6d63b73d53e9bdb6e..4e116e0ebe0136b8511b30be54eac01262a01acb 100644 (file)
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -443,6 +443,14 @@
                interrupt-parent = <&cpuintc>;
                interrupts = <4>;
 
+               device_type = "pci";
+
+               bus-range = <0 255>;
+               ranges = <
+                       0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
+                       0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
+               >;
+
                status = "disabled";
 
                pcie-bridge {
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 859749cce4f8485bbc2d4e4d509f0ad65ca4ae21..7130b67409452ea8972690cdf5bdb8b4af09da0d 100644 (file)
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -92,8 +92,8 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
 
-/*                     pinctrl-names = "default";
-                       pinctrl-0 = <&spi_pins>;*/
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&spi_pins>;
 
                        m25p80@0 {
                                #address-cells = <1>;
@@ -136,6 +136,84 @@
                };
        };
 
+       pinctrl {
+               compatible = "ralink,rt2880-pinmux";
+               pinctrl-names = "default";
+               pinctrl-0 = <&state_default>;
+               state_default: pinctrl0 {
+               };
+               spi_pins: spi {
+                       spi {
+                               ralink,group = "spi";
+                               ralink,function = "spi";
+                       };
+               };
+               i2c_pins: i2c {
+                       i2c {
+                               lantiq,group = "i2c";
+                               lantiq,function = "i2c";
+                       };
+               };
+               uart1_pins: uart1 {
+                       uart1 {
+                               ralink,group = "uart1";
+                               ralink,function = "uart";
+                       };
+               };
+               uart2_pins: uart2 {
+                       uart2 {
+                               ralink,group = "uart2";
+                               ralink,function = "uart";
+                       };
+               };
+               uart3_pins: uart3 {
+                       uart3 {
+                               ralink,group = "uart3";
+                               ralink,function = "uart";
+                       };
+               };
+               rgmii1_pins: rgmii1 {
+                       rgmii1 {
+                               ralink,group = "rgmii1";
+                               ralink,function = "rgmii";
+                       };
+               };
+               rgmii2_pins: rgmii2 {
+                       rgmii2 {
+                               ralink,group = "rgmii2";
+                               ralink,function = "rgmii";
+                       };
+               };
+               mdio_pins: mdio {
+                       mdio {
+                               ralink,group = "mdio";
+                               ralink,function = "mdio";
+                       };
+               };
+               pcie_pins: pcie {
+                       pcie {
+                               ralink,group = "pcie";
+                               ralink,function = "pcie rst";
+                       };
+               };
+               nand_pins: nand {
+                       spi-nand {
+                               ralink,group = "spi";
+                               ralink,function = "nand";
+                       };
+                       sdhci-nand {
+                               ralink,group = "sdhci";
+                               ralink,function = "nand";
+                       };
+               };
+               sdhci_pins: sdhci {
+                       sdhci {
+                               ralink,group = "sdhci";
+                               ralink,function = "sdhci";
+                       };
+               };
+       };
+
        rstctrl: rstctrl {
                compatible = "ralink,rt2880-reset";
                #reset-cells = <1>;
@@ -150,7 +228,7 @@
        };
 
        xhci@1E1C0000 {
-               compatible = "xhci-platform1";
+               compatible = "xhci-platform";
                reg = <0x1E1C0000 4000>;
 
                interrupt-parent = <&gic>;
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index f0cb7b5f5056ca5cd4aecb28e7a63b778b3139e2..3223e162bd878d42dd3f93c8302c1fc69689f190 100644 (file)
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -213,6 +213,14 @@
 
                status = "disabled";
 
+               device_type = "pci";
+
+               bus-range = <0 255>;
+               ranges = <
+                       0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
+                       0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
+               >;
+
                pcie-bridge {
                        reg = <0x0000 0 0 0 0>;
 
diff --git a/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch b/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch
index 3b6b56dc46ec9502aadf49a145d90e539f23ccf0..91f5feac89b91e053cdecaddaa774af0d84c0bcd 100644 (file)
--- a/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch
+++ b/target/linux/ramips/patches-3.14/0032-PCI-MIPS-adds-mt7620a-pcie-driver.patch
@@ -6,28 +6,28 @@ Subject: [PATCH 32/57] PCI: MIPS: adds mt7620a pcie driver
 Signed-off-by: John Crispin <blogic@openwrt.org>
 ---
  arch/mips/pci/Makefile      |    1 +
- arch/mips/pci/pci-mt7620a.c |  363 +++++++++++++++++++++++++++++++++++++++++++
+ arch/mips/pci/pci-mt7620.c  |  363 +++++++++++++++++++++++++++++++++++++++++++
  arch/mips/ralink/Kconfig    |    1 +
  3 files changed, 365 insertions(+)
- create mode 100644 arch/mips/pci/pci-mt7620a.c
+ create mode 100644 arch/mips/pci/pci-mt7620.c
 
 Index: linux-3.14.18/arch/mips/pci/Makefile
 ===================================================================
---- linux-3.14.18.orig/arch/mips/pci/Makefile  2014-11-12 15:57:29.098559332 +0100
-+++ linux-3.14.18/arch/mips/pci/Makefile       2014-11-12 15:57:29.118560067 +0100
+--- linux-3.14.18.orig/arch/mips/pci/Makefile  2014-11-13 15:45:37.323344081 +0100
++++ linux-3.14.18/arch/mips/pci/Makefile       2014-11-13 15:45:37.331344390 +0100
 @@ -42,6 +42,7 @@
  obj-$(CONFIG_LANTIQ)          += fixup-lantiq.o
  obj-$(CONFIG_PCI_LANTIQ)      += pci-lantiq.o ops-lantiq.o
  obj-$(CONFIG_SOC_MT7621)      += pci-mt7621.o
-+obj-$(CONFIG_SOC_MT7620)      += pci-mt7620a.o
++obj-$(CONFIG_SOC_MT7620)      += pci-mt7620.o
  obj-$(CONFIG_SOC_RT2880)      += pci-rt2880.o
  obj-$(CONFIG_SOC_RT3883)      += pci-rt3883.o
  obj-$(CONFIG_TANBAC_TB0219)   += fixup-tb0219.o
-Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
+Index: linux-3.14.18/arch/mips/pci/pci-mt7620.c
 ===================================================================
 --- /dev/null  1970-01-01 00:00:00.000000000 +0000
-+++ linux-3.14.18/arch/mips/pci/pci-mt7620a.c  2014-11-12 17:24:58.339670670 +0100
-@@ -0,0 +1,405 @@
++++ linux-3.14.18/arch/mips/pci/pci-mt7620.c   2014-11-13 18:20:27.961225097 +0100
+@@ -0,0 +1,395 @@
 +/*
 + *  Ralink MT7620A SoC PCI support
 + *
@@ -228,19 +228,8 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
 +      .write  = pci_config_write,
 +};
 +
-+static struct resource mt7620_res_pci_mem1 = {
-+      .name   = "pci memory",
-+      .start  = RALINK_PCI_MM_MAP_BASE,
-+      .end    = (u32) ((RALINK_PCI_MM_MAP_BASE + (unsigned char *)0x0fffffff)),
-+      .flags  = IORESOURCE_MEM,
-+};
-+static struct resource mt7620_res_pci_io1 = {
-+      .name   = "pci io",
-+      .start  = RALINK_PCI_IO_MAP_BASE,
-+      .end    = (u32) ((RALINK_PCI_IO_MAP_BASE + (unsigned char *)0x0ffff)),
-+      .flags  = IORESOURCE_IO,
-+};
-+
++static struct resource mt7620_res_pci_mem1;
++static struct resource mt7620_res_pci_io1;
 +struct pci_controller mt7620_controller = {
 +      .pci_ops        = &mt7620_pci_ops,
 +      .mem_resource   = &mt7620_res_pci_mem1,
@@ -325,7 +314,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
 +      ioport_resource.end = ~0;
 +
 +      /* bring up the pci core */
-+      switch (mt762x_soc) {
++      switch (ralink_soc) {
 +      case MT762X_SOC_MT7620A:
 +              if (mt7620_pci_hw_init(pdev))
 +                      return -1;
@@ -350,7 +339,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
 +      if ((pcie_r32(RALINK_PCI0_STATUS) & 0x1) == 0) {
 +              reset_control_assert(rstpcie0);
 +              rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
-+              if (mt762x_soc == MT762X_SOC_MT7620A)
++              if (ralink_soc == MT762X_SOC_MT7620A)
 +                      rt_sysc_m32(LC_CKDRVPD_, PDRV_SW_SET, PPLL_DRV);
 +              dev_err(&pdev->dev, "PCIE0 no card, disable it(RST&CLK)\n");
 +              return -1;
@@ -393,6 +382,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
 +              dev_err(&dev->dev, "no irq found - bus=0x%x, slot = 0x%x\n", dev->bus->number, slot);
 +              return 0;
 +      }
++      dev_err(&dev->dev, "card - bus=0x%x, slot = 0x%x irq=%d\n", dev->bus->number, slot, irq);
 +
 +      pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x14);  //configure cache line size 0x14
 +      pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xFF);  //configure latency timer 0x10
@@ -435,8 +425,8 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
 +arch_initcall(mt7620_pci_init);
 Index: linux-3.14.18/arch/mips/ralink/Kconfig
 ===================================================================
---- linux-3.14.18.orig/arch/mips/ralink/Kconfig        2014-11-12 15:57:29.098559332 +0100
-+++ linux-3.14.18/arch/mips/ralink/Kconfig     2014-11-12 15:57:29.118560067 +0100
+--- linux-3.14.18.orig/arch/mips/ralink/Kconfig        2014-11-13 15:45:37.323344081 +0100
++++ linux-3.14.18/arch/mips/ralink/Kconfig     2014-11-13 15:45:37.331344390 +0100
 @@ -39,6 +39,7 @@
                bool "MT7620/8"
                select USB_ARCH_HAS_OHCI
@@ -447,8 +437,8 @@ Index: linux-3.14.18/arch/mips/ralink/Kconfig
                bool "MT7621"
 Index: linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h
 ===================================================================
---- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h      2014-11-12 15:57:29.082558746 +0100
-+++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h   2014-11-12 15:57:29.118560067 +0100
+--- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h      2014-11-13 15:45:37.311343619 +0100
++++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h   2014-11-13 18:20:31.721370073 +0100
 @@ -19,6 +19,7 @@
        MT762X_SOC_MT7620N,
        MT762X_SOC_MT7628AN,
OpenWrt Source Repository