--- a/drivers/dma/qcom/Kconfig
+++ b/drivers/dma/qcom/Kconfig
-@@ -27,3 +27,13 @@ config QCOM_HIDMA
+@@ -28,3 +28,13 @@ config QCOM_HIDMA
(user to kernel, kernel to kernel, etc.). It only supports
memcpy interface. The core is not intended for general
purpose slave DMA.
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
-@@ -294,7 +294,7 @@ static struct clk_rcg gsbi1_uart_src = {
+@@ -365,7 +365,7 @@ static struct clk_rcg gsbi1_uart_src = {
.parent_names = gcc_pxo_pll8,
.num_parents = 2,
.ops = &clk_rcg_ops,
},
},
};
-@@ -312,7 +312,7 @@ static struct clk_branch gsbi1_uart_clk
+@@ -383,7 +383,7 @@ static struct clk_branch gsbi1_uart_clk
},
.num_parents = 1,
.ops = &clk_branch_ops,
},
},
};
-@@ -890,6 +890,7 @@ static struct clk_branch gsbi1_h_clk = {
+@@ -961,6 +961,7 @@ static struct clk_branch gsbi1_h_clk = {
.hw.init = &(struct clk_init_data){
.name = "gsbi1_h_clk",
.ops = &clk_branch_ops,
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
---
- drivers/mtd/Kconfig | 7 ++
- drivers/mtd/Makefile | 1 +
- drivers/mtd/qcom_smem_part.c | 228 +++++++++++++++++++++++++++++++++++++++++++
+ drivers/mtd/parsers/Kconfig | 7 ++
+ drivers/mtd/parsers/Makefile | 1 +
+ drivers/mtd/parsers/qcom_smem_part.c | 228 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 236 insertions(+)
- create mode 100644 drivers/mtd/qcom_smem_part.c
+ create mode 100644 drivers/mtd/parsers/qcom_smem_part.c
---- a/drivers/mtd/Kconfig
-+++ b/drivers/mtd/Kconfig
-@@ -193,6 +193,13 @@ config MTD_MYLOADER_PARTS
- You will still need the parsing functions to be called by the driver
- for your particular device. It won't happen automatically.
+--- a/drivers/mtd/parsers/Kconfig
++++ b/drivers/mtd/parsers/Kconfig
+@@ -20,6 +20,13 @@ config MTD_BCM63XX_PARTS
+ This provides partition parsing for BCM63xx devices with CFE
+ bootloaders.
+config MTD_QCOM_SMEM_PARTS
+ tristate "QCOM SMEM partitioning support"
+ This provides partitions parser for QCOM devices using SMEM
+ such as IPQ806x.
+
- comment "User Modules And Translation Layers"
-
- #
+ config MTD_CMDLINE_PARTS
+ tristate "Command line partition table parsing"
+ depends on MTD
--- /dev/null
-+++ b/drivers/mtd/qcom_smem_part.c
++++ b/drivers/mtd/parsers/qcom_smem_part.c
@@ -0,0 +1,235 @@
+/*
+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ return 0;
+}
+
-+static int of_dev_node_match(struct device *dev, void *data)
++static int of_dev_node_match(struct device *dev, const void *data)
+{
+ return dev->of_node == data;
+}
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Mathieu Olivari <mathieu@codeaurora.org>");
+MODULE_DESCRIPTION("Parsing code for SMEM based partition tables");
---- a/drivers/mtd/Makefile
-+++ b/drivers/mtd/Makefile
-@@ -17,6 +17,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
- obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
- obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o
- obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
+--- a/drivers/mtd/parsers/Makefile
++++ b/drivers/mtd/parsers/Makefile
+@@ -3,6 +3,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.
+ obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o
+ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o
+ obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
+obj-$(CONFIG_MTD_QCOM_SMEM_PARTS) += qcom_smem_part.o
- obj-y += parsers/
-
- # 'Users' - code which presents functionality to userspace.
+ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
+ obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
+ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
-@@ -65,3 +65,15 @@ config PHY_QCOM_USB_HSIC
+@@ -91,3 +91,15 @@ config PHY_QCOM_USB_HSIC
select GENERIC_PHY
help
Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
-@@ -9,3 +9,4 @@ obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-
- obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
+@@ -10,3 +10,4 @@ obj-$(CONFIG_PHY_QCOM_UFS_14NM) += phy-
+ obj-$(CONFIG_PHY_QCOM_UFS_20NM) += phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o
obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o
+obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
-@@ -6,6 +6,7 @@ menuconfig ARCH_QCOM
+@@ -7,6 +7,7 @@ menuconfig ARCH_QCOM
select ARM_AMBA
select PINCTRL
select QCOM_SCM if SMP
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
-@@ -1623,6 +1623,75 @@ put_table:
+@@ -2103,6 +2103,75 @@ put_table:
}
/**
* @freq: OPP frequency to enable
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
-@@ -25,6 +25,7 @@ struct opp_table;
+@@ -22,6 +22,7 @@ struct opp_table;
enum dev_pm_opp_event {
OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE,
};
/**
-@@ -108,6 +109,10 @@ int dev_pm_opp_add(struct device *dev, u
- unsigned long u_volt);
+@@ -113,6 +114,10 @@ int dev_pm_opp_add(struct device *dev, u
void dev_pm_opp_remove(struct device *dev, unsigned long freq);
+ void dev_pm_opp_remove_all_dynamic(struct device *dev);
+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq,
+ unsigned long u_volt, unsigned long u_volt_min,
int dev_pm_opp_enable(struct device *dev, unsigned long freq);
int dev_pm_opp_disable(struct device *dev, unsigned long freq);
-@@ -208,6 +213,14 @@ static inline void dev_pm_opp_remove(str
+@@ -242,6 +247,14 @@ static inline void dev_pm_opp_remove_all
{
}
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
-@@ -125,6 +125,27 @@ unsigned long dev_pm_opp_get_freq(struct
+@@ -127,6 +127,27 @@ unsigned long dev_pm_opp_get_freq(struct
}
EXPORT_SYMBOL_GPL(dev_pm_opp_get_freq);
+EXPORT_SYMBOL_GPL(dev_pm_opp_get_regulator);
+
/**
- * dev_pm_opp_is_turbo() - Returns if opp is turbo OPP or not
- * @opp: opp for which turbo mode is being verified
+ * dev_pm_opp_get_level() - Gets the level corresponding to an available opp
+ * @opp: opp for which level value has to be returned for
--- a/include/linux/pm_opp.h
+++ b/include/linux/pm_opp.h
-@@ -85,6 +85,7 @@ void dev_pm_opp_put_opp_table(struct opp
+@@ -83,6 +83,7 @@ void dev_pm_opp_put_opp_table(struct opp
unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp);
unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp);
+struct regulator *dev_pm_opp_get_regulator(struct device *dev);
- bool dev_pm_opp_is_turbo(struct dev_pm_opp *opp);
+ unsigned int dev_pm_opp_get_level(struct dev_pm_opp *opp);
--- a/drivers/opp/core.c
+++ b/drivers/opp/core.c
-@@ -1663,6 +1663,7 @@ int dev_pm_opp_adjust_voltage(struct dev
+@@ -2143,6 +2143,7 @@ int dev_pm_opp_adjust_voltage(struct dev
struct opp_table *opp_table;
struct dev_pm_opp *tmp_opp, *opp = ERR_PTR(-ENODEV);
int r = 0;
/* Find the opp_table */
opp_table = _find_opp_table(dev);
-@@ -1692,8 +1693,17 @@ int dev_pm_opp_adjust_voltage(struct dev
+@@ -2172,8 +2173,17 @@ int dev_pm_opp_adjust_voltage(struct dev
goto adjust_unlock;
opp->supplies->u_volt = u_volt;
--- a/drivers/regulator/qcom_rpm-regulator.c
+++ b/drivers/regulator/qcom_rpm-regulator.c
-@@ -933,12 +933,21 @@ static const struct rpm_regulator_data r
+@@ -925,12 +925,21 @@ static const struct rpm_regulator_data r
{ }
};
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
-@@ -32,6 +32,9 @@ struct private_data {
+@@ -27,6 +27,9 @@ struct private_data {
+ struct opp_table *opp_table;
struct device *cpu_dev;
- struct thermal_cooling_device *cdev;
const char *reg_name;
+ struct notifier_block opp_nb;
+ struct mutex lock;
bool have_static_opps;
};
-@@ -47,12 +50,15 @@ static int set_target(struct cpufreq_pol
+@@ -42,12 +45,15 @@ static int set_target(struct cpufreq_pol
unsigned long freq = policy->freq_table[index].frequency;
int ret;
return ret;
}
-@@ -95,6 +101,39 @@ node_put:
+@@ -90,6 +96,39 @@ node_put:
return name;
}
static int resources_available(void)
{
struct device *cpu_dev;
-@@ -251,10 +290,14 @@ static int cpufreq_init(struct cpufreq_p
+@@ -246,10 +285,14 @@ static int cpufreq_init(struct cpufreq_p
__func__, ret);
}
}
priv->cpu_dev = cpu_dev;
-@@ -284,6 +327,8 @@ static int cpufreq_init(struct cpufreq_p
+@@ -281,6 +324,8 @@ static int cpufreq_init(struct cpufreq_p
out_free_cpufreq_table:
dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
-@@ -173,8 +173,10 @@ static int opp_notifier(struct notifier_
+@@ -178,8 +178,10 @@ static int opp_notifier(struct notifier_
ret = PTR_ERR(cpu_reg);
goto out;
}
+ drv_data->cpu_freq_threshold = 1000000000;
+ }
+
-+ drv_data->apps_fab_clk = devm_clk_get(&pdev->dev, "apps-fab-clk");
-+ apps_fab_clk = drv_data->apps_fab_clk;
++ apps_fab_clk = devm_clk_get(&pdev->dev, "apps-fab-clk");
+ ret = PTR_ERR_OR_ZERO(apps_fab_clk);
+ if (ret) {
+ /*
+ goto err;
+ }
+
-+ clk_set_rate(apps_fab_clk, drv_data->fab_freq_high);
+ clk_prepare_enable(apps_fab_clk);
++ clk_set_rate(apps_fab_clk, drv_data->fab_freq_high);
++ drv_data->apps_fab_clk = apps_fab_clk;
+
-+ drv_data->ddr_fab_clk = devm_clk_get(&pdev->dev, "ddr-fab-clk");
-+ ddr_fab_clk = drv_data->ddr_fab_clk;
++ ddr_fab_clk = devm_clk_get(&pdev->dev, "ddr-fab-clk");
+ ret = PTR_ERR_OR_ZERO(ddr_fab_clk);
+ if (ret) {
+ /*
+ goto err;
+ }
+
-+ clk_set_rate(ddr_fab_clk, drv_data->fab_freq_high);
+ clk_prepare_enable(ddr_fab_clk);
++ clk_set_rate(ddr_fab_clk, drv_data->fab_freq_high);
++ drv_data->ddr_fab_clk = ddr_fab_clk;
+
+ return 0;
+err:
+#endif
--- a/drivers/cpufreq/cpufreq-dt.c
+++ b/drivers/cpufreq/cpufreq-dt.c
-@@ -24,6 +24,7 @@
+@@ -20,6 +20,7 @@
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/thermal.h>
#include "cpufreq-dt.h"
-@@ -106,6 +107,13 @@ static int set_target(struct cpufreq_pol
+@@ -111,6 +112,13 @@ static int set_target(struct cpufreq_pol
}
}
}
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
-@@ -75,3 +75,10 @@ config ARM_MVEBU_V7_CPUIDLE
+@@ -86,3 +86,10 @@ config ARM_MVEBU_V7_CPUIDLE
depends on ARCH_MVEBU && !ARM64
help
Select this to enable cpuidle on Armada 370, 38x and XP processors.
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -331,7 +331,7 @@ config ARCH_MULTIPLATFORM
+@@ -318,7 +318,7 @@ config ARCH_MULTIPLATFORM
depends on MMU
select ARM_HAS_SG_CHAIN
select ARM_PATCH_PHYS_VIRT
select GENERIC_CLOCKEVENTS
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
-@@ -255,9 +255,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac
+@@ -258,9 +258,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac
else
MACHINE :=
endif
Signed-off-by: John Crispin <john@phrozen.org>
---
- drivers/mtd/qcom_smem_part.c | 4 ++++
+ drivers/mtd/parsers/qcom_smem_part.c | 4 ++++
1 file changed, 4 insertions(+)
---- a/drivers/mtd/qcom_smem_part.c
-+++ b/drivers/mtd/qcom_smem_part.c
+--- a/drivers/mtd/parsers/qcom_smem_part.c
++++ b/drivers/mtd/parsers/qcom_smem_part.c
@@ -189,6 +189,10 @@ static int parse_qcom_smem_partitions(st
m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz);
m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz);
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
-@@ -1233,6 +1233,8 @@ static struct clk_rcg prng_src = {
+@@ -1225,6 +1225,8 @@ static struct clk_rcg prng_src = {
.parent_map = gcc_pxo_pll8_map,
},
.clkr = {
"qcom,rpmcc-apq8064", "qcom,rpmcc"
"qcom,rpmcc-msm8996", "qcom,rpmcc"
+ "qcom,rpmcc-ipq806x", "qcom,rpmcc"
-
- - #clock-cells : shall contain 1
+ "qcom,rpmcc-msm8998", "qcom,rpmcc"
+ "qcom,rpmcc-qcs404", "qcom,rpmcc"
--- a/include/dt-bindings/clock/qcom,rpmcc.h
+++ b/include/dt-bindings/clock/qcom,rpmcc.h
-@@ -45,6 +45,10 @@
+@@ -37,6 +37,10 @@
#define RPM_XO_A0 27
#define RPM_XO_A1 28
#define RPM_XO_A2 29
#define RPM_SMD_XO_CLK_SRC 0
--- a/drivers/clk/qcom/clk-rpm.c
+++ b/drivers/clk/qcom/clk-rpm.c
-@@ -520,6 +520,16 @@ DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a0_
+@@ -512,6 +512,16 @@ DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a0_
DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a1_clk, xo_a1_a_clk, 24);
DEFINE_CLK_RPM_XO_BUFFER(apq8064, xo_a2_clk, xo_a2_a_clk, 28);
static struct clk_rpm *apq8064_clks[] = {
[RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk,
[RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk,
-@@ -546,15 +556,40 @@ static struct clk_rpm *apq8064_clks[] =
+@@ -538,15 +548,40 @@ static struct clk_rpm *apq8064_clks[] =
[RPM_XO_A2] = &apq8064_xo_a2_clk,
};
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
-@@ -64,7 +64,7 @@ KBUILD_CFLAGS += $(call cc-option,-fno-i
+@@ -67,7 +67,7 @@ KBUILD_CFLAGS += $(call cc-option,-fno-i
# macro, but instead defines a whole series of macros which makes
# testing for a specific architecture or later rather impossible.
arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
-@@ -1926,6 +1926,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+@@ -1825,6 +1825,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
The command-line arguments provided by the boot loader will be
appended to the the device tree bootargs property.
}
*ptr = '\0';
-@@ -148,7 +212,9 @@ int atags_to_fdt(void *atag_list, void *
+@@ -166,7 +230,9 @@ int atags_to_fdt(void *atag_list, void *
else
setprop_string(fdt, "/chosen", "bootargs",
atag->u.cmdline.cmdline);
if (memcount >= sizeof(mem_reg_property)/4)
continue;
if (!atag->u.mem.size)
-@@ -187,6 +253,10 @@ int atags_to_fdt(void *atag_list, void *
+@@ -210,6 +276,10 @@ int atags_to_fdt(void *atag_list, void *
setprop(fdt, "/memory", "reg", mem_reg_property,
4 * memcount * memsize);
}
}
--- a/init/main.c
+++ b/init/main.c
-@@ -102,6 +102,10 @@
+@@ -103,6 +103,10 @@
#define CREATE_TRACE_POINTS
#include <trace/events/initcall.h>
static int kernel_init(void *);
extern void init_IRQ(void);
-@@ -593,6 +597,18 @@ asmlinkage __visible void __init start_k
+@@ -632,6 +636,18 @@ asmlinkage __visible void __init start_k
pr_notice("Kernel command line: %s\n", boot_command_line);
/* parameters may set static keys */
jump_label_init();
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
-@@ -791,6 +791,18 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -843,6 +843,18 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
qcom-ipq8064-ap148.dtb \
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
-@@ -219,6 +219,9 @@ static int __init qcom_cpuidle_init(stru
- cpumask_t mask;
- bool use_scm_power_down = false;
+@@ -214,6 +214,9 @@ static int __init qcom_cpuidle_init(stru
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
+ if (!qcom_scm_is_available())
+ return -EPROBE_DEFER;
/* Set the Max TLP size to 2K, instead of using default of 4K */
-@@ -1367,6 +1375,8 @@ static int qcom_pcie_probe(struct platfo
+@@ -1340,6 +1348,8 @@ static int qcom_pcie_probe(struct platfo
struct dw_pcie *pci;
struct qcom_pcie *pcie;
int ret;
pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
if (!pcie)
-@@ -1397,6 +1407,9 @@ static int qcom_pcie_probe(struct platfo
+@@ -1370,6 +1380,9 @@ static int qcom_pcie_probe(struct platfo
goto err_pm_runtime_put;
}
#define QCOM_PCIE_2_1_0_MAX_SUPPLY 3
struct qcom_pcie_resources_2_1_0 {
struct clk *iface_clk;
-@@ -1475,6 +1483,35 @@ err_pm_runtime_put:
+@@ -1448,6 +1456,35 @@ err_pm_runtime_put:
return ret;
}
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
-@@ -609,6 +609,9 @@ static const struct of_device_id qcom_sc
- { .compatible = "qcom,scm-ipq4019",
- .data = NULL, /* no clocks */
+@@ -601,6 +601,7 @@ static const struct of_device_id qcom_sc
+ SCM_HAS_BUS_CLK)
},
-+ { .compatible = "qcom,scm-ipq806x",
-+ .data = NULL, /* no clocks */
-+ },
- { .compatible = "qcom,scm",
- .data = (void *)(SCM_HAS_CORE_CLK
- | SCM_HAS_IFACE_CLK
+ { .compatible = "qcom,scm-ipq4019" },
++ { .compatible = "qcom,scm-ipq806x" },
+ { .compatible = "qcom,scm-msm8660", .data = (void *) SCM_HAS_CORE_CLK },
+ { .compatible = "qcom,scm-msm8960", .data = (void *) SCM_HAS_CORE_CLK },
+ { .compatible = "qcom,scm-msm8916", .data = (void *)(SCM_HAS_CORE_CLK |
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
-@@ -30,7 +30,8 @@
+@@ -22,7 +22,8 @@
#include <linux/reboot.h>
#include <linux/pm.h>
#include <linux/log2.h>
#include "../core.h"
#include "../pinconf.h"
#include "pinctrl-msm.h"
-@@ -628,6 +629,9 @@ static void msm_gpio_irq_mask(struct irq
+@@ -706,6 +707,9 @@ static void msm_gpio_irq_mask(struct irq
const struct msm_pingroup *g;
unsigned long flags;
u32 val;
g = &pctrl->soc->groups[d->hwirq];
-@@ -732,11 +736,30 @@ static int msm_gpio_irq_set_type(struct
+@@ -819,6 +823,7 @@ static int msm_gpio_irq_set_type(struct
+ const struct msm_pingroup *g;
+ unsigned long flags;
+ u32 val;
++ int ret;
+
+ g = &pctrl->soc->groups[d->hwirq];
+
+@@ -832,11 +837,30 @@ static int msm_gpio_irq_set_type(struct
else
clear_bit(d->hwirq, pctrl->dual_edge_irqs);
-+ int ret = of_device_is_compatible(pctrl->dev->of_node,
++ ret = of_device_is_compatible(pctrl->dev->of_node,
+ "qcom,ipq8064-pinctrl");
/* Route interrupts to application cpu */
-- val = readl(pctrl->regs + g->intr_target_reg);
+- val = msm_readl_intr_target(pctrl, g);
- val &= ~(7 << g->intr_target_bit);
- val |= g->intr_target_kpss_val << g->intr_target_bit;
-- writel(val, pctrl->regs + g->intr_target_reg);
+- msm_writel_intr_target(val, pctrl, g);
+ if (!ret) {
-+ val = readl(pctrl->regs + g->intr_target_reg);
++ val = msm_readl_intr_target(pctrl, g);
+ val &= ~(7 << g->intr_target_bit);
+ val |= g->intr_target_kpss_val << g->intr_target_bit;
-+ writel(val, pctrl->regs + g->intr_target_reg);
++ msm_writel_intr_target(val, pctrl, g);
+ } else {
+ const __be32 *reg = of_get_property(pctrl->dev->of_node, "reg", NULL);
+ if (reg) {
--- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
-@@ -308,7 +308,7 @@ static const char * const gpio_groups[]
+@@ -299,7 +299,7 @@ static const char * const gpio_groups[]
};
static const char * const mdio_groups[] = {
};
static const char * const mi2s_groups[] = {
-@@ -412,8 +412,8 @@ static const char * const usb2_hsic_grou
+@@ -403,8 +403,8 @@ static const char * const usb2_hsic_grou
};
static const char * const rgmii2_groups[] = {
};
static const char * const sata_groups[] = {
-@@ -548,7 +548,7 @@ static const struct msm_function ipq8064
+@@ -539,7 +539,7 @@ static const struct msm_function ipq8064
static const struct msm_pingroup ipq8064_groups[] = {
PINGROUP(0, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(1, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(3, pcie1_rst, pcie1_prsnt, pdm, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(4, pcie1_pwren_n, pcie1_pwren, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(5, pcie1_clk_req, pcie1_pwrflt, NA, NA, NA, NA, NA, NA, NA, NA),
-@@ -612,7 +612,7 @@ static const struct msm_pingroup ipq8064
+@@ -603,7 +603,7 @@ static const struct msm_pingroup ipq8064
PINGROUP(63, pcie3_rst, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
PINGROUP(65, pcie3_clk_req, NA, NA, NA, NA, NA, NA, NA, NA, NA),
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -668,6 +668,7 @@
+@@ -671,6 +671,7 @@
reg = <0x800000 0x4000>;
gpio-controller;
Subject: SoC: add qualcomm syscon
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
-@@ -18,6 +18,7 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_st
- obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
+@@ -20,6 +20,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
obj-$(CONFIG_QCOM_SMSM) += smsm.o
+ obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
obj-$(CONFIG_QCOM_APR) += apr.o
obj-$(CONFIG_QCOM_SDM845_LLCC) += llcc-sdm845.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
-@@ -146,6 +146,13 @@ config QCOM_SMSM
- Say yes here to support the Qualcomm Shared Memory State Machine.
- The state machine is represented by bits in shared memory.
+@@ -183,6 +183,13 @@ config QCOM_SOCINFO
+ Say yes here to support the Qualcomm socinfo driver, providing
+ information about the SoC to user space.
+config QCOM_TCSR
+ tristate "QCOM Top Control and Status Registers"
+
config QCOM_WCNSS_CTRL
tristate "Qualcomm WCNSS control driver"
- depends on ARCH_QCOM
+ depends on ARCH_QCOM || COMPILE_TEST
--- /dev/null
+++ b/drivers/soc/qcom/qcom_tcsr.c
@@ -0,0 +1,64 @@
projects / openwrt / openwrt.git / commitdiff