target/linux/ar71xx/patches-4.14/343-MIPS-ath79-Fix-potentially-missed-IRQ-handling-durin.patch

   1 From 3fe7841bf5a582dc7fd198e5bf70162ea418a22a Mon Sep 17 00:00:00 2001
   2 From: Koen Vandeputte <koen.vandeputte@ncentric.com>
   3 Date: Wed, 11 Sep 2019 11:02:19 +0200
   4 Subject: [PATCH] MIPS: ath79: Fix potentially missed IRQ handling during
   5  dispatch
   6
   7 If both interrupts are set in the current implementation
   8 only the 1st will be handled and the 2nd will be skipped
   9 due to the "if else" condition.
  10
  11 Fix this by using the same approach as done for QCA955x
  12 just below it.
  13
  14 Fixes: fce5cc6e0ddc ("MIPS: ath79: add IRQ handling code for AR934X")
  15 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
  16 CC: Felix Fietkau <nbd@nbd.name>
  17 CC: Gabor Juhos <juhosg@freemail.hu>
  18 CC: James Hogan <jhogan@kernel.org>
  19 CC: Paul Burton <paul.burton@mips.com>
  20 CC: Ralf Baechle <ralf@linux-mips.org>
  21 CC: stable@vger.kernel.org # v3.2+
  22 ---
  23  arch/mips/ath79/irq.c | 12 +++++++++---
  24  1 file changed, 9 insertions(+), 3 deletions(-)
  25
  26 --- a/arch/mips/ath79/irq.c
  27 +++ b/arch/mips/ath79/irq.c
  28 @@ -32,15 +32,21 @@ static void ar934x_ip2_irq_dispatch(stru
  29         u32 status;
  30
  31         status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
  32 +       status &= AR934X_PCIE_WMAC_INT_PCIE_ALL | AR934X_PCIE_WMAC_INT_WMAC_ALL;
  33 +
  34 +       if (status == 0) {
  35 +               spurious_interrupt();
  36 +               return;
  37 +       }
  38
  39         if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
  40                 ath79_ddr_wb_flush(3);
  41                 generic_handle_irq(ATH79_IP2_IRQ(0));
  42 -       } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) {
  43 +       }
  44 +
  45 +       if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) {
  46                 ath79_ddr_wb_flush(4);
  47                 generic_handle_irq(ATH79_IP2_IRQ(1));
  48 -       } else {
  49 -               spurious_interrupt();
  50         }
  51  }
  52