target/linux/bcm27xx/patches-5.10/950-0092-net-lan78xx-Support-auto-downshift-to-100Mb-s.patch

   1 From cbc38ebf8ff6d01cd11270d99762d4216ff4237d Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.org>
   3 Date: Mon, 26 Nov 2018 19:46:58 +0000
   4 Subject: [PATCH] net: lan78xx: Support auto-downshift to 100Mb/s
   5
   6 Ethernet cables with faulty or missing pairs (specifically pairs C and
   7 D) allow auto-negotiation to 1000Mbs, but do not support the successful
   8 establishment of a link. Add a DT property, "microchip,downshift-after",
   9 to configure the number of auto-negotiation failures after which it
  10 falls back to 100Mbs. Valid values are 2, 3, 4, 5 and 0, where 0 means
  11 never downshift.
  12
  13 Signed-off-by: Phil Elwell <phil@raspberrypi.org>
  14 ---
  15  .../bindings/net/microchip,lan78xx.txt        |  3 +++
  16  drivers/net/phy/microchip.c                   | 27 +++++++++++++++++++
  17  include/linux/microchipphy.h                  |  8 ++++++
  18  3 files changed, 38 insertions(+)
  19
  20 --- a/Documentation/devicetree/bindings/net/microchip,lan78xx.txt
  21 +++ b/Documentation/devicetree/bindings/net/microchip,lan78xx.txt
  22 @@ -14,6 +14,9 @@ Optional properties of the embedded PHY:
  23  - microchip,led-modes: a 0..4 element vector, with each element configuring
  24    the operating mode of an LED. Omitted LEDs are turned off. Allowed values
  25    are defined in "include/dt-bindings/net/microchip-lan78xx.h".
  26 +- microchip,downshift-after: sets the number of failed auto-negotiation
  27 +  attempts after which the link is downgraded from 1000BASE-T. Should be one of
  28 +  2, 3, 4, 5 or 0, where 0 means never downshift.
  29
  30  Example:
  31
  32 --- a/drivers/net/phy/microchip.c
  33 +++ b/drivers/net/phy/microchip.c
  34 @@ -217,6 +217,7 @@ static int lan88xx_probe(struct phy_devi
  35         struct device *dev = &phydev->mdio.dev;
  36         struct lan88xx_priv *priv;
  37         u32 led_modes[4];
  38 +       u32 downshift_after = 0;
  39         int len;
  40
  41         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  42 @@ -246,6 +247,32 @@ static int lan88xx_probe(struct phy_devi
  43                 return -EINVAL;
  44         }
  45
  46 +       if (!of_property_read_u32(dev->of_node,
  47 +                                 "microchip,downshift-after",
  48 +                                 &downshift_after)) {
  49 +               u32 mask = LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK;
  50 +               u32 val= LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT;
  51 +
  52 +               switch (downshift_after) {
  53 +               case 2: val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2;
  54 +                       break;
  55 +               case 3: val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3;
  56 +                       break;
  57 +               case 4: val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4;
  58 +                       break;
  59 +               case 5: val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5;
  60 +                       break;
  61 +               case 0: // Disable completely
  62 +                       mask = LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT;
  63 +                       val = 0;
  64 +                       break;
  65 +               default:
  66 +                       return -EINVAL;
  67 +               }
  68 +               (void)phy_modify_paged(phydev, 1, LAN78XX_PHY_CTRL3,
  69 +                                      mask, val);
  70 +       }
  71 +
  72         /* these values can be used to identify internal PHY */
  73         priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID);
  74         priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV);
  75 --- a/include/linux/microchipphy.h
  76 +++ b/include/linux/microchipphy.h
  77 @@ -61,6 +61,14 @@
  78  /* Registers specific to the LAN7800/LAN7850 embedded phy */
  79  #define LAN78XX_PHY_LED_MODE_SELECT            (0x1D)
  80
  81 +#define LAN78XX_PHY_CTRL3                      (0x14)
  82 +#define LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT       (0x0010)
  83 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK  (0x000c)
  84 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2     (0x0000)
  85 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3     (0x0004)
  86 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4     (0x0008)
  87 +#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5     (0x000c)
  88 +
  89  /* DSP registers */
  90  #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG         (0x806A)
  91  #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_      (0x2000)