target/linux/bcm27xx/patches-5.10/950-0511-vc4-drm-Fix-source-offsets-with-DRM_FORMAT_P030.patch

   1 From c470db2240fa76293025852533ae8bf1c5679bfb Mon Sep 17 00:00:00 2001
   2 From: Dom Cobley <popcornmix@gmail.com>
   3 Date: Mon, 22 Mar 2021 19:43:48 +0000
   4 Subject: [PATCH] vc4/drm: Fix source offsets with DRM_FORMAT_P030
   5
   6 Spec says: bits [31:4] of the given address should point to
   7 the 128-bit word containing the desired starting pixel,
   8 and bits[3:0] should be between 0 and 11, indicating which
   9 of the 12-pixels in that 128-bit word is the first pixel to be used
  10
  11 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
  12 ---
  13  drivers/gpu/drm/vc4/vc4_plane.c | 24 ++++++++++++++++--------
  14  1 file changed, 16 insertions(+), 8 deletions(-)
  15
  16 --- a/drivers/gpu/drm/vc4/vc4_plane.c
  17 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
  18 @@ -824,9 +824,20 @@ static int vc4_plane_mode_set(struct drm
  19                 u32 tile_w, tile, x_off, pix_per_tile;
  20
  21                 if (fb->format->format == DRM_FORMAT_P030) {
  22 +                       /*
  23 +                        * Spec says: bits [31:4] of the given address should point to
  24 +                        * the 128-bit word containing the desired starting pixel,
  25 +                        * and bits[3:0] should be between 0 and 11, indicating which
  26 +                        * of the 12-pixels in that 128-bit word is the first pixel to be used
  27 +                        */
  28 +                       u32 aligned = vc4_state->src_x / 12;
  29 +                       u32 last_bits = vc4_state->src_x % 12;
  30 +
  31 +                       x_off = aligned * 16 + last_bits;
  32                         hvs_format = HVS_PIXEL_FORMAT_YCBCR_10BIT;
  33                         tiling = SCALER_CTL0_TILING_128B;
  34 -                       tile_w = 96;
  35 +                       tile_w = 128;
  36 +                       pix_per_tile = 96;
  37                 } else {
  38                         hvs_format = HVS_PIXEL_FORMAT_H264;
  39
  40 @@ -846,17 +857,16 @@ static int vc4_plane_mode_set(struct drm
  41                         default:
  42                                 break;
  43                         }
  44 +                       pix_per_tile = tile_w / fb->format->cpp[0];
  45 +                       x_off = (vc4_state->src_x % pix_per_tile) /
  46 +                               (i ? h_subsample : 1) * fb->format->cpp[i];
  47                 }
  48                 if (param > SCALER_TILE_HEIGHT_MASK) {
  49                         DRM_DEBUG_KMS("SAND height too large (%d)\n",
  50                                       param);
  51                         return -EINVAL;
  52                 }
  53 -
  54 -               pix_per_tile = tile_w / fb->format->cpp[0];
  55                 tile = vc4_state->src_x / pix_per_tile;
  56 -               x_off = vc4_state->src_x % pix_per_tile;
  57 -
  58                 /* Adjust the base pointer to the first pixel to be scanned
  59                  * out.
  60                  *
  61 @@ -872,9 +882,7 @@ static int vc4_plane_mode_set(struct drm
  62                         vc4_state->offsets[i] += src_y /
  63                                                  (i ? v_subsample : 1) *
  64                                                  tile_w;
  65 -                       vc4_state->offsets[i] += x_off /
  66 -                                                (i ? h_subsample : 1) *
  67 -                                                fb->format->cpp[i];
  68 +                       vc4_state->offsets[i] += x_off & ~(i ? 1 : 0);
  69                 }
  70
  71                 pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);