kernel: bump 5.15 to 5.15.32
[openwrt/staging/chunkeey.git] / target / linux / generic / pending-5.15 / 850-0002-PCI-aardvark-Fix-reading-MSI-interrupt-number.patch
1 From a29a7d01cd778854e08108461cba321a63d98871 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
3 Date: Fri, 2 Jul 2021 16:39:47 +0200
4 Subject: [PATCH] PCI: aardvark: Fix reading MSI interrupt number
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 In advk_pcie_handle_msi() the authors expect that when bit i in the W1C
10 register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is
11 updated to contain the MSI number corresponding to index i.
12
13 Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG
14 always contains the number of the last received MSI, overall.
15
16 Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt
17 number. Since Aardvark already forbids more than 32 interrupts and uses
18 own allocated hwirq numbers, the msi_idx already corresponds to the
19 received MSI number.
20
21 Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
22 Signed-off-by: Pali Rohár <pali@kernel.org>
23 Signed-off-by: Marek Behún <kabel@kernel.org>
24 ---
25 drivers/pci/controller/pci-aardvark.c | 13 ++++++-------
26 1 file changed, 6 insertions(+), 7 deletions(-)
27
28 --- a/drivers/pci/controller/pci-aardvark.c
29 +++ b/drivers/pci/controller/pci-aardvark.c
30 @@ -1386,7 +1386,7 @@ static void advk_pcie_remove_irq_domain(
31 static void advk_pcie_handle_msi(struct advk_pcie *pcie)
32 {
33 u32 msi_val, msi_mask, msi_status, msi_idx;
34 - u16 msi_data;
35 + int virq;
36
37 msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
38 msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
39 @@ -1396,13 +1396,12 @@ static void advk_pcie_handle_msi(struct
40 if (!(BIT(msi_idx) & msi_status))
41 continue;
42
43 - /*
44 - * msi_idx contains bits [4:0] of the msi_data and msi_data
45 - * contains 16bit MSI interrupt number
46 - */
47 advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG);
48 - msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK;
49 - generic_handle_irq(msi_data);
50 + virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx);
51 + if (virq)
52 + generic_handle_irq(virq);
53 + else
54 + dev_err_ratelimited(&pcie->pdev->dev, "unexpected MSI 0x%02x\n", msi_idx);
55 }
56
57 advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING,