2f259150fa4db47c67267efc5c171687971d40b8
[openwrt/staging/chunkeey.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-d7800.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 D7800";
7 compatible = "netgear,d7800", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power_white;
25 led-failsafe = &power_amber;
26 led-running = &power_white;
27 led-upgrade = &power_amber;
28 };
29
30 chosen {
31 bootargs = "rootfstype=squashfs noinitrd";
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 wifi {
40 label = "wifi";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 reset {
48 label = "reset";
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 wps {
56 label = "wps";
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 usb1 {
70 label = "white:usb1";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
72 };
73
74 usb2 {
75 label = "white:usb2";
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
77 };
78
79 power_amber: power_amber {
80 label = "amber:power";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
82 };
83
84 wan_white {
85 label = "white:wan";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 wan_amber {
90 label = "amber:wan";
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
92 };
93
94 wps {
95 label = "white:wps";
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
97 };
98
99 esata {
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
102 };
103
104 power_white: power_white {
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
108 };
109
110 wifi {
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
113 };
114 };
115 };
116
117 &qcom_pinmux {
118 button_pins: button_pins {
119 mux {
120 pins = "gpio6", "gpio54", "gpio65";
121 function = "gpio";
122 drive-strength = <2>;
123 bias-pull-up;
124 };
125 };
126
127 led_pins: led_pins {
128 mux {
129 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
130 "gpio24","gpio26", "gpio53", "gpio64";
131 function = "gpio";
132 drive-strength = <2>;
133 bias-pull-up;
134 };
135 };
136
137 usb0_pwr_en_pins: usb0_pwr_en_pins {
138 mux {
139 pins = "gpio15";
140 function = "gpio";
141 drive-strength = <12>;
142 bias-pull-down;
143 output-high;
144 };
145 };
146
147 usb1_pwr_en_pins: usb1_pwr_en_pins {
148 mux {
149 pins = "gpio16", "gpio68";
150 function = "gpio";
151 drive-strength = <12>;
152 bias-pull-down;
153 output-high;
154 };
155 };
156 };
157
158 &sata_phy {
159 status = "okay";
160 };
161
162 &sata {
163 status = "okay";
164 };
165
166 &usb3_0 {
167 status = "okay";
168
169 pinctrl-0 = <&usb0_pwr_en_pins>;
170 pinctrl-names = "default";
171 };
172
173 &usb3_1 {
174 status = "okay";
175
176 pinctrl-0 = <&usb1_pwr_en_pins>;
177 pinctrl-names = "default";
178 };
179
180 &pcie0 {
181 status = "okay";
182 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
183 pinctrl-0 = <&pcie0_pins>;
184 pinctrl-names = "default";
185
186 bridge@0,0 {
187 reg = <0x00000000 0 0 0 0>;
188 #address-cells = <3>;
189 #size-cells = <2>;
190 ranges;
191
192 wifi@1,0 {
193 compatible = "pci168c,0040";
194 reg = <0x00010000 0 0 0 0>;
195
196 nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
197 nvmem-cell-names = "mac-address", "pre-calibration";
198 mac-address-increment = <(1)>;
199 };
200 };
201 };
202
203 &pcie1 {
204 status = "okay";
205 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
206 pinctrl-0 = <&pcie1_pins>;
207 pinctrl-names = "default";
208 max-link-speed = <1>;
209
210 bridge@0,0 {
211 reg = <0x00000000 0 0 0 0>;
212 #address-cells = <3>;
213 #size-cells = <2>;
214 ranges;
215
216 wifi@1,0 {
217 compatible = "pci168c,0040";
218 reg = <0x00010000 0 0 0 0>;
219
220 nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
221 nvmem-cell-names = "mac-address", "pre-calibration";
222 mac-address-increment = <(2)>;
223 };
224 };
225 };
226
227 &pcie2 {
228 status = "okay";
229 reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
230 pinctrl-0 = <&pcie2_pins>;
231 pinctrl-names = "default";
232 };
233
234 &nand_controller {
235 status = "okay";
236
237 pinctrl-0 = <&nand_pins>;
238 pinctrl-names = "default";
239
240 #address-cells = <1>;
241 #size-cells = <0>;
242
243 nand@0 {
244 reg = <0>;
245 compatible = "qcom,nandcs";
246
247 nand-ecc-strength = <4>;
248 nand-bus-width = <8>;
249 nand-ecc-step-size = <512>;
250
251 nand-is-boot-medium;
252 qcom,boot_pages_size = <0x1180000>;
253
254 partitions {
255 compatible = "fixed-partitions";
256 #address-cells = <1>;
257 #size-cells = <1>;
258
259 qcadata@0 {
260 label = "qcadata";
261 reg = <0x0000000 0x0c80000>;
262 read-only;
263 };
264
265 APPSBL@c80000 {
266 label = "APPSBL";
267 reg = <0x0c80000 0x0500000>;
268 read-only;
269 };
270
271 APPSBLENV@1180000 {
272 label = "APPSBLENV";
273 reg = <0x1180000 0x0080000>;
274 read-only;
275 };
276
277 art@1200000 {
278 label = "art";
279 reg = <0x1200000 0x0140000>;
280 read-only;
281 compatible = "nvmem-cells";
282 #address-cells = <1>;
283 #size-cells = <1>;
284
285 macaddr_art_0: macaddr@0 {
286 reg = <0x0 0x6>;
287 };
288
289 macaddr_art_6: macaddr@6 {
290 reg = <0x6 0x6>;
291 };
292
293 precal_art_1000: precal@1000 {
294 reg = <0x1000 0x2f20>;
295 };
296
297 precal_art_5000: precal@5000 {
298 reg = <0x5000 0x2f20>;
299 };
300 };
301
302 artbak: art@1340000 {
303 label = "artbak";
304 reg = <0x1340000 0x0140000>;
305 read-only;
306 };
307
308 kernel@1480000 {
309 label = "kernel";
310 reg = <0x1480000 0x0400000>;
311 };
312
313 ubi@1880000 {
314 label = "ubi";
315 reg = <0x1880000 0x6080000>;
316 };
317
318 reserve@7900000 {
319 label = "reserve";
320 reg = <0x7900000 0x0700000>;
321 read-only;
322 };
323 };
324 };
325 };
326
327 &mdio0 {
328 status = "okay";
329
330 pinctrl-0 = <&mdio0_pins>;
331 pinctrl-names = "default";
332
333 phy0: ethernet-phy@0 {
334 reg = <0>;
335 qca,ar8327-initvals = <
336 0x00004 0x7600000 /* PAD0_MODE */
337 0x00008 0x1000000 /* PAD5_MODE */
338 0x0000c 0x80 /* PAD6_MODE */
339 0x000e4 0x6a545 /* MAC_POWER_SEL */
340 0x000e0 0xc74164de /* SGMII_CTRL */
341 0x0007c 0x4e /* PORT0_STATUS */
342 0x00094 0x4e /* PORT6_STATUS */
343 >;
344 };
345
346 phy4: ethernet-phy@4 {
347 reg = <4>;
348 };
349 };
350
351 &gmac1 {
352 status = "okay";
353 phy-mode = "rgmii";
354 qcom,id = <1>;
355
356 pinctrl-0 = <&rgmii2_pins>;
357 pinctrl-names = "default";
358
359 nvmem-cells = <&macaddr_art_6>;
360 nvmem-cell-names = "mac-address";
361
362 fixed-link {
363 speed = <1000>;
364 full-duplex;
365 };
366 };
367
368 &gmac2 {
369 status = "okay";
370 phy-mode = "sgmii";
371 qcom,id = <2>;
372
373 nvmem-cells = <&macaddr_art_0>;
374 nvmem-cell-names = "mac-address";
375
376 fixed-link {
377 speed = <1000>;
378 full-duplex;
379 };
380 };
381
382 &adm_dma {
383 status = "okay";
384 };