target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #include "qcom-ipq8065.dtsi"
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         model = "Arris TR4400 v2";
   8         compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
   9
  10         memory@0 {
  11                 reg = <0x42000000 0x1e000000>;
  12                 device_type = "memory";
  13         };
  14
  15         aliases {
  16                 led-boot = &led_status_blue;
  17                 led-failsafe = &led_status_red;
  18                 led-running = &led_status_blue;
  19                 led-upgrade = &led_status_red;
  20         };
  21
  22         chosen {
  23                 bootargs = "rootfstype=squashfs noinitrd";
  24         };
  25
  26         keys {
  27                 compatible = "gpio-keys";
  28                 pinctrl-0 = <&button_pins>;
  29                 pinctrl-names = "default";
  30
  31                 reset {
  32                         label = "reset";
  33                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_RESTART>;
  35                         debounce-interval = <60>;
  36                         wakeup-source;
  37                 };
  38
  39                 wps {
  40                         label = "wps";
  41                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_WPS_BUTTON>;
  43                         debounce-interval = <60>;
  44                         wakeup-source;
  45                 };
  46         };
  47
  48         leds {
  49                 compatible = "gpio-leds";
  50                 pinctrl-0 = <&led_pins>;
  51                 pinctrl-names = "default";
  52
  53                 led_status_red: status_red {
  54                         label = "red:status";
  55                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  56                 };
  57
  58                 led_status_blue: status_blue {
  59                         label = "blue:status";
  60                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  61                 };
  62         };
  63 };
  64
  65 &qcom_pinmux {
  66         button_pins: button_pins {
  67                 mux {
  68                         pins = "gpio6", "gpio54";
  69                         function = "gpio";
  70                         drive-strength = <2>;
  71                         bias-pull-up;
  72                 };
  73         };
  74
  75         led_pins: led_pins {
  76                 mux {
  77                         pins = "gpio7", "gpio8";
  78                         function = "gpio";
  79                         drive-strength = <2>;
  80                         bias-pull-down;
  81                 };
  82         };
  83
  84         rgmii2_pins: rgmii2_pins {
  85                 tx {
  86                         pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
  87                         input-disable;
  88                 };
  89         };
  90
  91         spi_pins: spi_pins {
  92                 cs {
  93                         pins = "gpio20";
  94                         drive-strength = <12>;
  95                 };
  96         };
  97 };
  98
  99 &gsbi5 {
 100         qcom,mode = <GSBI_PROT_SPI>;
 101         status = "okay";
 102
 103         spi@1a280000 {
 104                 status = "okay";
 105
 106                 pinctrl-0 = <&spi_pins>;
 107                 pinctrl-names = "default";
 108
 109                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 110
 111                 flash@0 {
 112                         compatible = "everspin,mr25h256";
 113                         spi-max-frequency = <40000000>;
 114                         reg = <0>;
 115                 };
 116         };
 117 };
 118
 119 &nand {
 120         status = "okay";
 121
 122         pinctrl-0 = <&nand_pins>;
 123         pinctrl-names = "default";
 124
 125         nand@0 {
 126                 reg = <0>;
 127                 compatible = "qcom,nandcs";
 128
 129                 nand-ecc-strength = <4>;
 130                 nand-bus-width = <8>;
 131                 nand-ecc-step-size = <512>;
 132
 133                 partitions {
 134                         compatible = "fixed-partitions";
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137
 138                         partition@0 {
 139                                 label = "0:SBL1";
 140                                 reg = <0x0000000 0x0040000>;
 141                                 read-only;
 142                         };
 143                         partition@40000 {
 144                                 label = "0:MIBIB";
 145                                 reg = <0x0040000 0x0140000>;
 146                                 read-only;
 147                         };
 148                         partition@180000 {
 149                                 label = "0:SBL2";
 150                                 reg = <0x0180000 0x0140000>;
 151                                 read-only;
 152                         };
 153                         partition@2c0000 {
 154                                 label = "0:SBL3";
 155                                 reg = <0x02c0000 0x0280000>;
 156                                 read-only;
 157                         };
 158                         partition@540000 {
 159                                 label = "0:DDRCONFIG";
 160                                 reg = <0x0540000 0x0120000>;
 161                                 read-only;
 162                         };
 163                         partition@660000 {
 164                                 label = "0:SSD";
 165                                 reg = <0x0660000 0x0120000>;
 166                                 read-only;
 167                         };
 168                         partition@780000 {
 169                                 label = "0:TZ";
 170                                 reg = <0x0780000 0x0280000>;
 171                                 read-only;
 172                         };
 173                         partition@a00000 {
 174                                 label = "0:RPM";
 175                                 reg = <0x0a00000 0x0280000>;
 176                                 read-only;
 177                         };
 178                         partition@c80000 {
 179                                 label = "0:APPSBL";
 180                                 reg = <0x0c80000 0x0500000>;
 181                                 read-only;
 182                         };
 183                         partition@1180000 {
 184                                 label = "0:APPSBLENV";
 185                                 reg = <0x1180000 0x0080000>;
 186                         };
 187                         partition@1200000 {
 188                                 label = "0:ART";
 189                                 reg = <0x1200000 0x0140000>;
 190                                 read-only;
 191
 192                                 compatible = "nvmem-cells";
 193                                 #address-cells = <1>;
 194                                 #size-cells = <1>;
 195
 196                                 precal_ART_1000: precal@1000 {
 197                                         reg = <0x1000 0x2f20>;
 198                                 };
 199                                 precal_ART_5000: precal@5000 {
 200                                         reg = <0x5000 0x2f20>;
 201                                 };
 202                         };
 203                         stock_partition@1340000 {
 204                                 label = "stock_rootfs";
 205                                 reg = <0x1340000 0x4000000>;
 206                         };
 207                         partition@5340000 {
 208                                 label = "0:BOOTCONFIG";
 209                                 reg = <0x5340000 0x0060000>;
 210                                 read-only;
 211                         };
 212                         partition@53a0000 {
 213                                 label = "0:SBL2_1";
 214                                 reg = <0x53a0000 0x0140000>;
 215                                 read-only;
 216                         };
 217                         partition@54e0000 {
 218                                 label = "0:SBL3_1";
 219                                 reg = <0x54e0000 0x0280000>;
 220                                 read-only;
 221                         };
 222                         partition@5760000 {
 223                                 label = "0:DDRCONFIG_1";
 224                                 reg = <0x5760000 0x0120000>;
 225                                 read-only;
 226                         };
 227                         partition@5880000 {
 228                                 label = "0:SSD_1";
 229                                 reg = <0x5880000 0x0120000>;
 230                                 read-only;
 231                         };
 232                         partition@59a0000 {
 233                                 label = "0:TZ_1";
 234                                 reg = <0x59a0000 0x0280000>;
 235                                 read-only;
 236                         };
 237                         partition@5c20000 {
 238                                 label = "0:RPM_1";
 239                                 reg = <0x5c20000 0x0280000>;
 240                                 read-only;
 241                         };
 242                         partition@5ea0000 {
 243                                 label = "0:BOOTCONFIG1";
 244                                 reg = <0x5ea0000 0x0060000>;
 245                                 read-only;
 246                         };
 247                         partition@5f00000 {
 248                                 label = "0:APPSBL_1";
 249                                 reg = <0x5f00000 0x0500000>;
 250                                 read-only;
 251                         };
 252                         stock_partition@6400000 {
 253                                 label = "stock_rootfs_1";
 254                                 reg = <0x6400000 0x4000000>;
 255                         };
 256                         stock_partition@a400000 {
 257                                 label = "stock_fw_env";
 258                                 reg = <0xa400000 0x0100000>;
 259                         };
 260                         stock_partition@a500000 {
 261                                 label = "stock_config";
 262                                 reg = <0xa500000 0x0800000>;
 263                         };
 264                         stock_partition@ad00000 {
 265                                 label = "stock_PKI";
 266                                 reg = <0xad00000 0x0200000>;
 267                         };
 268                         stock_partition@af00000 {
 269                                 label = "stock_scfgmgr";
 270                                 reg = <0xaf00000 0x0100000>;
 271                         };
 272
 273                         partition@6400000 {
 274                                 label = "fw_env";
 275                                 reg = <0x6400000 0x0100000>;
 276
 277                                 compatible = "nvmem-cells";
 278                                 #address-cells = <1>;
 279                                 #size-cells = <1>;
 280
 281                                 macaddr_fw_env_0: macaddr@0 {
 282                                         reg = <0x00 0x6>;
 283                                 };
 284                                 macaddr_fw_env_6: macaddr@6 {
 285                                         reg = <0x06 0x6>;
 286                                 };
 287                                 macaddr_fw_env_c: macaddr@c {
 288                                         reg = <0x0c 0x6>;
 289                                 };
 290                                 macaddr_fw_env_12: macaddr@12 {
 291                                         reg = <0x12 0x6>;
 292                                 };
 293                                 macaddr_fw_env_18: macaddr@18 {
 294                                         reg = <0x18 0x6>;
 295                                 };
 296                         };
 297                         partition@6500000 {
 298                                 label = "ubi";
 299                                 reg = <0x6500000 0x9b00000>;
 300                         };
 301                         partition@1340000 {
 302                                 label = "extra";
 303                                 reg = <0x1340000 0x4000000>;
 304                         };
 305                 };
 306         };
 307 };
 308
 309 &mdio0 {
 310         status = "okay";
 311
 312         pinctrl-0 = <&mdio0_pins>;
 313         pinctrl-names = "default";
 314
 315         ethernet-phy@0 {
 316                 reg = <0x0>;
 317                 qca,ar8327-initvals = <
 318                         0x00004 0x7600000   /* PAD0_MODE */
 319                         0x00008 0x1000000   /* PAD5_MODE */
 320                         0x0000c 0x80        /* PAD6_MODE */
 321                         0x000e4 0xaa545     /* MAC_POWER_SEL */
 322                         0x000e0 0xc74164de  /* SGMII_CTRL */
 323                         0x0007c 0x4e        /* PORT0_STATUS */
 324                         0x00094 0x4e        /* PORT6_STATUS */
 325                         >;
 326         };
 327
 328         phy7: ethernet-phy@7 {
 329                 reg = <7>;
 330         };
 331 };
 332
 333 &gmac0 {
 334         status = "okay";
 335         phy-mode = "rgmii";
 336         qcom,id = <0>;
 337
 338         nvmem-cells = <&macaddr_fw_env_18>;
 339         nvmem-cell-names = "mac-address";
 340
 341         pinctrl-0 = <&rgmii2_pins>;
 342         pinctrl-names = "default";
 343
 344         fixed-link {
 345                 speed = <1000>;
 346                 full-duplex;
 347         };
 348 };
 349
 350 &gmac1 {
 351         status = "okay";
 352         phy-mode = "sgmii";
 353         qcom,id = <1>;
 354
 355         nvmem-cells = <&macaddr_fw_env_0>;
 356         nvmem-cell-names = "mac-address";
 357
 358         fixed-link {
 359                 speed = <1000>;
 360                 full-duplex;
 361         };
 362 };
 363
 364 &gmac3 {
 365         status = "okay";
 366         phy-mode = "sgmii";
 367         qcom,id = <3>;
 368         phy-handle = <&phy7>;
 369
 370         nvmem-cells = <&macaddr_fw_env_6>;
 371         nvmem-cell-names = "mac-address";
 372 };
 373
 374 &adm_dma {
 375         status = "okay";
 376 };
 377
 378 &usb3_1 {
 379         status = "okay";
 380 };
 381
 382 &pcie0 {
 383         status = "okay";
 384         reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
 385         pinctrl-0 = <&pcie0_pins>;
 386         pinctrl-names = "default";
 387
 388         bridge@0,0 {
 389                 reg = <0x00000000 0 0 0 0>;
 390                 #address-cells = <3>;
 391                 #size-cells = <2>;
 392                 ranges;
 393
 394                 wifi0: wifi@1,0 {
 395                         compatible = "pci168c,0046";
 396                         reg = <0x00010000 0 0 0 0>;
 397
 398                         nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
 399                         nvmem-cell-names = "pre-calibration", "mac-address";
 400                 };
 401         };
 402 };
 403
 404 &pcie1 {
 405         status = "okay";
 406         reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
 407         pinctrl-0 = <&pcie1_pins>;
 408         pinctrl-names = "default";
 409         max-link-speed = <1>;
 410
 411         bridge@0,0 {
 412                 reg = <0x00000000 0 0 0 0>;
 413                 #address-cells = <3>;
 414                 #size-cells = <2>;
 415                 ranges;
 416
 417                 wifi1: wifi@1,0 {
 418                         compatible = "pci168c,0040";
 419                         reg = <0x00010000 0 0 0 0>;
 420
 421                         nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
 422                         nvmem-cell-names = "pre-calibration", "mac-address";
 423                 };
 424         };
 425 };