target/linux/ipq806x/patches-5.15/104-4-drivers-thermal-tsens-Use-init_common-for-msm8960.patch

   1 From c04f98a496929f75d75c65115d5717423c3d0634 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Wed, 25 Nov 2020 17:16:36 +0100
   4 Subject: [PATCH 04/10] drivers: thermal: tsens: Use init_common for msm8960
   5
   6 Use init_common and drop custom init for msm8960.
   7
   8 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
   9 Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
  10 ---
  11  drivers/thermal/qcom/tsens-8960.c | 52 +------------------------------
  12  1 file changed, 1 insertion(+), 51 deletions(-)
  13
  14 --- a/drivers/thermal/qcom/tsens-8960.c
  15 +++ b/drivers/thermal/qcom/tsens-8960.c
  16 @@ -173,56 +173,6 @@ static void disable_8960(struct tsens_pr
  17         regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  18  }
  19
  20 -static int init_8960(struct tsens_priv *priv)
  21 -{
  22 -       int ret, i;
  23 -       u32 reg_cntl;
  24 -
  25 -       priv->tm_map = dev_get_regmap(priv->dev, NULL);
  26 -       if (!priv->tm_map)
  27 -               return -ENODEV;
  28 -
  29 -       /*
  30 -        * The status registers for each sensor are discontiguous
  31 -        * because some SoCs have 5 sensors while others have more
  32 -        * but the control registers stay in the same place, i.e
  33 -        * directly after the first 5 status registers.
  34 -        */
  35 -       for (i = 0; i < priv->num_sensors; i++) {
  36 -               if (i >= 5)
  37 -                       priv->sensor[i].status = S0_STATUS_ADDR + 40;
  38 -               priv->sensor[i].status += i * 4;
  39 -       }
  40 -
  41 -       reg_cntl = SW_RST;
  42 -       ret = regmap_update_bits(priv->tm_map, CNTL_ADDR, SW_RST, reg_cntl);
  43 -       if (ret)
  44 -               return ret;
  45 -
  46 -       if (priv->num_sensors > 1) {
  47 -               reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18);
  48 -               reg_cntl &= ~SW_RST;
  49 -               ret = regmap_update_bits(priv->tm_map, CONFIG_ADDR,
  50 -                                        CONFIG_MASK, CONFIG);
  51 -       } else {
  52 -               reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16);
  53 -               reg_cntl &= ~CONFIG_MASK_8660;
  54 -               reg_cntl |= CONFIG_8660 << CONFIG_SHIFT_8660;
  55 -       }
  56 -
  57 -       reg_cntl |= GENMASK(priv->num_sensors - 1, 0) << SENSOR0_SHIFT;
  58 -       ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  59 -       if (ret)
  60 -               return ret;
  61 -
  62 -       reg_cntl |= EN;
  63 -       ret = regmap_write(priv->tm_map, CNTL_ADDR, reg_cntl);
  64 -       if (ret)
  65 -               return ret;
  66 -
  67 -       return 0;
  68 -}
  69 -
  70  static int calibrate_8960(struct tsens_priv *priv)
  71  {
  72         int i;
  73 @@ -346,7 +296,7 @@ static const struct reg_field tsens_8960
  74  };
  75
  76  static const struct tsens_ops ops_8960 = {
  77 -       .init           = init_8960,
  78 +       .init           = init_common,
  79         .calibrate      = calibrate_8960,
  80         .get_temp       = get_temp_8960,
  81         .enable         = enable_8960,