octeon: disable edgerouter image
[openwrt/staging/chunkeey.git] / target / linux / mpc85xx / patches-4.19 / 104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch
1 From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001
2 From: Pawel Dembicki <paweldembicki@gmail.com>
3 Date: Sun, 30 Dec 2018 23:24:41 +0100
4 Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT
5
6 This patch apply chages for OpenWRT in P2020RDB
7 dts file.
8
9 Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
10 ---
11 arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++---------
12 1 file changed, 63 insertions(+), 35 deletions(-)
13
14 --- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts
15 +++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts
16 @@ -2,6 +2,7 @@
17 * P2020 RDB Device Tree Source
18 *
19 * Copyright 2009-2012 Freescale Semiconductor Inc.
20 + * Copyright 2018 Pawel Dembicki <paweldembicki@gmail.com>
21 *
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License as published by the
24 @@ -9,10 +10,15 @@
25 * option) any later version.
26 */
27
28 +/dts-v1/;
29 +
30 /include/ "p2020si-pre.dtsi"
31
32 +#include <dt-bindings/gpio/gpio.h>
33 +#include <dt-bindings/input/input.h>
34 +
35 / {
36 - model = "fsl,P2020RDB";
37 + model = "Freescale P2020RDB";
38 compatible = "fsl,P2020RDB";
39
40 aliases {
41 @@ -38,48 +44,38 @@
42 0x2 0x0 0x0 0xffb00000 0x00020000>;
43
44 nor@0,0 {
45 - #address-cells = <1>;
46 - #size-cells = <1>;
47 compatible = "cfi-flash";
48 reg = <0x0 0x0 0x1000000>;
49 bank-width = <2>;
50 device-width = <1>;
51
52 - partition@0 {
53 - /* This location must not be altered */
54 - /* 256KB for Vitesse 7385 Switch firmware */
55 - reg = <0x0 0x00040000>;
56 - label = "NOR (RO) Vitesse-7385 Firmware";
57 - read-only;
58 - };
59 -
60 - partition@40000 {
61 - /* 256KB for DTB Image */
62 - reg = <0x00040000 0x00040000>;
63 - label = "NOR (RO) DTB Image";
64 - read-only;
65 - };
66 + partitions {
67 + compatible = "fixed-partitions";
68 + #address-cells = <1>;
69 + #size-cells = <1>;
70
71 - partition@80000 {
72 - /* 3.5 MB for Linux Kernel Image */
73 - reg = <0x00080000 0x00380000>;
74 - label = "NOR (RO) Linux Kernel Image";
75 - read-only;
76 - };
77 + partition@0 {
78 + /* This location must not be altered */
79 + /* 256KB for Vitesse 7385 Switch firmware */
80 + reg = <0x0 0x00040000>;
81 + label = "NOR (RO) Vitesse-7385 Firmware";
82 + read-only;
83 + };
84
85 - partition@400000 {
86 - /* 11MB for JFFS2 based Root file System */
87 - reg = <0x00400000 0x00b00000>;
88 - label = "NOR (RW) JFFS2 Root File System";
89 - };
90 + partition@40000 {
91 + compatible = "denx,fit";
92 + reg = <0x00040000 0x00ec0000>;
93 + label = "firmware";
94 + };
95
96 - partition@f00000 {
97 - /* This location must not be altered */
98 - /* 512KB for u-boot Bootloader Image */
99 - /* 512KB for u-boot Environment Variables */
100 - reg = <0x00f00000 0x00100000>;
101 - label = "NOR (RO) U-Boot Image";
102 - read-only;
103 + partition@f00000 {
104 + /* This location must not be altered */
105 + /* 512KB for u-boot Bootloader Image */
106 + /* 512KB for u-boot Environment Variables */
107 + reg = <0x00f00000 0x00100000>;
108 + label = "u-boot";
109 + read-only;
110 + };
111 };
112 };
113
114 @@ -144,13 +140,43 @@
115 soc: soc@ffe00000 {
116 ranges = <0x0 0x0 0xffe00000 0x100000>;
117
118 + gpio0: gpio-controller@fc00 {
119 + };
120 +
121 i2c@3000 {
122 + temperature-sensor@4c {
123 + compatible = "adi,adt7461";
124 + reg = <0x4c>;
125 + };
126 +
127 + eeprom@50 {
128 + compatible = "atmel,24c256";
129 + reg = <0x50>;
130 + };
131 +
132 rtc@68 {
133 compatible = "dallas,ds1339";
134 reg = <0x68>;
135 };
136 };
137
138 + i2c@3100 {
139 + pmic@11 {
140 + compatible = "zl2006";
141 + reg = <0x11>;
142 + };
143 +
144 + gpio@18 {
145 + compatible = "nxp,pca9557";
146 + reg = <0x18>;
147 + };
148 +
149 + eeprom@52 {
150 + compatible = "atmel,24c01";
151 + reg = <0x52>;
152 + };
153 + };
154 +
155 spi@7000 {
156 flash@0 {
157 #address-cells = <1>;
158 @@ -204,10 +230,12 @@
159 phy0: ethernet-phy@0 {
160 interrupts = <3 1 0 0>;
161 reg = <0x0>;
162 + reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
163 };
164 phy1: ethernet-phy@1 {
165 interrupts = <3 1 0 0>;
166 reg = <0x1>;
167 + reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
168 };
169 tbi-phy@2 {
170 device_type = "tbi-phy";