ipq806x: Askey RT4230W REV6: enable onboard spi flash

There is a mr25h256 spi flash on this machine. From the mtd backup
of the stock firmware, this spi flash is empty.

[    3.652745] spi_qup 1a280000.spi: IN:block:16, fifo:64, OUT:block:16,
fifo:64
[    3.653925] spi-nor spi0.0: mr25h256 (32 Kbytes)

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
index a15dee6aca62f79b1b0b2ca67d692b4e5014f994..b07e7320a772040608e650f73ceb92d51bb0a878 100644 (file)
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -96,6 +96,35 @@
                        input-disable;
                };
        };
+
+       spi_pins: spi_pins {
+               cs {
+                       pins = "gpio20";
+                       drive-strength = <12>;
+               };
+       };
+};
+
+&gsbi5 {
+       qcom,mode = <GSBI_PROT_SPI>;
+       status = "okay";
+
+       spi@1a280000 {
+               status = "okay";
+
+               pinctrl-0 = <&spi_pins>;
+               pinctrl-names = "default";
+
+               cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+               flash@0 {
+                       compatible = "everspin,mr25h256";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       spi-max-frequency = <40000000>;
+                       reg = <0>;
+               };
+       };
 };
 
 &nand {