6 compatible = "brcm,bcm3368";
22 compatible = "brcm,bmips4350", "mips,mips4Kc";
28 compatible = "brcm,bmips4350", "mips,mips4Kc";
34 cpu_intc: interrupt-controller {
36 compatible = "mti,cpu-interrupt-controller";
39 #interrupt-cells = <1>;
42 memory { device_type = "memory"; reg = <0 0>; };
44 pflash: nor@1e000000 {
45 compatible = "cfi-flash";
46 reg = <0x1e000000 0x2000000>;
58 compatible = "simple-bus";
59 interrupt-parent = <&periph_intc>;
61 periph_intc: interrupt-controller@fff8c00c {
62 compatible = "brcm,bcm6345-l1-intc";
63 reg = <0xfff8c00c 0x8>;
66 #interrupt-cells = <1>;
68 interrupt-parent = <&cpu_intc>;
72 ext_intc0: interrupt-controller@fff8c014 {
73 compatible = "brcm,bcm6345-ext-intc";
74 reg = <0xfff8c014 0x4>;
77 #interrupt-cells = <2>;
79 interrupts = <25>, <26>, <27>, <28>;
82 gpio1: gpio-controller@fff8c080 {
83 compatible = "brcm,bcm6345-gpio";
84 reg = <0xfff8c080 4>, <0xfff8c088 4>;
92 gpio0: gpio-controller@fff8c084 {
93 compatible = "brcm,bcm6345-gpio";
94 reg = <0xfff8c084 4>, <0xfff8c08c 4>;
100 uart0: serial@fff8c100 {
101 compatible = "brcm,bcm6345-uart";
102 reg = <0xfff8c100 0x18>;
104 interrupt-parent = <&periph_intc>;
107 /* clocks = <&periph_clk>; */
108 /* clock-names = "refclk"; */
113 uart1: serial@fff8c120 {
114 compatible = "brcm,bcm6345-uart";
115 reg = <0xfff8c120 0x18>;
117 interrupt-parent = <&periph_intc>;
120 /* clocks = <&periph_clk>; */
121 /* clock-names = "refclk"; */
126 lsspi: spi@fff8c800 {
127 #address-cells = <1>;
129 compatible = "brcm,bcm6358-spi";
130 reg = <0xfff8c800 0x70c>;
132 /* clocks = <&clkctl 9>; */