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bcm63xx: ar-5315u: expose LEDs through controller
[openwrt/staging/dedeckeh.git] / target / linux / layerscape / patches-4.14 / 701-dpaa2-dpio-support-layerscape.patch
1 From 80df9e62536d7cac5c03a4fcb494c6ddf0723633 Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:27 +0800
4 Subject: [PATCH] dpaa2-dpio: support layerscape
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 This is an integrated patch of dpaa2-dpio for layerscape
10
11 Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
12 Signed-off-by: Biwen Li <biwen.li@nxp.com>
13 Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
14 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com>
16 Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
17 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
18 Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
19 Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
20 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
21 Signed-off-by: Li Yang <leoyang.li@nxp.com>
22 Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
23 Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
24 Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
25 ---
26 drivers/staging/fsl-mc/Kconfig | 1 +
27 drivers/staging/fsl-mc/Makefile | 1 +
28 drivers/staging/fsl-mc/bus/Kconfig | 5 +-
29 drivers/staging/fsl-mc/bus/Makefile | 3 +-
30 drivers/staging/fsl-mc/bus/dpbp-cmd.h | 28 +-
31 drivers/staging/fsl-mc/bus/dpbp.c | 28 +-
32 drivers/staging/fsl-mc/bus/dpcon-cmd.h | 28 +-
33 drivers/staging/fsl-mc/bus/dpcon.c | 32 +-
34 drivers/staging/fsl-mc/bus/dpio/Makefile | 3 +-
35 drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h | 29 +-
36 drivers/staging/fsl-mc/bus/dpio/dpio-driver.c | 99 ++--
37 .../staging/fsl-mc/bus/dpio/dpio-service.c | 295 +++++++++---
38 drivers/staging/fsl-mc/bus/dpio/dpio.c | 51 +--
39 drivers/staging/fsl-mc/bus/dpio/dpio.h | 32 +-
40 .../staging/fsl-mc/bus/dpio/qbman-portal.c | 421 ++++++++++++++----
41 .../staging/fsl-mc/bus/dpio/qbman-portal.h | 134 ++++--
42 drivers/staging/fsl-mc/bus/dpmcp.c | 28 +-
43 drivers/staging/fsl-mc/bus/dprc-driver.c | 4 +-
44 drivers/staging/fsl-mc/bus/dprc.c | 28 +-
45 drivers/staging/fsl-mc/bus/fsl-mc-allocator.c | 4 +-
46 drivers/staging/fsl-mc/bus/fsl-mc-bus.c | 4 +-
47 drivers/staging/fsl-mc/bus/fsl-mc-msi.c | 4 +-
48 drivers/staging/fsl-mc/bus/fsl-mc-private.h | 4 +-
49 .../fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c | 4 +-
50 drivers/staging/fsl-mc/bus/mc-io.c | 28 +-
51 drivers/staging/fsl-mc/bus/mc-sys.c | 28 +-
52 drivers/staging/fsl-mc/include/dpaa2-fd.h | 288 ++++++++++--
53 drivers/staging/fsl-mc/include/dpaa2-global.h | 27 +-
54 drivers/staging/fsl-mc/include/dpaa2-io.h | 110 +++--
55 drivers/staging/fsl-mc/include/dpbp.h | 29 +-
56 drivers/staging/fsl-mc/include/dpcon.h | 32 +-
57 drivers/staging/fsl-mc/include/dpopr.h | 110 +++++
58 drivers/staging/fsl-mc/include/mc.h | 4 +-
59 33 files changed, 1233 insertions(+), 693 deletions(-)
60 create mode 100644 drivers/staging/fsl-mc/include/dpopr.h
61
62 --- a/drivers/staging/fsl-mc/Kconfig
63 +++ b/drivers/staging/fsl-mc/Kconfig
64 @@ -1 +1,2 @@
65 +# SPDX-License-Identifier: GPL-2.0
66 source "drivers/staging/fsl-mc/bus/Kconfig"
67 --- a/drivers/staging/fsl-mc/Makefile
68 +++ b/drivers/staging/fsl-mc/Makefile
69 @@ -1,2 +1,3 @@
70 +# SPDX-License-Identifier: GPL-2.0
71 # Freescale Management Complex (MC) bus drivers
72 obj-$(CONFIG_FSL_MC_BUS) += bus/
73 --- a/drivers/staging/fsl-mc/bus/Kconfig
74 +++ b/drivers/staging/fsl-mc/bus/Kconfig
75 @@ -1,10 +1,9 @@
76 +# SPDX-License-Identifier: GPL-2.0
77 #
78 # DPAA2 fsl-mc bus
79 #
80 # Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
81 #
82 -# This file is released under the GPLv2
83 -#
84
85 config FSL_MC_BUS
86 bool "QorIQ DPAA2 fsl-mc bus driver"
87 @@ -18,7 +17,7 @@ config FSL_MC_BUS
88
89 config FSL_MC_DPIO
90 tristate "QorIQ DPAA2 DPIO driver"
91 - depends on FSL_MC_BUS && ARCH_LAYERSCAPE
92 + depends on FSL_MC_BUS
93 help
94 Driver for the DPAA2 DPIO object. A DPIO provides queue and
95 buffer management facilities for software to interact with
96 --- a/drivers/staging/fsl-mc/bus/Makefile
97 +++ b/drivers/staging/fsl-mc/bus/Makefile
98 @@ -1,10 +1,9 @@
99 +# SPDX-License-Identifier: GPL-2.0
100 #
101 # Freescale Management Complex (MC) bus drivers
102 #
103 # Copyright (C) 2014 Freescale Semiconductor, Inc.
104 #
105 -# This file is released under the GPLv2
106 -#
107 obj-$(CONFIG_FSL_MC_BUS) += mc-bus-driver.o
108
109 mc-bus-driver-objs := fsl-mc-bus.o \
110 --- a/drivers/staging/fsl-mc/bus/dpbp-cmd.h
111 +++ b/drivers/staging/fsl-mc/bus/dpbp-cmd.h
112 @@ -1,33 +1,7 @@
113 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
114 /*
115 * Copyright 2013-2016 Freescale Semiconductor Inc.
116 *
117 - * Redistribution and use in source and binary forms, with or without
118 - * modification, are permitted provided that the following conditions are met:
119 - * * Redistributions of source code must retain the above copyright
120 - * notice, this list of conditions and the following disclaimer.
121 - * * Redistributions in binary form must reproduce the above copyright
122 - * notice, this list of conditions and the following disclaimer in the
123 - * documentation and/or other materials provided with the distribution.
124 - * * Neither the name of the above-listed copyright holders nor the
125 - * names of any contributors may be used to endorse or promote products
126 - * derived from this software without specific prior written permission.
127 - *
128 - * ALTERNATIVELY, this software may be distributed under the terms of the
129 - * GNU General Public License ("GPL") as published by the Free Software
130 - * Foundation, either version 2 of that License or (at your option) any
131 - * later version.
132 - *
133 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
134 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
135 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
136 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
137 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
138 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
139 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
140 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
141 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
142 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
143 - * POSSIBILITY OF SUCH DAMAGE.
144 */
145 #ifndef _FSL_DPBP_CMD_H
146 #define _FSL_DPBP_CMD_H
147 --- a/drivers/staging/fsl-mc/bus/dpbp.c
148 +++ b/drivers/staging/fsl-mc/bus/dpbp.c
149 @@ -1,33 +1,7 @@
150 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
151 /*
152 * Copyright 2013-2016 Freescale Semiconductor Inc.
153 *
154 - * Redistribution and use in source and binary forms, with or without
155 - * modification, are permitted provided that the following conditions are met:
156 - * * Redistributions of source code must retain the above copyright
157 - * notice, this list of conditions and the following disclaimer.
158 - * * Redistributions in binary form must reproduce the above copyright
159 - * notice, this list of conditions and the following disclaimer in the
160 - * documentation and/or other materials provided with the distribution.
161 - * * Neither the name of the above-listed copyright holders nor the
162 - * names of any contributors may be used to endorse or promote products
163 - * derived from this software without specific prior written permission.
164 - *
165 - * ALTERNATIVELY, this software may be distributed under the terms of the
166 - * GNU General Public License ("GPL") as published by the Free Software
167 - * Foundation, either version 2 of that License or (at your option) any
168 - * later version.
169 - *
170 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
171 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
172 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
173 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
174 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
175 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
176 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
177 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
178 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
179 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
180 - * POSSIBILITY OF SUCH DAMAGE.
181 */
182 #include <linux/kernel.h>
183 #include "../include/mc.h"
184 --- a/drivers/staging/fsl-mc/bus/dpcon-cmd.h
185 +++ b/drivers/staging/fsl-mc/bus/dpcon-cmd.h
186 @@ -1,33 +1,7 @@
187 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
188 /*
189 * Copyright 2013-2016 Freescale Semiconductor Inc.
190 *
191 - * Redistribution and use in source and binary forms, with or without
192 - * modification, are permitted provided that the following conditions are met:
193 - * * Redistributions of source code must retain the above copyright
194 - * notice, this list of conditions and the following disclaimer.
195 - * * Redistributions in binary form must reproduce the above copyright
196 - * notice, this list of conditions and the following disclaimer in the
197 - * documentation and/or other materials provided with the distribution.
198 - * * Neither the name of the above-listed copyright holders nor the
199 - * names of any contributors may be used to endorse or promote products
200 - * derived from this software without specific prior written permission.
201 - *
202 - * ALTERNATIVELY, this software may be distributed under the terms of the
203 - * GNU General Public License ("GPL") as published by the Free Software
204 - * Foundation, either version 2 of that License or (at your option) any
205 - * later version.
206 - *
207 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
208 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
209 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
210 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
211 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
212 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
213 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
214 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
215 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
216 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
217 - * POSSIBILITY OF SUCH DAMAGE.
218 */
219 #ifndef _FSL_DPCON_CMD_H
220 #define _FSL_DPCON_CMD_H
221 --- a/drivers/staging/fsl-mc/bus/dpcon.c
222 +++ b/drivers/staging/fsl-mc/bus/dpcon.c
223 @@ -1,33 +1,7 @@
224 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
225 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
226 +/*
227 + * Copyright 2013-2016 Freescale Semiconductor Inc.
228 *
229 - * Redistribution and use in source and binary forms, with or without
230 - * modification, are permitted provided that the following conditions are met:
231 - * * Redistributions of source code must retain the above copyright
232 - * notice, this list of conditions and the following disclaimer.
233 - * * Redistributions in binary form must reproduce the above copyright
234 - * notice, this list of conditions and the following disclaimer in the
235 - * documentation and/or other materials provided with the distribution.
236 - * * Neither the name of the above-listed copyright holders nor the
237 - * names of any contributors may be used to endorse or promote products
238 - * derived from this software without specific prior written permission.
239 - *
240 - *
241 - * ALTERNATIVELY, this software may be distributed under the terms of the
242 - * GNU General Public License ("GPL") as published by the Free Software
243 - * Foundation, either version 2 of that License or (at your option) any
244 - * later version.
245 - *
246 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
247 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
248 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
249 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
250 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
251 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
252 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
253 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
254 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
255 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
256 - * POSSIBILITY OF SUCH DAMAGE.
257 */
258 #include <linux/kernel.h>
259 #include "../include/mc.h"
260 --- a/drivers/staging/fsl-mc/bus/dpio/Makefile
261 +++ b/drivers/staging/fsl-mc/bus/dpio/Makefile
262 @@ -1,9 +1,8 @@
263 +# SPDX-License-Identifier: GPL-2.0
264 #
265 # QorIQ DPAA2 DPIO driver
266 #
267
268 -subdir-ccflags-y := -Werror
269 -
270 obj-$(CONFIG_FSL_MC_DPIO) += fsl-mc-dpio.o
271
272 fsl-mc-dpio-objs := dpio.o qbman-portal.o dpio-service.o dpio-driver.o
273 --- a/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h
274 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h
275 @@ -1,34 +1,8 @@
276 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
277 /*
278 * Copyright 2013-2016 Freescale Semiconductor Inc.
279 * Copyright 2016 NXP
280 *
281 - * Redistribution and use in source and binary forms, with or without
282 - * modification, are permitted provided that the following conditions are met:
283 - * * Redistributions of source code must retain the above copyright
284 - * notice, this list of conditions and the following disclaimer.
285 - * * Redistributions in binary form must reproduce the above copyright
286 - * notice, this list of conditions and the following disclaimer in the
287 - * documentation and/or other materials provided with the distribution.
288 - * * Neither the name of the above-listed copyright holders nor the
289 - * names of any contributors may be used to endorse or promote products
290 - * derived from this software without specific prior written permission.
291 - *
292 - * ALTERNATIVELY, this software may be distributed under the terms of the
293 - * GNU General Public License ("GPL") as published by the Free Software
294 - * Foundation, either version 2 of that License or (at your option) any
295 - * later version.
296 - *
297 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
298 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
299 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
300 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
301 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
302 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
303 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
304 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
305 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
306 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
307 - * POSSIBILITY OF SUCH DAMAGE.
308 */
309 #ifndef _FSL_DPIO_CMD_H
310 #define _FSL_DPIO_CMD_H
311 @@ -51,6 +25,7 @@
312 #define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
313 #define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
314 #define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
315 +#define DPIO_CMDID_RESET DPIO_CMD(0x005)
316
317 struct dpio_cmd_open {
318 __le32 dpio_id;
319 --- a/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
320 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c
321 @@ -1,33 +1,8 @@
322 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
323 /*
324 * Copyright 2014-2016 Freescale Semiconductor Inc.
325 - * Copyright NXP 2016
326 + * Copyright 2016 NXP
327 *
328 - * Redistribution and use in source and binary forms, with or without
329 - * modification, are permitted provided that the following conditions are met:
330 - * * Redistributions of source code must retain the above copyright
331 - * notice, this list of conditions and the following disclaimer.
332 - * * Redistributions in binary form must reproduce the above copyright
333 - * notice, this list of conditions and the following disclaimer in the
334 - * documentation and/or other materials provided with the distribution.
335 - * * Neither the name of Freescale Semiconductor nor the
336 - * names of its contributors may be used to endorse or promote products
337 - * derived from this software without specific prior written permission.
338 - *
339 - * ALTERNATIVELY, this software may be distributed under the terms of the
340 - * GNU General Public License ("GPL") as published by the Free Software
341 - * Foundation, either version 2 of that License or (at your option) any
342 - * later version.
343 - *
344 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
345 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
346 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
347 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
348 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
349 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
350 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
351 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
352 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
353 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
354 */
355
356 #include <linux/types.h>
357 @@ -38,6 +13,7 @@
358 #include <linux/msi.h>
359 #include <linux/dma-mapping.h>
360 #include <linux/delay.h>
361 +#include <linux/io.h>
362
363 #include "../../include/mc.h"
364 #include "../../include/dpaa2-io.h"
365 @@ -54,6 +30,8 @@ struct dpio_priv {
366 struct dpaa2_io *io;
367 };
368
369 +static cpumask_var_t cpus_unused_mask;
370 +
371 static irqreturn_t dpio_irq_handler(int irq_num, void *arg)
372 {
373 struct device *dev = (struct device *)arg;
374 @@ -113,7 +91,7 @@ static int dpaa2_dpio_probe(struct fsl_m
375 struct dpio_priv *priv;
376 int err = -ENOMEM;
377 struct device *dev = &dpio_dev->dev;
378 - static int next_cpu = -1;
379 + int possible_next_cpu;
380
381 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
382 if (!priv)
383 @@ -135,6 +113,12 @@ static int dpaa2_dpio_probe(struct fsl_m
384 goto err_open;
385 }
386
387 + err = dpio_reset(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
388 + if (err) {
389 + dev_err(dev, "dpio_reset() failed\n");
390 + goto err_reset;
391 + }
392 +
393 err = dpio_get_attributes(dpio_dev->mc_io, 0, dpio_dev->mc_handle,
394 &dpio_attrs);
395 if (err) {
396 @@ -155,26 +139,35 @@ static int dpaa2_dpio_probe(struct fsl_m
397 desc.dpio_id = dpio_dev->obj_desc.id;
398
399 /* get the cpu to use for the affinity hint */
400 - if (next_cpu == -1)
401 - next_cpu = cpumask_first(cpu_online_mask);
402 - else
403 - next_cpu = cpumask_next(next_cpu, cpu_online_mask);
404 -
405 - if (!cpu_possible(next_cpu)) {
406 + possible_next_cpu = cpumask_first(cpus_unused_mask);
407 + if (possible_next_cpu >= nr_cpu_ids) {
408 dev_err(dev, "probe failed. Number of DPIOs exceeds NR_CPUS.\n");
409 err = -ERANGE;
410 goto err_allocate_irqs;
411 }
412 - desc.cpu = next_cpu;
413 + desc.cpu = possible_next_cpu;
414 + cpumask_clear_cpu(possible_next_cpu, cpus_unused_mask);
415
416 - /*
417 - * Set the CENA regs to be the cache inhibited area of the portal to
418 - * avoid coherency issues if a user migrates to another core.
419 - */
420 - desc.regs_cena = ioremap_wc(dpio_dev->regions[1].start,
421 - resource_size(&dpio_dev->regions[1]));
422 - desc.regs_cinh = ioremap(dpio_dev->regions[1].start,
423 - resource_size(&dpio_dev->regions[1]));
424 + if (dpio_dev->obj_desc.region_count < 3) {
425 + /* No support for DDR backed portals, use classic mapping */
426 + desc.regs_cena = ioremap_cache_ns(dpio_dev->regions[0].start,
427 + resource_size(&dpio_dev->regions[0]));
428 + } else {
429 + desc.regs_cena = memremap(dpio_dev->regions[2].start,
430 + resource_size(&dpio_dev->regions[2]),
431 + MEMREMAP_WB);
432 + }
433 + if (IS_ERR(desc.regs_cena)) {
434 + dev_err(dev, "ioremap_cache_ns failed\n");
435 + goto err_allocate_irqs;
436 + }
437 +
438 + desc.regs_cinh = devm_ioremap(dev, dpio_dev->regions[1].start,
439 + resource_size(&dpio_dev->regions[1]));
440 + if (!desc.regs_cinh) {
441 + dev_err(dev, "devm_ioremap failed\n");
442 + goto err_allocate_irqs;
443 + }
444
445 err = fsl_mc_allocate_irqs(dpio_dev);
446 if (err) {
447 @@ -186,7 +179,7 @@ static int dpaa2_dpio_probe(struct fsl_m
448 if (err)
449 goto err_register_dpio_irq;
450
451 - priv->io = dpaa2_io_create(&desc);
452 + priv->io = dpaa2_io_create(&desc, dev);
453 if (!priv->io) {
454 dev_err(dev, "dpaa2_io_create failed\n");
455 goto err_dpaa2_io_create;
456 @@ -196,7 +189,6 @@ static int dpaa2_dpio_probe(struct fsl_m
457 dev_dbg(dev, " receives_notifications = %d\n",
458 desc.receives_notifications);
459 dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
460 - fsl_mc_portal_free(dpio_dev->mc_io);
461
462 return 0;
463
464 @@ -207,6 +199,7 @@ err_register_dpio_irq:
465 err_allocate_irqs:
466 dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
467 err_get_attr:
468 +err_reset:
469 dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
470 err_open:
471 fsl_mc_portal_free(dpio_dev->mc_io);
472 @@ -227,7 +220,7 @@ static int dpaa2_dpio_remove(struct fsl_
473 {
474 struct device *dev;
475 struct dpio_priv *priv;
476 - int err;
477 + int err = 0, cpu;
478
479 dev = &dpio_dev->dev;
480 priv = dev_get_drvdata(dev);
481 @@ -236,11 +229,8 @@ static int dpaa2_dpio_remove(struct fsl_
482
483 dpio_teardown_irqs(dpio_dev);
484
485 - err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io);
486 - if (err) {
487 - dev_err(dev, "MC portal allocation failed\n");
488 - goto err_mcportal;
489 - }
490 + cpu = dpaa2_io_get_cpu(priv->io);
491 + cpumask_set_cpu(cpu, cpus_unused_mask);
492
493 err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
494 &dpio_dev->mc_handle);
495 @@ -261,7 +251,7 @@ static int dpaa2_dpio_remove(struct fsl_
496
497 err_open:
498 fsl_mc_portal_free(dpio_dev->mc_io);
499 -err_mcportal:
500 +
501 return err;
502 }
503
504 @@ -285,11 +275,16 @@ static struct fsl_mc_driver dpaa2_dpio_d
505
506 static int dpio_driver_init(void)
507 {
508 + if (!zalloc_cpumask_var(&cpus_unused_mask, GFP_KERNEL))
509 + return -ENOMEM;
510 + cpumask_copy(cpus_unused_mask, cpu_online_mask);
511 +
512 return fsl_mc_driver_register(&dpaa2_dpio_driver);
513 }
514
515 static void dpio_driver_exit(void)
516 {
517 + free_cpumask_var(cpus_unused_mask);
518 fsl_mc_driver_unregister(&dpaa2_dpio_driver);
519 }
520 module_init(dpio_driver_init);
521 --- a/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
522 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c
523 @@ -1,33 +1,8 @@
524 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
525 /*
526 * Copyright 2014-2016 Freescale Semiconductor Inc.
527 * Copyright 2016 NXP
528 *
529 - * Redistribution and use in source and binary forms, with or without
530 - * modification, are permitted provided that the following conditions are met:
531 - * * Redistributions of source code must retain the above copyright
532 - * notice, this list of conditions and the following disclaimer.
533 - * * Redistributions in binary form must reproduce the above copyright
534 - * notice, this list of conditions and the following disclaimer in the
535 - * documentation and/or other materials provided with the distribution.
536 - * * Neither the name of Freescale Semiconductor nor the
537 - * names of its contributors may be used to endorse or promote products
538 - * derived from this software without specific prior written permission.
539 - *
540 - * ALTERNATIVELY, this software may be distributed under the terms of the
541 - * GNU General Public License ("GPL") as published by the Free Software
542 - * Foundation, either version 2 of that License or (at your option) any
543 - * later version.
544 - *
545 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
546 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
547 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
548 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
549 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
550 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
551 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
552 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
553 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
554 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
555 */
556 #include <linux/types.h>
557 #include "../../include/mc.h"
558 @@ -43,7 +18,6 @@
559 #include "qbman-portal.h"
560
561 struct dpaa2_io {
562 - atomic_t refs;
563 struct dpaa2_io_desc dpio_desc;
564 struct qbman_swp_desc swp_desc;
565 struct qbman_swp *swp;
566 @@ -53,6 +27,7 @@ struct dpaa2_io {
567 /* protect notifications list */
568 spinlock_t lock_notifications;
569 struct list_head notifications;
570 + struct device *dev;
571 };
572
573 struct dpaa2_io_store {
574 @@ -83,7 +58,7 @@ static inline struct dpaa2_io *service_s
575 * If cpu == -1, choose the current cpu, with no guarantees about
576 * potentially being migrated away.
577 */
578 - if (unlikely(cpu < 0))
579 + if (cpu < 0)
580 cpu = smp_processor_id();
581
582 /* If a specific cpu was requested, pick it up immediately */
583 @@ -95,6 +70,10 @@ static inline struct dpaa2_io *service_s
584 if (d)
585 return d;
586
587 + d = service_select_by_cpu(d, -1);
588 + if (d)
589 + return d;
590 +
591 spin_lock(&dpio_list_lock);
592 d = list_entry(dpio_list.next, struct dpaa2_io, node);
593 list_del(&d->node);
594 @@ -105,15 +84,34 @@ static inline struct dpaa2_io *service_s
595 }
596
597 /**
598 + * dpaa2_io_service_select() - return a dpaa2_io service affined to this cpu
599 + * @cpu: the cpu id
600 + *
601 + * Return the affine dpaa2_io service, or NULL if there is no service affined
602 + * to the specified cpu. If DPAA2_IO_ANY_CPU is used, return the next available
603 + * service.
604 + */
605 +struct dpaa2_io *dpaa2_io_service_select(int cpu)
606 +{
607 + if (cpu == DPAA2_IO_ANY_CPU)
608 + return service_select(NULL);
609 +
610 + return service_select_by_cpu(NULL, cpu);
611 +}
612 +EXPORT_SYMBOL_GPL(dpaa2_io_service_select);
613 +
614 +/**
615 * dpaa2_io_create() - create a dpaa2_io object.
616 * @desc: the dpaa2_io descriptor
617 + * @dev: the actual DPIO device
618 *
619 * Activates a "struct dpaa2_io" corresponding to the given config of an actual
620 * DPIO object.
621 *
622 * Return a valid dpaa2_io object for success, or NULL for failure.
623 */
624 -struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc)
625 +struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc,
626 + struct device *dev)
627 {
628 struct dpaa2_io *obj = kmalloc(sizeof(*obj), GFP_KERNEL);
629
630 @@ -126,7 +124,6 @@ struct dpaa2_io *dpaa2_io_create(const s
631 return NULL;
632 }
633
634 - atomic_set(&obj->refs, 1);
635 obj->dpio_desc = *desc;
636 obj->swp_desc.cena_bar = obj->dpio_desc.regs_cena;
637 obj->swp_desc.cinh_bar = obj->dpio_desc.regs_cinh;
638 @@ -156,9 +153,10 @@ struct dpaa2_io *dpaa2_io_create(const s
639 dpio_by_cpu[desc->cpu] = obj;
640 spin_unlock(&dpio_list_lock);
641
642 + obj->dev = dev;
643 +
644 return obj;
645 }
646 -EXPORT_SYMBOL(dpaa2_io_create);
647
648 /**
649 * dpaa2_io_down() - release the dpaa2_io object.
650 @@ -171,11 +169,8 @@ EXPORT_SYMBOL(dpaa2_io_create);
651 */
652 void dpaa2_io_down(struct dpaa2_io *d)
653 {
654 - if (!atomic_dec_and_test(&d->refs))
655 - return;
656 kfree(d);
657 }
658 -EXPORT_SYMBOL(dpaa2_io_down);
659
660 #define DPAA_POLL_MAX 32
661
662 @@ -206,7 +201,7 @@ irqreturn_t dpaa2_io_irq(struct dpaa2_io
663 u64 q64;
664
665 q64 = qbman_result_SCN_ctx(dq);
666 - ctx = (void *)q64;
667 + ctx = (void *)(uintptr_t)q64;
668 ctx->cb(ctx);
669 } else {
670 pr_crit("fsl-mc-dpio: Unrecognised/ignored DQRR entry\n");
671 @@ -222,13 +217,19 @@ done:
672 qbman_swp_interrupt_set_inhibit(swp, 0);
673 return IRQ_HANDLED;
674 }
675 -EXPORT_SYMBOL(dpaa2_io_irq);
676 +
677 +int dpaa2_io_get_cpu(struct dpaa2_io *d)
678 +{
679 + return d->dpio_desc.cpu;
680 +}
681 +EXPORT_SYMBOL(dpaa2_io_get_cpu);
682
683 /**
684 * dpaa2_io_service_register() - Prepare for servicing of FQDAN or CDAN
685 * notifications on the given DPIO service.
686 * @d: the given DPIO service.
687 * @ctx: the notification context.
688 + * @dev: the device that requests the register
689 *
690 * The caller should make the MC command to attach a DPAA2 object to
691 * a DPIO after this function completes successfully. In that way:
692 @@ -243,7 +244,8 @@ EXPORT_SYMBOL(dpaa2_io_irq);
693 * Return 0 for success, or -ENODEV for failure.
694 */
695 int dpaa2_io_service_register(struct dpaa2_io *d,
696 - struct dpaa2_io_notification_ctx *ctx)
697 + struct dpaa2_io_notification_ctx *ctx,
698 + struct device *dev)
699 {
700 unsigned long irqflags;
701
702 @@ -251,8 +253,10 @@ int dpaa2_io_service_register(struct dpa
703 if (!d)
704 return -ENODEV;
705
706 + device_link_add(dev, d->dev, DL_FLAG_AUTOREMOVE_SUPPLIER);
707 +
708 ctx->dpio_id = d->dpio_desc.dpio_id;
709 - ctx->qman64 = (u64)ctx;
710 + ctx->qman64 = (u64)(uintptr_t)ctx;
711 ctx->dpio_private = d;
712 spin_lock_irqsave(&d->lock_notifications, irqflags);
713 list_add(&ctx->node, &d->notifications);
714 @@ -263,20 +267,23 @@ int dpaa2_io_service_register(struct dpa
715 return qbman_swp_CDAN_set_context_enable(d->swp,
716 (u16)ctx->id,
717 ctx->qman64);
718 +
719 return 0;
720 }
721 -EXPORT_SYMBOL(dpaa2_io_service_register);
722 +EXPORT_SYMBOL_GPL(dpaa2_io_service_register);
723
724 /**
725 * dpaa2_io_service_deregister - The opposite of 'register'.
726 * @service: the given DPIO service.
727 * @ctx: the notification context.
728 + * @dev: the device that requests to be deregistered
729 *
730 * This function should be called only after sending the MC command to
731 * to detach the notification-producing device from the DPIO.
732 */
733 void dpaa2_io_service_deregister(struct dpaa2_io *service,
734 - struct dpaa2_io_notification_ctx *ctx)
735 + struct dpaa2_io_notification_ctx *ctx,
736 + struct device *dev)
737 {
738 struct dpaa2_io *d = ctx->dpio_private;
739 unsigned long irqflags;
740 @@ -287,8 +294,10 @@ void dpaa2_io_service_deregister(struct
741 spin_lock_irqsave(&d->lock_notifications, irqflags);
742 list_del(&ctx->node);
743 spin_unlock_irqrestore(&d->lock_notifications, irqflags);
744 +
745 + device_link_remove(dev, d->dev);
746 }
747 -EXPORT_SYMBOL(dpaa2_io_service_deregister);
748 +EXPORT_SYMBOL_GPL(dpaa2_io_service_deregister);
749
750 /**
751 * dpaa2_io_service_rearm() - Rearm the notification for the given DPIO service.
752 @@ -322,7 +331,7 @@ int dpaa2_io_service_rearm(struct dpaa2_
753
754 return err;
755 }
756 -EXPORT_SYMBOL(dpaa2_io_service_rearm);
757 +EXPORT_SYMBOL_GPL(dpaa2_io_service_rearm);
758
759 /**
760 * dpaa2_io_service_pull_fq() - pull dequeue functions from a fq.
761 @@ -385,7 +394,7 @@ int dpaa2_io_service_pull_channel(struct
762
763 return err;
764 }
765 -EXPORT_SYMBOL(dpaa2_io_service_pull_channel);
766 +EXPORT_SYMBOL_GPL(dpaa2_io_service_pull_channel);
767
768 /**
769 * dpaa2_io_service_enqueue_fq() - Enqueue a frame to a frame queue.
770 @@ -441,7 +450,7 @@ int dpaa2_io_service_enqueue_qd(struct d
771
772 return qbman_swp_enqueue(d->swp, &ed, fd);
773 }
774 -EXPORT_SYMBOL(dpaa2_io_service_enqueue_qd);
775 +EXPORT_SYMBOL_GPL(dpaa2_io_service_enqueue_qd);
776
777 /**
778 * dpaa2_io_service_release() - Release buffers to a buffer pool.
779 @@ -453,7 +462,7 @@ EXPORT_SYMBOL(dpaa2_io_service_enqueue_q
780 * Return 0 for success, and negative error code for failure.
781 */
782 int dpaa2_io_service_release(struct dpaa2_io *d,
783 - u32 bpid,
784 + u16 bpid,
785 const u64 *buffers,
786 unsigned int num_buffers)
787 {
788 @@ -468,7 +477,7 @@ int dpaa2_io_service_release(struct dpaa
789
790 return qbman_swp_release(d->swp, &rd, buffers, num_buffers);
791 }
792 -EXPORT_SYMBOL(dpaa2_io_service_release);
793 +EXPORT_SYMBOL_GPL(dpaa2_io_service_release);
794
795 /**
796 * dpaa2_io_service_acquire() - Acquire buffers from a buffer pool.
797 @@ -482,7 +491,7 @@ EXPORT_SYMBOL(dpaa2_io_service_release);
798 * Eg. if the buffer pool is empty, this will return zero.
799 */
800 int dpaa2_io_service_acquire(struct dpaa2_io *d,
801 - u32 bpid,
802 + u16 bpid,
803 u64 *buffers,
804 unsigned int num_buffers)
805 {
806 @@ -499,7 +508,7 @@ int dpaa2_io_service_acquire(struct dpaa
807
808 return err;
809 }
810 -EXPORT_SYMBOL(dpaa2_io_service_acquire);
811 +EXPORT_SYMBOL_GPL(dpaa2_io_service_acquire);
812
813 /*
814 * 'Stores' are reusable memory blocks for holding dequeue results, and to
815 @@ -553,7 +562,7 @@ struct dpaa2_io_store *dpaa2_io_store_cr
816
817 return ret;
818 }
819 -EXPORT_SYMBOL(dpaa2_io_store_create);
820 +EXPORT_SYMBOL_GPL(dpaa2_io_store_create);
821
822 /**
823 * dpaa2_io_store_destroy() - Frees the dma memory storage for dequeue
824 @@ -567,7 +576,7 @@ void dpaa2_io_store_destroy(struct dpaa2
825 kfree(s->alloced_addr);
826 kfree(s);
827 }
828 -EXPORT_SYMBOL(dpaa2_io_store_destroy);
829 +EXPORT_SYMBOL_GPL(dpaa2_io_store_destroy);
830
831 /**
832 * dpaa2_io_store_next() - Determine when the next dequeue result is available.
833 @@ -610,9 +619,193 @@ struct dpaa2_dq *dpaa2_io_store_next(str
834 if (!(dpaa2_dq_flags(ret) & DPAA2_DQ_STAT_VALIDFRAME))
835 ret = NULL;
836 } else {
837 + prefetch(&s->vaddr[s->idx]);
838 *is_last = 0;
839 }
840
841 return ret;
842 }
843 -EXPORT_SYMBOL(dpaa2_io_store_next);
844 +EXPORT_SYMBOL_GPL(dpaa2_io_store_next);
845 +
846 +/**
847 + * dpaa2_io_query_fq_count() - Get the frame and byte count for a given fq.
848 + * @d: the given DPIO object.
849 + * @fqid: the id of frame queue to be queried.
850 + * @fcnt: the queried frame count.
851 + * @bcnt: the queried byte count.
852 + *
853 + * Knowing the FQ count at run-time can be useful in debugging situations.
854 + * The instantaneous frame- and byte-count are hereby returned.
855 + *
856 + * Return 0 for a successful query, and negative error code if query fails.
857 + */
858 +int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid,
859 + u32 *fcnt, u32 *bcnt)
860 +{
861 + struct qbman_fq_query_np_rslt state;
862 + struct qbman_swp *swp;
863 + unsigned long irqflags;
864 + int ret;
865 +
866 + d = service_select(d);
867 + if (!d)
868 + return -ENODEV;
869 +
870 + swp = d->swp;
871 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
872 + ret = qbman_fq_query_state(swp, fqid, &state);
873 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
874 + if (ret)
875 + return ret;
876 + *fcnt = qbman_fq_state_frame_count(&state);
877 + *bcnt = qbman_fq_state_byte_count(&state);
878 +
879 + return 0;
880 +}
881 +EXPORT_SYMBOL_GPL(dpaa2_io_query_fq_count);
882 +
883 +/**
884 + * dpaa2_io_query_bp_count() - Query the number of buffers currently in a
885 + * buffer pool.
886 + * @d: the given DPIO object.
887 + * @bpid: the index of buffer pool to be queried.
888 + * @num: the queried number of buffers in the buffer pool.
889 + *
890 + * Return 0 for a successful query, and negative error code if query fails.
891 + */
892 +int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid, u32 *num)
893 +{
894 + struct qbman_bp_query_rslt state;
895 + struct qbman_swp *swp;
896 + unsigned long irqflags;
897 + int ret;
898 +
899 + d = service_select(d);
900 + if (!d)
901 + return -ENODEV;
902 +
903 + swp = d->swp;
904 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
905 + ret = qbman_bp_query(swp, bpid, &state);
906 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
907 + if (ret)
908 + return ret;
909 + *num = qbman_bp_info_num_free_bufs(&state);
910 + return 0;
911 +}
912 +EXPORT_SYMBOL_GPL(dpaa2_io_query_bp_count);
913 +
914 +/**
915 + * dpaa2_io_service_enqueue_orp_fq() - Enqueue a frame to a frame queue with
916 + * order restoration
917 + * @d: the given DPIO service.
918 + * @fqid: the given frame queue id.
919 + * @fd: the frame descriptor which is enqueued.
920 + * @orpid: the order restoration point ID
921 + * @seqnum: the order sequence number
922 + * @last: must be set for the final frame if seqnum is shared (spilt frame)
923 + *
924 + * Performs an enqueue to a frame queue using the specified order restoration
925 + * point. The QMan device will ensure the order of frames placed on the
926 + * queue will be ordered as per the sequence number.
927 + *
928 + * In the case a frame is split it is possible to enqueue using the same
929 + * sequence number more than once. The final frame in a shared sequence number
930 + * most be indicated by setting last = 1. For non shared sequence numbers
931 + * last = 1 must always be set.
932 + *
933 + * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready,
934 + * or -ENODEV if there is no dpio service.
935 + */
936 +int dpaa2_io_service_enqueue_orp_fq(struct dpaa2_io *d, u32 fqid,
937 + const struct dpaa2_fd *fd, u16 orpid,
938 + u16 seqnum, int last)
939 +{
940 + struct qbman_eq_desc ed;
941 +
942 + d = service_select(d);
943 + if (!d)
944 + return -ENODEV;
945 + qbman_eq_desc_clear(&ed);
946 + qbman_eq_desc_set_orp(&ed, 0, orpid, seqnum, !last);
947 + qbman_eq_desc_set_fq(&ed, fqid);
948 + return qbman_swp_enqueue(d->swp, &ed, fd);
949 +}
950 +EXPORT_SYMBOL(dpaa2_io_service_enqueue_orp_fq);
951 +
952 +/**
953 + * dpaa2_io_service_enqueue_orp_qd() - Enqueue a frame to a queueing destination
954 + * with order restoration
955 + * @d: the given DPIO service.
956 + * @qdid: the given queuing destination id.
957 + * @fd: the frame descriptor which is enqueued.
958 + * @orpid: the order restoration point ID
959 + * @seqnum: the order sequence number
960 + * @last: must be set for the final frame if seqnum is shared (spilt frame)
961 + *
962 + * Performs an enqueue to a frame queue using the specified order restoration
963 + * point. The QMan device will ensure the order of frames placed on the
964 + * queue will be ordered as per the sequence number.
965 + *
966 + * In the case a frame is split it is possible to enqueue using the same
967 + * sequence number more than once. The final frame in a shared sequence number
968 + * most be indicated by setting last = 1. For non shared sequence numbers
969 + * last = 1 must always be set.
970 + *
971 + * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready,
972 + * or -ENODEV if there is no dpio service.
973 + */
974 +int dpaa2_io_service_enqueue_orp_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
975 + u16 qdbin, const struct dpaa2_fd *fd,
976 + u16 orpid, u16 seqnum, int last)
977 +{
978 + struct qbman_eq_desc ed;
979 +
980 + d = service_select(d);
981 + if (!d)
982 + return -ENODEV;
983 + qbman_eq_desc_clear(&ed);
984 + qbman_eq_desc_set_orp(&ed, 0, orpid, seqnum, !last);
985 + qbman_eq_desc_set_qd(&ed, qdid, qdbin, prio);
986 + return qbman_swp_enqueue(d->swp, &ed, fd);
987 +}
988 +EXPORT_SYMBOL_GPL(dpaa2_io_service_enqueue_orp_qd);
989 +
990 +/**
991 + * dpaa2_io_service_orp_seqnum_drop() - Remove a sequence number from
992 + * an order restoration list
993 + * @d: the given DPIO service.
994 + * @orpid: Order restoration point to remove a sequence number from
995 + * @seqnum: Sequence number to remove
996 + *
997 + * Removes a frames sequence number from an order restoration point without
998 + * enqueing the frame. Used to indicate that the order restoration hardware
999 + * should not expect to see this sequence number. Typically used to indicate
1000 + * a frame was terminated or dropped from a flow.
1001 + *
1002 + * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready,
1003 + * or -ENODEV if there is no dpio service.
1004 + */
1005 +int dpaa2_io_service_orp_seqnum_drop(struct dpaa2_io *d, u16 orpid, u16 seqnum)
1006 +{
1007 + struct qbman_eq_desc ed;
1008 + struct dpaa2_fd fd;
1009 + unsigned long irqflags;
1010 + int ret;
1011 +
1012 + d = service_select(d);
1013 + if (!d)
1014 + return -ENODEV;
1015 +
1016 + if ((d->swp->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) {
1017 + spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags);
1018 + ret = qbman_orp_drop(d->swp, orpid, seqnum);
1019 + spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags);
1020 + return ret;
1021 + }
1022 +
1023 + qbman_eq_desc_clear(&ed);
1024 + qbman_eq_desc_set_orp_hole(&ed, orpid, seqnum);
1025 + return qbman_swp_enqueue(d->swp, &ed, &fd);
1026 +}
1027 +EXPORT_SYMBOL_GPL(dpaa2_io_service_orp_seqnum_drop);
1028 --- a/drivers/staging/fsl-mc/bus/dpio/dpio.c
1029 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio.c
1030 @@ -1,34 +1,8 @@
1031 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1032 /*
1033 * Copyright 2013-2016 Freescale Semiconductor Inc.
1034 * Copyright 2016 NXP
1035 *
1036 - * Redistribution and use in source and binary forms, with or without
1037 - * modification, are permitted provided that the following conditions are met:
1038 - * * Redistributions of source code must retain the above copyright
1039 - * notice, this list of conditions and the following disclaimer.
1040 - * * Redistributions in binary form must reproduce the above copyright
1041 - * notice, this list of conditions and the following disclaimer in the
1042 - * documentation and/or other materials provided with the distribution.
1043 - * * Neither the name of the above-listed copyright holders nor the
1044 - * names of any contributors may be used to endorse or promote products
1045 - * derived from this software without specific prior written permission.
1046 - *
1047 - * ALTERNATIVELY, this software may be distributed under the terms of the
1048 - * GNU General Public License ("GPL") as published by the Free Software
1049 - * Foundation, either version 2 of that License or (at your option) any
1050 - * later version.
1051 - *
1052 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1053 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1054 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1055 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1056 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1057 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1058 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1059 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1060 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1061 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1062 - * POSSIBILITY OF SUCH DAMAGE.
1063 */
1064 #include <linux/kernel.h>
1065 #include "../../include/mc.h"
1066 @@ -222,3 +196,26 @@ int dpio_get_api_version(struct fsl_mc_i
1067
1068 return 0;
1069 }
1070 +
1071 +/**
1072 + * dpio_reset() - Reset the DPIO, returns the object to initial state.
1073 + * @mc_io: Pointer to MC portal's I/O object
1074 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
1075 + * @token: Token of DPIO object
1076 + *
1077 + * Return: '0' on Success; Error code otherwise.
1078 + */
1079 +int dpio_reset(struct fsl_mc_io *mc_io,
1080 + u32 cmd_flags,
1081 + u16 token)
1082 +{
1083 + struct fsl_mc_command cmd = { 0 };
1084 +
1085 + /* prepare command */
1086 + cmd.header = mc_encode_cmd_header(DPIO_CMDID_RESET,
1087 + cmd_flags,
1088 + token);
1089 +
1090 + /* send command to mc*/
1091 + return mc_send_command(mc_io, &cmd);
1092 +}
1093 --- a/drivers/staging/fsl-mc/bus/dpio/dpio.h
1094 +++ b/drivers/staging/fsl-mc/bus/dpio/dpio.h
1095 @@ -1,34 +1,8 @@
1096 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
1097 /*
1098 * Copyright 2013-2016 Freescale Semiconductor Inc.
1099 * Copyright 2016 NXP
1100 *
1101 - * Redistribution and use in source and binary forms, with or without
1102 - * modification, are permitted provided that the following conditions are met:
1103 - * * Redistributions of source code must retain the above copyright
1104 - * notice, this list of conditions and the following disclaimer.
1105 - * * Redistributions in binary form must reproduce the above copyright
1106 - * notice, this list of conditions and the following disclaimer in the
1107 - * documentation and/or other materials provided with the distribution.
1108 - * * Neither the name of the above-listed copyright holders nor the
1109 - * names of any contributors may be used to endorse or promote products
1110 - * derived from this software without specific prior written permission.
1111 - *
1112 - * ALTERNATIVELY, this software may be distributed under the terms of the
1113 - * GNU General Public License ("GPL") as published by the Free Software
1114 - * Foundation, either version 2 of that License or (at your option) any
1115 - * later version.
1116 - *
1117 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1118 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1119 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1120 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1121 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1122 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1123 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1124 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1125 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1126 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1127 - * POSSIBILITY OF SUCH DAMAGE.
1128 */
1129 #ifndef __FSL_DPIO_H
1130 #define __FSL_DPIO_H
1131 @@ -106,4 +80,8 @@ int dpio_get_api_version(struct fsl_mc_i
1132 u16 *major_ver,
1133 u16 *minor_ver);
1134
1135 +int dpio_reset(struct fsl_mc_io *mc_io,
1136 + u32 cmd_flags,
1137 + u16 token);
1138 +
1139 #endif /* __FSL_DPIO_H */
1140 --- a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
1141 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c
1142 @@ -1,33 +1,8 @@
1143 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
1144 /*
1145 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
1146 * Copyright 2016 NXP
1147 *
1148 - * Redistribution and use in source and binary forms, with or without
1149 - * modification, are permitted provided that the following conditions are met:
1150 - * * Redistributions of source code must retain the above copyright
1151 - * notice, this list of conditions and the following disclaimer.
1152 - * * Redistributions in binary form must reproduce the above copyright
1153 - * notice, this list of conditions and the following disclaimer in the
1154 - * documentation and/or other materials provided with the distribution.
1155 - * * Neither the name of Freescale Semiconductor nor the
1156 - * names of its contributors may be used to endorse or promote products
1157 - * derived from this software without specific prior written permission.
1158 - *
1159 - * ALTERNATIVELY, this software may be distributed under the terms of the
1160 - * GNU General Public License ("GPL") as published by the Free Software
1161 - * Foundation, either version 2 of that License or (at your option) any
1162 - * later version.
1163 - *
1164 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1165 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1166 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1167 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1168 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1169 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1170 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1171 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1172 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1173 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1174 */
1175
1176 #include <asm/cacheflush.h>
1177 @@ -37,23 +12,26 @@
1178
1179 #include "qbman-portal.h"
1180
1181 -#define QMAN_REV_4000 0x04000000
1182 -#define QMAN_REV_4100 0x04010000
1183 -#define QMAN_REV_4101 0x04010001
1184 -#define QMAN_REV_MASK 0xffff0000
1185 -
1186 /* All QBMan command and result structures use this "valid bit" encoding */
1187 #define QB_VALID_BIT ((u32)0x80)
1188
1189 /* QBMan portal management command codes */
1190 #define QBMAN_MC_ACQUIRE 0x30
1191 #define QBMAN_WQCHAN_CONFIGURE 0x46
1192 +#define QBMAN_MC_ORP 0x63
1193
1194 /* CINH register offsets */
1195 +#define QBMAN_CINH_SWP_EQCR_PI 0x800
1196 #define QBMAN_CINH_SWP_EQAR 0x8c0
1197 +#define QBMAN_CINH_SWP_CR_RT 0x900
1198 +#define QBMAN_CINH_SWP_VDQCR_RT 0x940
1199 +#define QBMAN_CINH_SWP_EQCR_AM_RT 0x980
1200 +#define QBMAN_CINH_SWP_RCR_AM_RT 0x9c0
1201 #define QBMAN_CINH_SWP_DQPI 0xa00
1202 #define QBMAN_CINH_SWP_DCAP 0xac0
1203 #define QBMAN_CINH_SWP_SDQCR 0xb00
1204 +#define QBMAN_CINH_SWP_EQCR_AM_RT2 0xb40
1205 +#define QBMAN_CINH_SWP_RCR_PI 0xc00
1206 #define QBMAN_CINH_SWP_RAR 0xcc0
1207 #define QBMAN_CINH_SWP_ISR 0xe00
1208 #define QBMAN_CINH_SWP_IER 0xe40
1209 @@ -68,6 +46,13 @@
1210 #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((u32)(vb) >> 1))
1211 #define QBMAN_CENA_SWP_VDQCR 0x780
1212
1213 +/* CENA register offsets in memory-backed mode */
1214 +#define QBMAN_CENA_SWP_DQRR_MEM(n) (0x800 + ((u32)(n) << 6))
1215 +#define QBMAN_CENA_SWP_RCR_MEM(n) (0x1400 + ((u32)(n) << 6))
1216 +#define QBMAN_CENA_SWP_CR_MEM 0x1600
1217 +#define QBMAN_CENA_SWP_RR_MEM 0x1680
1218 +#define QBMAN_CENA_SWP_VDQCR_MEM 0x1780
1219 +
1220 /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
1221 #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)(p) & 0x1ff) >> 6)
1222
1223 @@ -99,6 +84,14 @@ enum qbman_sdqcr_fc {
1224 qbman_sdqcr_fc_up_to_3 = 1
1225 };
1226
1227 +#define dccvac(p) { asm volatile("dc cvac, %0;" : : "r" (p) : "memory"); }
1228 +#define dcivac(p) { asm volatile("dc ivac, %0" : : "r"(p) : "memory"); }
1229 +static inline void qbman_inval_prefetch(struct qbman_swp *p, uint32_t offset)
1230 +{
1231 + dcivac(p->addr_cena + offset);
1232 + prefetch(p->addr_cena + offset);
1233 +}
1234 +
1235 /* Portal Access */
1236
1237 static inline u32 qbman_read_register(struct qbman_swp *p, u32 offset)
1238 @@ -121,10 +114,13 @@ static inline void *qbman_get_cmd(struct
1239
1240 #define SWP_CFG_DQRR_MF_SHIFT 20
1241 #define SWP_CFG_EST_SHIFT 16
1242 +#define SWP_CFG_CPBS_SHIFT 15
1243 #define SWP_CFG_WN_SHIFT 14
1244 #define SWP_CFG_RPM_SHIFT 12
1245 #define SWP_CFG_DCM_SHIFT 10
1246 #define SWP_CFG_EPM_SHIFT 8
1247 +#define SWP_CFG_VPM_SHIFT 7
1248 +#define SWP_CFG_CPM_SHIFT 6
1249 #define SWP_CFG_SD_SHIFT 5
1250 #define SWP_CFG_SP_SHIFT 4
1251 #define SWP_CFG_SE_SHIFT 3
1252 @@ -150,6 +146,8 @@ static inline u32 qbman_set_swp_cfg(u8 m
1253 ep << SWP_CFG_EP_SHIFT);
1254 }
1255
1256 +#define QMAN_RT_MODE 0x00000100
1257 +
1258 /**
1259 * qbman_swp_init() - Create a functional object representing the given
1260 * QBMan portal descriptor.
1261 @@ -171,6 +169,8 @@ struct qbman_swp *qbman_swp_init(const s
1262 p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;
1263 p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;
1264 p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;
1265 + if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
1266 + p->mr.valid_bit = QB_VALID_BIT;
1267
1268 atomic_set(&p->vdq.available, 1);
1269 p->vdq.valid_bit = QB_VALID_BIT;
1270 @@ -188,8 +188,11 @@ struct qbman_swp *qbman_swp_init(const s
1271 p->addr_cena = d->cena_bar;
1272 p->addr_cinh = d->cinh_bar;
1273
1274 + if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
1275 + memset(p->addr_cena, 0, 64 * 1024);
1276 +
1277 reg = qbman_set_swp_cfg(p->dqrr.dqrr_size,
1278 - 1, /* Writes Non-cacheable */
1279 + 0, /* Writes cacheable */
1280 0, /* EQCR_CI stashing threshold */
1281 3, /* RPM: Valid bit mode, RCR in array mode */
1282 2, /* DCM: Discrete consumption ack mode */
1283 @@ -200,6 +203,10 @@ struct qbman_swp *qbman_swp_init(const s
1284 1, /* dequeue stashing priority == TRUE */
1285 0, /* dequeue stashing enable == FALSE */
1286 0); /* EQCR_CI stashing priority == FALSE */
1287 + if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000)
1288 + reg |= 1 << SWP_CFG_CPBS_SHIFT | /* memory-backed mode */
1289 + 1 << SWP_CFG_VPM_SHIFT | /* VDQCR read triggered mode */
1290 + 1 << SWP_CFG_CPM_SHIFT; /* CR read triggered mode */
1291
1292 qbman_write_register(p, QBMAN_CINH_SWP_CFG, reg);
1293 reg = qbman_read_register(p, QBMAN_CINH_SWP_CFG);
1294 @@ -208,6 +215,10 @@ struct qbman_swp *qbman_swp_init(const s
1295 return NULL;
1296 }
1297
1298 + if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) {
1299 + qbman_write_register(p, QBMAN_CINH_SWP_EQCR_PI, QMAN_RT_MODE);
1300 + qbman_write_register(p, QBMAN_CINH_SWP_RCR_PI, QMAN_RT_MODE);
1301 + }
1302 /*
1303 * SDQCR needs to be initialized to 0 when no channels are
1304 * being dequeued from or else the QMan HW will indicate an
1305 @@ -302,7 +313,10 @@ void qbman_swp_interrupt_set_inhibit(str
1306 */
1307 void *qbman_swp_mc_start(struct qbman_swp *p)
1308 {
1309 - return qbman_get_cmd(p, QBMAN_CENA_SWP_CR);
1310 + if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
1311 + return qbman_get_cmd(p, QBMAN_CENA_SWP_CR);
1312 + else
1313 + return qbman_get_cmd(p, QBMAN_CENA_SWP_CR_MEM);
1314 }
1315
1316 /*
1317 @@ -313,8 +327,15 @@ void qbman_swp_mc_submit(struct qbman_sw
1318 {
1319 u8 *v = cmd;
1320
1321 - dma_wmb();
1322 - *v = cmd_verb | p->mc.valid_bit;
1323 + if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
1324 + dma_wmb();
1325 + *v = cmd_verb | p->mc.valid_bit;
1326 + dccvac(cmd);
1327 + } else {
1328 + *v = cmd_verb | p->mc.valid_bit;
1329 + dma_wmb();
1330 + qbman_write_register(p, QBMAN_CINH_SWP_CR_RT, QMAN_RT_MODE);
1331 + }
1332 }
1333
1334 /*
1335 @@ -325,13 +346,28 @@ void *qbman_swp_mc_result(struct qbman_s
1336 {
1337 u32 *ret, verb;
1338
1339 - ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
1340 + if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
1341 + qbman_inval_prefetch(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
1342 + ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
1343 + /* Remove the valid-bit - command completed if the rest
1344 + * is non-zero.
1345 + */
1346 + verb = ret[0] & ~QB_VALID_BIT;
1347 + if (!verb)
1348 + return NULL;
1349 + p->mc.valid_bit ^= QB_VALID_BIT;
1350 + } else {
1351 + ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR_MEM);
1352 + /* Command completed if the valid bit is toggled */
1353 + if (p->mr.valid_bit != (ret[0] & QB_VALID_BIT))
1354 + return NULL;
1355 + /* Command completed if the rest is non-zero */
1356 + verb = ret[0] & ~QB_VALID_BIT;
1357 + if (!verb)
1358 + return NULL;
1359 + p->mr.valid_bit ^= QB_VALID_BIT;
1360 + }
1361
1362 - /* Remove the valid-bit - command completed if the rest is non-zero */
1363 - verb = ret[0] & ~QB_VALID_BIT;
1364 - if (!verb)
1365 - return NULL;
1366 - p->mc.valid_bit ^= QB_VALID_BIT;
1367 return ret;
1368 }
1369
1370 @@ -370,6 +406,43 @@ void qbman_eq_desc_set_no_orp(struct qbm
1371 d->verb |= enqueue_rejects_to_fq;
1372 }
1373
1374 +/**
1375 + * qbman_eq_desc_set_orp() - Set order-restoration in the enqueue descriptor
1376 + * @d: the enqueue descriptor.
1377 + * @response_success: 1 = enqueue with response always; 0 = enqueue with
1378 + * rejections returned on a FQ.
1379 + * @oprid: the order point record id.
1380 + * @seqnum: the order restoration sequence number.
1381 + * @incomplete: indicates whether this is the last fragments using the same
1382 + * sequence number.
1383 + */
1384 +void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
1385 + u16 oprid, u16 seqnum, int incomplete)
1386 +{
1387 + d->verb |= (1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT);
1388 + if (respond_success)
1389 + d->verb |= enqueue_response_always;
1390 + else
1391 + d->verb |= enqueue_rejects_to_fq;
1392 + d->orpid = cpu_to_le16(oprid);
1393 + d->seqnum = cpu_to_le16((!!incomplete << 14) | seqnum);
1394 +}
1395 +
1396 +/**
1397 + * qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence
1398 + * without any enqueue
1399 + * @d: the enqueue descriptor.
1400 + * @oprid: the order point record id.
1401 + * @seqnum: the order restoration sequence number.
1402 + */
1403 +void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, u16 oprid,
1404 + u16 seqnum)
1405 +{
1406 + d->verb |= (1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT) | enqueue_empty;
1407 + d->orpid = cpu_to_le16(oprid);
1408 + d->seqnum = cpu_to_le16(seqnum);
1409 +}
1410 +
1411 /*
1412 * Exactly one of the following descriptor "targets" should be set. (Calling any
1413 * one of these will replace the effect of any prior call to one of these.)
1414 @@ -408,6 +481,18 @@ void qbman_eq_desc_set_qd(struct qbman_e
1415 #define EQAR_VB(eqar) ((eqar) & 0x80)
1416 #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
1417
1418 +static inline void qbman_write_eqcr_am_rt_register(struct qbman_swp *p,
1419 + u8 idx)
1420 +{
1421 + if (idx < 16)
1422 + qbman_write_register(p, QBMAN_CINH_SWP_EQCR_AM_RT + idx * 4,
1423 + QMAN_RT_MODE);
1424 + else
1425 + qbman_write_register(p, QBMAN_CINH_SWP_EQCR_AM_RT2 +
1426 + (idx - 16) * 4,
1427 + QMAN_RT_MODE);
1428 +}
1429 +
1430 /**
1431 * qbman_swp_enqueue() - Issue an enqueue command
1432 * @s: the software portal used for enqueue
1433 @@ -429,12 +514,29 @@ int qbman_swp_enqueue(struct qbman_swp *
1434 return -EBUSY;
1435
1436 p = qbman_get_cmd(s, QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
1437 - memcpy(&p->dca, &d->dca, 31);
1438 + /* This is mapped as DEVICE type memory, writes are
1439 + * with address alignment:
1440 + * desc.dca address alignment = 1
1441 + * desc.seqnum address alignment = 2
1442 + * desc.orpid address alignment = 4
1443 + * desc.tgtid address alignment = 8
1444 + */
1445 + p->dca = d->dca;
1446 + p->seqnum = d->seqnum;
1447 + p->orpid = d->orpid;
1448 + memcpy(&p->tgtid, &d->tgtid, 24);
1449 memcpy(&p->fd, fd, sizeof(*fd));
1450
1451 - /* Set the verb byte, have to substitute in the valid-bit */
1452 - dma_wmb();
1453 - p->verb = d->verb | EQAR_VB(eqar);
1454 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
1455 + /* Set the verb byte, have to substitute in the valid-bit */
1456 + dma_wmb();
1457 + p->verb = d->verb | EQAR_VB(eqar);
1458 + dccvac(p);
1459 + } else {
1460 + p->verb = d->verb | EQAR_VB(eqar);
1461 + dma_wmb();
1462 + qbman_write_eqcr_am_rt_register(s, EQAR_IDX(eqar));
1463 + }
1464
1465 return 0;
1466 }
1467 @@ -522,7 +624,7 @@ void qbman_pull_desc_set_storage(struct
1468 int stash)
1469 {
1470 /* save the virtual address */
1471 - d->rsp_addr_virt = (u64)storage;
1472 + d->rsp_addr_virt = (u64)(uintptr_t)storage;
1473
1474 if (!storage) {
1475 d->verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT);
1476 @@ -615,18 +717,28 @@ int qbman_swp_pull(struct qbman_swp *s,
1477 atomic_inc(&s->vdq.available);
1478 return -EBUSY;
1479 }
1480 - s->vdq.storage = (void *)d->rsp_addr_virt;
1481 - p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR);
1482 + s->vdq.storage = (void *)(uintptr_t)d->rsp_addr_virt;
1483 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
1484 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR);
1485 + else
1486 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR_MEM);
1487 p->numf = d->numf;
1488 p->tok = QMAN_DQ_TOKEN_VALID;
1489 p->dq_src = d->dq_src;
1490 p->rsp_addr = d->rsp_addr;
1491 p->rsp_addr_virt = d->rsp_addr_virt;
1492 - dma_wmb();
1493 -
1494 - /* Set the verb byte, have to substitute in the valid-bit */
1495 - p->verb = d->verb | s->vdq.valid_bit;
1496 - s->vdq.valid_bit ^= QB_VALID_BIT;
1497 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
1498 + dma_wmb();
1499 + /* Set the verb byte, have to substitute in the valid-bit */
1500 + p->verb = d->verb | s->vdq.valid_bit;
1501 + s->vdq.valid_bit ^= QB_VALID_BIT;
1502 + dccvac(p);
1503 + } else {
1504 + p->verb = d->verb | s->vdq.valid_bit;
1505 + s->vdq.valid_bit ^= QB_VALID_BIT;
1506 + dma_wmb();
1507 + qbman_write_register(s, QBMAN_CINH_SWP_VDQCR_RT, QMAN_RT_MODE);
1508 + }
1509
1510 return 0;
1511 }
1512 @@ -680,11 +792,13 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne
1513 s->dqrr.next_idx, pi);
1514 s->dqrr.reset_bug = 0;
1515 }
1516 - prefetch(qbman_get_cmd(s,
1517 - QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
1518 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
1519 }
1520
1521 - p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
1522 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
1523 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
1524 + else
1525 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR_MEM(s->dqrr.next_idx));
1526 verb = p->dq.verb;
1527
1528 /*
1529 @@ -696,8 +810,7 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne
1530 * knew from reading PI.
1531 */
1532 if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
1533 - prefetch(qbman_get_cmd(s,
1534 - QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
1535 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
1536 return NULL;
1537 }
1538 /*
1539 @@ -720,7 +833,7 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne
1540 (flags & DPAA2_DQ_STAT_EXPIRED))
1541 atomic_inc(&s->vdq.available);
1542
1543 - prefetch(qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)));
1544 + qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
1545
1546 return p;
1547 }
1548 @@ -836,18 +949,29 @@ int qbman_swp_release(struct qbman_swp *
1549 return -EBUSY;
1550
1551 /* Start the release command */
1552 - p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
1553 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000)
1554 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
1555 + else
1556 + p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR_MEM(RAR_IDX(rar)));
1557 /* Copy the caller's buffer pointers to the command */
1558 for (i = 0; i < num_buffers; i++)
1559 p->buf[i] = cpu_to_le64(buffers[i]);
1560 p->bpid = d->bpid;
1561
1562 - /*
1563 - * Set the verb byte, have to substitute in the valid-bit and the number
1564 - * of buffers.
1565 - */
1566 - dma_wmb();
1567 - p->verb = d->verb | RAR_VB(rar) | num_buffers;
1568 + if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) {
1569 + /*
1570 + * Set the verb byte, have to substitute in the valid-bit
1571 + * and the number of buffers.
1572 + */
1573 + dma_wmb();
1574 + p->verb = d->verb | RAR_VB(rar) | num_buffers;
1575 + dccvac(p);
1576 + } else {
1577 + p->verb = d->verb | RAR_VB(rar) | num_buffers;
1578 + dma_wmb();
1579 + qbman_write_register(s, QBMAN_CINH_SWP_RCR_AM_RT +
1580 + RAR_IDX(rar) * 4, QMAN_RT_MODE);
1581 + }
1582
1583 return 0;
1584 }
1585 @@ -855,7 +979,7 @@ int qbman_swp_release(struct qbman_swp *
1586 struct qbman_acquire_desc {
1587 u8 verb;
1588 u8 reserved;
1589 - u16 bpid;
1590 + __le16 bpid;
1591 u8 num;
1592 u8 reserved2[59];
1593 };
1594 @@ -863,10 +987,10 @@ struct qbman_acquire_desc {
1595 struct qbman_acquire_rslt {
1596 u8 verb;
1597 u8 rslt;
1598 - u16 reserved;
1599 + __le16 reserved;
1600 u8 num;
1601 u8 reserved2[3];
1602 - u64 buf[7];
1603 + __le64 buf[7];
1604 };
1605
1606 /**
1607 @@ -929,7 +1053,7 @@ int qbman_swp_acquire(struct qbman_swp *
1608 struct qbman_alt_fq_state_desc {
1609 u8 verb;
1610 u8 reserved[3];
1611 - u32 fqid;
1612 + __le32 fqid;
1613 u8 reserved2[56];
1614 };
1615
1616 @@ -952,7 +1076,7 @@ int qbman_swp_alt_fq_state(struct qbman_
1617 if (!p)
1618 return -EBUSY;
1619
1620 - p->fqid = cpu_to_le32(fqid) & ALT_FQ_FQID_MASK;
1621 + p->fqid = cpu_to_le32(fqid & ALT_FQ_FQID_MASK);
1622
1623 /* Complete the management command */
1624 r = qbman_swp_mc_complete(s, p, alt_fq_verb);
1625 @@ -978,11 +1102,11 @@ int qbman_swp_alt_fq_state(struct qbman_
1626 struct qbman_cdan_ctrl_desc {
1627 u8 verb;
1628 u8 reserved;
1629 - u16 ch;
1630 + __le16 ch;
1631 u8 we;
1632 u8 ctrl;
1633 - u16 reserved2;
1634 - u64 cdan_ctx;
1635 + __le16 reserved2;
1636 + __le64 cdan_ctx;
1637 u8 reserved3[48];
1638
1639 };
1640 @@ -990,7 +1114,7 @@ struct qbman_cdan_ctrl_desc {
1641 struct qbman_cdan_ctrl_rslt {
1642 u8 verb;
1643 u8 rslt;
1644 - u16 ch;
1645 + __le16 ch;
1646 u8 reserved[60];
1647 };
1648
1649 @@ -1031,5 +1155,152 @@ int qbman_swp_CDAN_set(struct qbman_swp
1650 return -EIO;
1651 }
1652
1653 + return 0;
1654 +}
1655 +
1656 +#define QBMAN_RESPONSE_VERB_MASK 0x7f
1657 +#define QBMAN_FQ_QUERY_NP 0x45
1658 +#define QBMAN_BP_QUERY 0x32
1659 +
1660 +struct qbman_fq_query_desc {
1661 + u8 verb;
1662 + u8 reserved[3];
1663 + __le32 fqid;
1664 + u8 reserved2[56];
1665 +};
1666 +
1667 +int qbman_fq_query_state(struct qbman_swp *s, u32 fqid,
1668 + struct qbman_fq_query_np_rslt *r)
1669 +{
1670 + struct qbman_fq_query_desc *p;
1671 + void *resp;
1672 +
1673 + p = (struct qbman_fq_query_desc *)qbman_swp_mc_start(s);
1674 + if (!p)
1675 + return -EBUSY;
1676 +
1677 + /* FQID is a 24 bit value */
1678 + p->fqid = cpu_to_le32(fqid & 0x00FFFFFF);
1679 + resp = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY_NP);
1680 + if (!resp) {
1681 + pr_err("qbman: Query FQID %d NP fields failed, no response\n",
1682 + fqid);
1683 + return -EIO;
1684 + }
1685 + *r = *(struct qbman_fq_query_np_rslt *)resp;
1686 + /* Decode the outcome */
1687 + WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_FQ_QUERY_NP);
1688 +
1689 + /* Determine success or failure */
1690 + if (r->rslt != QBMAN_MC_RSLT_OK) {
1691 + pr_err("Query NP fields of FQID 0x%x failed, code=0x%02x\n",
1692 + p->fqid, r->rslt);
1693 + return -EIO;
1694 + }
1695 +
1696 + return 0;
1697 +}
1698 +
1699 +u32 qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r)
1700 +{
1701 + return (le32_to_cpu(r->frm_cnt) & 0x00FFFFFF);
1702 +}
1703 +
1704 +u32 qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r)
1705 +{
1706 + return le32_to_cpu(r->byte_cnt);
1707 +}
1708 +
1709 +struct qbman_bp_query_desc {
1710 + u8 verb;
1711 + u8 reserved;
1712 + __le16 bpid;
1713 + u8 reserved2[60];
1714 +};
1715 +
1716 +int qbman_bp_query(struct qbman_swp *s, u16 bpid,
1717 + struct qbman_bp_query_rslt *r)
1718 +{
1719 + struct qbman_bp_query_desc *p;
1720 + void *resp;
1721 +
1722 + p = (struct qbman_bp_query_desc *)qbman_swp_mc_start(s);
1723 + if (!p)
1724 + return -EBUSY;
1725 +
1726 + p->bpid = cpu_to_le16(bpid);
1727 + resp = qbman_swp_mc_complete(s, p, QBMAN_BP_QUERY);
1728 + if (!resp) {
1729 + pr_err("qbman: Query BPID %d fields failed, no response\n",
1730 + bpid);
1731 + return -EIO;
1732 + }
1733 + *r = *(struct qbman_bp_query_rslt *)resp;
1734 + /* Decode the outcome */
1735 + WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_BP_QUERY);
1736 +
1737 + /* Determine success or failure */
1738 + if (r->rslt != QBMAN_MC_RSLT_OK) {
1739 + pr_err("Query fields of BPID 0x%x failed, code=0x%02x\n",
1740 + bpid, r->rslt);
1741 + return -EIO;
1742 + }
1743 +
1744 + return 0;
1745 +}
1746 +
1747 +u32 qbman_bp_info_num_free_bufs(struct qbman_bp_query_rslt *a)
1748 +{
1749 + return le32_to_cpu(a->fill);
1750 +}
1751 +
1752 +struct qbman_orp_cmd_desc {
1753 + u8 verb;
1754 + u8 reserved;
1755 + u8 cid;
1756 + u8 reserved2;
1757 + u16 orpid;
1758 + u16 seqnum;
1759 + u8 reserved3[56];
1760 +};
1761 +
1762 +struct qbman_orp_cmd_rslt {
1763 + u8 verb;
1764 + u8 rslt;
1765 + u8 cid;
1766 + u8 reserved1[61];
1767 +};
1768 +
1769 +int qbman_orp_drop(struct qbman_swp *s, u16 orpid, u16 seqnum)
1770 +{
1771 + struct qbman_orp_cmd_desc *p;
1772 + struct qbman_orp_cmd_rslt *r;
1773 + void *resp;
1774 +
1775 + p = (struct qbman_orp_cmd_desc *)qbman_swp_mc_start(s);
1776 + if (!p)
1777 + return -EBUSY;
1778 +
1779 + p->cid = 0x7;
1780 + p->orpid = cpu_to_le16(orpid);
1781 + p->seqnum = cpu_to_le16(seqnum);
1782 +
1783 + resp = qbman_swp_mc_complete(s, p, QBMAN_MC_ORP);
1784 + if (!resp) {
1785 + pr_err("qbman: Drop sequence num %d orpid 0x%x failed, no response\n",
1786 + seqnum, orpid);
1787 + return -EIO;
1788 + }
1789 + r = (struct qbman_orp_cmd_rslt *)resp;
1790 + /* Decode the outcome */
1791 + WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_MC_ORP);
1792 +
1793 + /* Determine success or failure */
1794 + if (r->rslt != QBMAN_MC_RSLT_OK) {
1795 + pr_err("Drop seqnum %d of prpid 0x%x failed, code=0x%02x\n",
1796 + seqnum, orpid, r->rslt);
1797 + return -EIO;
1798 + }
1799 +
1800 return 0;
1801 }
1802 --- a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h
1803 +++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h
1804 @@ -1,46 +1,28 @@
1805 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
1806 /*
1807 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
1808 - * Copyright 2016 NXP
1809 + * Copyright 2016-2019 NXP
1810 *
1811 - * Redistribution and use in source and binary forms, with or without
1812 - * modification, are permitted provided that the following conditions are met:
1813 - * * Redistributions of source code must retain the above copyright
1814 - * notice, this list of conditions and the following disclaimer.
1815 - * * Redistributions in binary form must reproduce the above copyright
1816 - * notice, this list of conditions and the following disclaimer in the
1817 - * documentation and/or other materials provided with the distribution.
1818 - * * Neither the name of Freescale Semiconductor nor the
1819 - * names of its contributors may be used to endorse or promote products
1820 - * derived from this software without specific prior written permission.
1821 - *
1822 - * ALTERNATIVELY, this software may be distributed under the terms of the
1823 - * GNU General Public License ("GPL") as published by the Free Software
1824 - * Foundation, either version 2 of that License or (at your option) any
1825 - * later version.
1826 - *
1827 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
1828 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
1829 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
1830 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
1831 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
1832 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
1833 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
1834 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1835 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
1836 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1837 */
1838 #ifndef __FSL_QBMAN_PORTAL_H
1839 #define __FSL_QBMAN_PORTAL_H
1840
1841 #include "../../include/dpaa2-fd.h"
1842
1843 +#define QMAN_REV_4000 0x04000000
1844 +#define QMAN_REV_4100 0x04010000
1845 +#define QMAN_REV_4101 0x04010001
1846 +#define QMAN_REV_5000 0x05000000
1847 +
1848 +#define QMAN_REV_MASK 0xffff0000
1849 +
1850 struct dpaa2_dq;
1851 struct qbman_swp;
1852
1853 /* qbman software portal descriptor structure */
1854 struct qbman_swp_desc {
1855 void *cena_bar; /* Cache-enabled portal base address */
1856 - void *cinh_bar; /* Cache-inhibited portal base address */
1857 + void __iomem *cinh_bar; /* Cache-inhibited portal base address */
1858 u32 qman_version;
1859 };
1860
1861 @@ -57,8 +39,8 @@ struct qbman_pull_desc {
1862 u8 numf;
1863 u8 tok;
1864 u8 reserved;
1865 - u32 dq_src;
1866 - u64 rsp_addr;
1867 + __le32 dq_src;
1868 + __le64 rsp_addr;
1869 u64 rsp_addr_virt;
1870 u8 padding[40];
1871 };
1872 @@ -95,17 +77,17 @@ enum qbman_pull_type_e {
1873 struct qbman_eq_desc {
1874 u8 verb;
1875 u8 dca;
1876 - u16 seqnum;
1877 - u16 orpid;
1878 - u16 reserved1;
1879 - u32 tgtid;
1880 - u32 tag;
1881 - u16 qdbin;
1882 + __le16 seqnum;
1883 + __le16 orpid;
1884 + __le16 reserved1;
1885 + __le32 tgtid;
1886 + __le32 tag;
1887 + __le16 qdbin;
1888 u8 qpri;
1889 u8 reserved[3];
1890 u8 wae;
1891 u8 rspid;
1892 - u64 rsp_addr;
1893 + __le64 rsp_addr;
1894 u8 fd[32];
1895 };
1896
1897 @@ -113,9 +95,9 @@ struct qbman_eq_desc {
1898 struct qbman_release_desc {
1899 u8 verb;
1900 u8 reserved;
1901 - u16 bpid;
1902 - u32 reserved2;
1903 - u64 buf[7];
1904 + __le16 bpid;
1905 + __le32 reserved2;
1906 + __le64 buf[7];
1907 };
1908
1909 /* Management command result codes */
1910 @@ -127,7 +109,7 @@ struct qbman_release_desc {
1911 /* portal data structure */
1912 struct qbman_swp {
1913 const struct qbman_swp_desc *desc;
1914 - void __iomem *addr_cena;
1915 + void *addr_cena;
1916 void __iomem *addr_cinh;
1917
1918 /* Management commands */
1919 @@ -135,6 +117,11 @@ struct qbman_swp {
1920 u32 valid_bit; /* 0x00 or 0x80 */
1921 } mc;
1922
1923 + /* Management response */
1924 + struct {
1925 + u32 valid_bit; /* 0x00 or 0x80 */
1926 + } mr;
1927 +
1928 /* Push dequeues */
1929 u32 sdq;
1930
1931 @@ -187,6 +174,9 @@ int qbman_result_has_new_result(struct q
1932
1933 void qbman_eq_desc_clear(struct qbman_eq_desc *d);
1934 void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);
1935 +void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
1936 + u16 oprid, u16 seqnum, int incomplete);
1937 +void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, u16 oprid, u16 seqnum);
1938 void qbman_eq_desc_set_token(struct qbman_eq_desc *d, u8 token);
1939 void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, u32 fqid);
1940 void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, u32 qdid,
1941 @@ -195,6 +185,8 @@ void qbman_eq_desc_set_qd(struct qbman_e
1942 int qbman_swp_enqueue(struct qbman_swp *p, const struct qbman_eq_desc *d,
1943 const struct dpaa2_fd *fd);
1944
1945 +int qbman_orp_drop(struct qbman_swp *s, u16 orpid, u16 seqnum);
1946 +
1947 void qbman_release_desc_clear(struct qbman_release_desc *d);
1948 void qbman_release_desc_set_bpid(struct qbman_release_desc *d, u16 bpid);
1949 void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable);
1950 @@ -453,7 +445,7 @@ static inline int qbman_swp_CDAN_set_con
1951 static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
1952 u8 cmd_verb)
1953 {
1954 - int loopvar = 1000;
1955 + int loopvar = 2000;
1956
1957 qbman_swp_mc_submit(swp, cmd, cmd_verb);
1958
1959 @@ -466,4 +458,62 @@ static inline void *qbman_swp_mc_complet
1960 return cmd;
1961 }
1962
1963 +/* Query APIs */
1964 +struct qbman_fq_query_np_rslt {
1965 + u8 verb;
1966 + u8 rslt;
1967 + u8 st1;
1968 + u8 st2;
1969 + u8 reserved[2];
1970 + __le16 od1_sfdr;
1971 + __le16 od2_sfdr;
1972 + __le16 od3_sfdr;
1973 + __le16 ra1_sfdr;
1974 + __le16 ra2_sfdr;
1975 + __le32 pfdr_hptr;
1976 + __le32 pfdr_tptr;
1977 + __le32 frm_cnt;
1978 + __le32 byte_cnt;
1979 + __le16 ics_surp;
1980 + u8 is;
1981 + u8 reserved2[29];
1982 +};
1983 +
1984 +int qbman_fq_query_state(struct qbman_swp *s, u32 fqid,
1985 + struct qbman_fq_query_np_rslt *r);
1986 +u32 qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r);
1987 +u32 qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r);
1988 +
1989 +struct qbman_bp_query_rslt {
1990 + u8 verb;
1991 + u8 rslt;
1992 + u8 reserved[4];
1993 + u8 bdi;
1994 + u8 state;
1995 + __le32 fill;
1996 + __le32 hdotr;
1997 + __le16 swdet;
1998 + __le16 swdxt;
1999 + __le16 hwdet;
2000 + __le16 hwdxt;
2001 + __le16 swset;
2002 + __le16 swsxt;
2003 + __le16 vbpid;
2004 + __le16 icid;
2005 + __le64 bpscn_addr;
2006 + __le64 bpscn_ctx;
2007 + __le16 hw_targ;
2008 + u8 dbe;
2009 + u8 reserved2;
2010 + u8 sdcnt;
2011 + u8 hdcnt;
2012 + u8 sscnt;
2013 + u8 reserved3[9];
2014 +};
2015 +
2016 +int qbman_bp_query(struct qbman_swp *s, u16 bpid,
2017 + struct qbman_bp_query_rslt *r);
2018 +
2019 +u32 qbman_bp_info_num_free_bufs(struct qbman_bp_query_rslt *a);
2020 +
2021 #endif /* __FSL_QBMAN_PORTAL_H */
2022 --- a/drivers/staging/fsl-mc/bus/dpmcp.c
2023 +++ b/drivers/staging/fsl-mc/bus/dpmcp.c
2024 @@ -1,33 +1,7 @@
2025 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2026 /*
2027 * Copyright 2013-2016 Freescale Semiconductor Inc.
2028 *
2029 - * Redistribution and use in source and binary forms, with or without
2030 - * modification, are permitted provided that the following conditions are met:
2031 - * * Redistributions of source code must retain the above copyright
2032 - * notice, this list of conditions and the following disclaimer.
2033 - * * Redistributions in binary form must reproduce the above copyright
2034 - * notice, this list of conditions and the following disclaimer in the
2035 - * documentation and/or other materials provided with the distribution.
2036 - * * Neither the name of the above-listed copyright holders nor the
2037 - * names of any contributors may be used to endorse or promote products
2038 - * derived from this software without specific prior written permission.
2039 - *
2040 - * ALTERNATIVELY, this software may be distributed under the terms of the
2041 - * GNU General Public License ("GPL") as published by the Free Software
2042 - * Foundation, either version 2 of that License or (at your option) any
2043 - * later version.
2044 - *
2045 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2046 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2047 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2048 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2049 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2050 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2051 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2052 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2053 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2054 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2055 - * POSSIBILITY OF SUCH DAMAGE.
2056 */
2057 #include <linux/kernel.h>
2058 #include "../include/mc.h"
2059 --- a/drivers/staging/fsl-mc/bus/dprc-driver.c
2060 +++ b/drivers/staging/fsl-mc/bus/dprc-driver.c
2061 @@ -1,12 +1,10 @@
2062 +// SPDX-License-Identifier: GPL-2.0
2063 /*
2064 * Freescale data path resource container (DPRC) driver
2065 *
2066 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
2067 * Author: German Rivera <German.Rivera@freescale.com>
2068 *
2069 - * This file is licensed under the terms of the GNU General Public
2070 - * License version 2. This program is licensed "as is" without any
2071 - * warranty of any kind, whether express or implied.
2072 */
2073
2074 #include <linux/module.h>
2075 --- a/drivers/staging/fsl-mc/bus/dprc.c
2076 +++ b/drivers/staging/fsl-mc/bus/dprc.c
2077 @@ -1,33 +1,7 @@
2078 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2079 /*
2080 * Copyright 2013-2016 Freescale Semiconductor Inc.
2081 *
2082 - * Redistribution and use in source and binary forms, with or without
2083 - * modification, are permitted provided that the following conditions are met:
2084 - * * Redistributions of source code must retain the above copyright
2085 - * notice, this list of conditions and the following disclaimer.
2086 - * * Redistributions in binary form must reproduce the above copyright
2087 - * notice, this list of conditions and the following disclaimer in the
2088 - * documentation and/or other materials provided with the distribution.
2089 - * * Neither the name of the above-listed copyright holders nor the
2090 - * names of any contributors may be used to endorse or promote products
2091 - * derived from this software without specific prior written permission.
2092 - *
2093 - * ALTERNATIVELY, this software may be distributed under the terms of the
2094 - * GNU General Public License ("GPL") as published by the Free Software
2095 - * Foundation, either version 2 of that License or (at your option) any
2096 - * later version.
2097 - *
2098 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2099 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2100 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2101 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2102 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2103 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2104 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2105 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2106 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2107 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2108 - * POSSIBILITY OF SUCH DAMAGE.
2109 */
2110 #include <linux/kernel.h>
2111 #include "../include/mc.h"
2112 --- a/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
2113 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
2114 @@ -1,11 +1,9 @@
2115 +// SPDX-License-Identifier: GPL-2.0
2116 /*
2117 * fsl-mc object allocator driver
2118 *
2119 * Copyright (C) 2013-2016 Freescale Semiconductor, Inc.
2120 *
2121 - * This file is licensed under the terms of the GNU General Public
2122 - * License version 2. This program is licensed "as is" without any
2123 - * warranty of any kind, whether express or implied.
2124 */
2125
2126 #include <linux/module.h>
2127 --- a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
2128 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c
2129 @@ -1,12 +1,10 @@
2130 +// SPDX-License-Identifier: GPL-2.0
2131 /*
2132 * Freescale Management Complex (MC) bus driver
2133 *
2134 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
2135 * Author: German Rivera <German.Rivera@freescale.com>
2136 *
2137 - * This file is licensed under the terms of the GNU General Public
2138 - * License version 2. This program is licensed "as is" without any
2139 - * warranty of any kind, whether express or implied.
2140 */
2141
2142 #define pr_fmt(fmt) "fsl-mc: " fmt
2143 --- a/drivers/staging/fsl-mc/bus/fsl-mc-msi.c
2144 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-msi.c
2145 @@ -1,12 +1,10 @@
2146 +// SPDX-License-Identifier: GPL-2.0
2147 /*
2148 * Freescale Management Complex (MC) bus driver MSI support
2149 *
2150 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
2151 * Author: German Rivera <German.Rivera@freescale.com>
2152 *
2153 - * This file is licensed under the terms of the GNU General Public
2154 - * License version 2. This program is licensed "as is" without any
2155 - * warranty of any kind, whether express or implied.
2156 */
2157
2158 #include <linux/of_device.h>
2159 --- a/drivers/staging/fsl-mc/bus/fsl-mc-private.h
2160 +++ b/drivers/staging/fsl-mc/bus/fsl-mc-private.h
2161 @@ -1,11 +1,9 @@
2162 +/* SPDX-License-Identifier: GPL-2.0 */
2163 /*
2164 * Freescale Management Complex (MC) bus private declarations
2165 *
2166 * Copyright (C) 2016 Freescale Semiconductor, Inc.
2167 *
2168 - * This file is licensed under the terms of the GNU General Public
2169 - * License version 2. This program is licensed "as is" without any
2170 - * warranty of any kind, whether express or implied.
2171 */
2172 #ifndef _FSL_MC_PRIVATE_H_
2173 #define _FSL_MC_PRIVATE_H_
2174 --- a/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c
2175 +++ b/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c
2176 @@ -1,12 +1,10 @@
2177 +// SPDX-License-Identifier: GPL-2.0
2178 /*
2179 * Freescale Management Complex (MC) bus driver MSI support
2180 *
2181 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
2182 * Author: German Rivera <German.Rivera@freescale.com>
2183 *
2184 - * This file is licensed under the terms of the GNU General Public
2185 - * License version 2. This program is licensed "as is" without any
2186 - * warranty of any kind, whether express or implied.
2187 */
2188
2189 #include <linux/of_device.h>
2190 --- a/drivers/staging/fsl-mc/bus/mc-io.c
2191 +++ b/drivers/staging/fsl-mc/bus/mc-io.c
2192 @@ -1,33 +1,7 @@
2193 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2194 /*
2195 * Copyright 2013-2016 Freescale Semiconductor Inc.
2196 *
2197 - * Redistribution and use in source and binary forms, with or without
2198 - * modification, are permitted provided that the following conditions are met:
2199 - * * Redistributions of source code must retain the above copyright
2200 - * notice, this list of conditions and the following disclaimer.
2201 - * * Redistributions in binary form must reproduce the above copyright
2202 - * notice, this list of conditions and the following disclaimer in the
2203 - * documentation and/or other materials provided with the distribution.
2204 - * * Neither the name of the above-listed copyright holders nor the
2205 - * names of any contributors may be used to endorse or promote products
2206 - * derived from this software without specific prior written permission.
2207 - *
2208 - * ALTERNATIVELY, this software may be distributed under the terms of the
2209 - * GNU General Public License ("GPL") as published by the Free Software
2210 - * Foundation, either version 2 of that License or (at your option) any
2211 - * later version.
2212 - *
2213 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2214 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2215 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2216 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2217 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2218 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2219 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2220 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2221 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2222 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2223 - * POSSIBILITY OF SUCH DAMAGE.
2224 */
2225
2226 #include <linux/io.h>
2227 --- a/drivers/staging/fsl-mc/bus/mc-sys.c
2228 +++ b/drivers/staging/fsl-mc/bus/mc-sys.c
2229 @@ -1,35 +1,9 @@
2230 +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2231 /*
2232 * Copyright 2013-2016 Freescale Semiconductor Inc.
2233 *
2234 * I/O services to send MC commands to the MC hardware
2235 *
2236 - * Redistribution and use in source and binary forms, with or without
2237 - * modification, are permitted provided that the following conditions are met:
2238 - * * Redistributions of source code must retain the above copyright
2239 - * notice, this list of conditions and the following disclaimer.
2240 - * * Redistributions in binary form must reproduce the above copyright
2241 - * notice, this list of conditions and the following disclaimer in the
2242 - * documentation and/or other materials provided with the distribution.
2243 - * * Neither the name of the above-listed copyright holders nor the
2244 - * names of any contributors may be used to endorse or promote products
2245 - * derived from this software without specific prior written permission.
2246 - *
2247 - * ALTERNATIVELY, this software may be distributed under the terms of the
2248 - * GNU General Public License ("GPL") as published by the Free Software
2249 - * Foundation, either version 2 of that License or (at your option) any
2250 - * later version.
2251 - *
2252 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2253 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2254 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2255 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2256 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2257 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2258 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2259 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2260 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2261 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2262 - * POSSIBILITY OF SUCH DAMAGE.
2263 */
2264
2265 #include <linux/delay.h>
2266 --- a/drivers/staging/fsl-mc/include/dpaa2-fd.h
2267 +++ b/drivers/staging/fsl-mc/include/dpaa2-fd.h
2268 @@ -1,33 +1,8 @@
2269 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2270 /*
2271 * Copyright 2014-2016 Freescale Semiconductor Inc.
2272 * Copyright 2016 NXP
2273 *
2274 - * Redistribution and use in source and binary forms, with or without
2275 - * modification, are permitted provided that the following conditions are met:
2276 - * * Redistributions of source code must retain the above copyright
2277 - * notice, this list of conditions and the following disclaimer.
2278 - * * Redistributions in binary form must reproduce the above copyright
2279 - * notice, this list of conditions and the following disclaimer in the
2280 - * documentation and/or other materials provided with the distribution.
2281 - * * Neither the name of Freescale Semiconductor nor the
2282 - * names of its contributors may be used to endorse or promote products
2283 - * derived from this software without specific prior written permission.
2284 - *
2285 - * ALTERNATIVELY, this software may be distributed under the terms of the
2286 - * GNU General Public License ("GPL") as published by the Free Software
2287 - * Foundation, either version 2 of that License or (at your option) any
2288 - * later version.
2289 - *
2290 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
2291 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2292 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2293 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
2294 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2295 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2296 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2297 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2298 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2299 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2300 */
2301 #ifndef __FSL_DPAA2_FD_H
2302 #define __FSL_DPAA2_FD_H
2303 @@ -91,6 +66,27 @@ struct dpaa2_fd {
2304 #define SG_BPID_MASK 0x3FFF
2305 #define SG_FINAL_FLAG_MASK 0x1
2306 #define SG_FINAL_FLAG_SHIFT 15
2307 +#define FL_SHORT_LEN_FLAG_MASK 0x1
2308 +#define FL_SHORT_LEN_FLAG_SHIFT 14
2309 +#define FL_SHORT_LEN_MASK 0x3FFFF
2310 +#define FL_OFFSET_MASK 0x0FFF
2311 +#define FL_FORMAT_MASK 0x3
2312 +#define FL_FORMAT_SHIFT 12
2313 +#define FL_BPID_MASK 0x3FFF
2314 +#define FL_FINAL_FLAG_MASK 0x1
2315 +#define FL_FINAL_FLAG_SHIFT 15
2316 +
2317 +/* Error bits in FD CTRL */
2318 +#define FD_CTRL_ERR_MASK 0x000000FF
2319 +#define FD_CTRL_UFD 0x00000004
2320 +#define FD_CTRL_SBE 0x00000008
2321 +#define FD_CTRL_FLC 0x00000010
2322 +#define FD_CTRL_FSE 0x00000020
2323 +#define FD_CTRL_FAERR 0x00000040
2324 +
2325 +/* Annotation bits in FD CTRL */
2326 +#define FD_CTRL_PTA 0x00800000
2327 +#define FD_CTRL_PTV1 0x00400000
2328
2329 enum dpaa2_fd_format {
2330 dpaa2_fd_single = 0,
2331 @@ -312,7 +308,7 @@ enum dpaa2_sg_format {
2332 */
2333 static inline dma_addr_t dpaa2_sg_get_addr(const struct dpaa2_sg_entry *sg)
2334 {
2335 - return le64_to_cpu((dma_addr_t)sg->addr);
2336 + return (dma_addr_t)le64_to_cpu(sg->addr);
2337 }
2338
2339 /**
2340 @@ -443,9 +439,243 @@ static inline bool dpaa2_sg_is_final(con
2341 */
2342 static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final)
2343 {
2344 - sg->format_offset &= cpu_to_le16(~(SG_FINAL_FLAG_MASK
2345 - << SG_FINAL_FLAG_SHIFT));
2346 + sg->format_offset &= cpu_to_le16((~(SG_FINAL_FLAG_MASK
2347 + << SG_FINAL_FLAG_SHIFT)) & 0xFFFF);
2348 sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT);
2349 }
2350
2351 +/**
2352 + * struct dpaa2_fl_entry - structure for frame list entry.
2353 + * @addr: address in the FLE
2354 + * @len: length in the FLE
2355 + * @bpid: buffer pool ID
2356 + * @format_offset: format, offset, and short-length fields
2357 + * @frc: frame context
2358 + * @ctrl: control bits...including pta, pvt1, pvt2, err, etc
2359 + * @flc: flow context address
2360 + */
2361 +struct dpaa2_fl_entry {
2362 + __le64 addr;
2363 + __le32 len;
2364 + __le16 bpid;
2365 + __le16 format_offset;
2366 + __le32 frc;
2367 + __le32 ctrl;
2368 + __le64 flc;
2369 +};
2370 +
2371 +enum dpaa2_fl_format {
2372 + dpaa2_fl_single = 0,
2373 + dpaa2_fl_res,
2374 + dpaa2_fl_sg
2375 +};
2376 +
2377 +/**
2378 + * dpaa2_fl_get_addr() - get the addr field of FLE
2379 + * @fle: the given frame list entry
2380 + *
2381 + * Return the address in the frame list entry.
2382 + */
2383 +static inline dma_addr_t dpaa2_fl_get_addr(const struct dpaa2_fl_entry *fle)
2384 +{
2385 + return (dma_addr_t)le64_to_cpu(fle->addr);
2386 +}
2387 +
2388 +/**
2389 + * dpaa2_fl_set_addr() - Set the addr field of FLE
2390 + * @fle: the given frame list entry
2391 + * @addr: the address needs to be set in frame list entry
2392 + */
2393 +static inline void dpaa2_fl_set_addr(struct dpaa2_fl_entry *fle,
2394 + dma_addr_t addr)
2395 +{
2396 + fle->addr = cpu_to_le64(addr);
2397 +}
2398 +
2399 +/**
2400 + * dpaa2_fl_get_frc() - Get the frame context in the FLE
2401 + * @fle: the given frame list entry
2402 + *
2403 + * Return the frame context field in the frame lsit entry.
2404 + */
2405 +static inline u32 dpaa2_fl_get_frc(const struct dpaa2_fl_entry *fle)
2406 +{
2407 + return le32_to_cpu(fle->frc);
2408 +}
2409 +
2410 +/**
2411 + * dpaa2_fl_set_frc() - Set the frame context in the FLE
2412 + * @fle: the given frame list entry
2413 + * @frc: the frame context needs to be set in frame list entry
2414 + */
2415 +static inline void dpaa2_fl_set_frc(struct dpaa2_fl_entry *fle, u32 frc)
2416 +{
2417 + fle->frc = cpu_to_le32(frc);
2418 +}
2419 +
2420 +/**
2421 + * dpaa2_fl_get_ctrl() - Get the control bits in the FLE
2422 + * @fle: the given frame list entry
2423 + *
2424 + * Return the control bits field in the frame list entry.
2425 + */
2426 +static inline u32 dpaa2_fl_get_ctrl(const struct dpaa2_fl_entry *fle)
2427 +{
2428 + return le32_to_cpu(fle->ctrl);
2429 +}
2430 +
2431 +/**
2432 + * dpaa2_fl_set_ctrl() - Set the control bits in the FLE
2433 + * @fle: the given frame list entry
2434 + * @ctrl: the control bits to be set in the frame list entry
2435 + */
2436 +static inline void dpaa2_fl_set_ctrl(struct dpaa2_fl_entry *fle, u32 ctrl)
2437 +{
2438 + fle->ctrl = cpu_to_le32(ctrl);
2439 +}
2440 +
2441 +/**
2442 + * dpaa2_fl_get_flc() - Get the flow context in the FLE
2443 + * @fle: the given frame list entry
2444 + *
2445 + * Return the flow context in the frame list entry.
2446 + */
2447 +static inline dma_addr_t dpaa2_fl_get_flc(const struct dpaa2_fl_entry *fle)
2448 +{
2449 + return (dma_addr_t)le64_to_cpu(fle->flc);
2450 +}
2451 +
2452 +/**
2453 + * dpaa2_fl_set_flc() - Set the flow context field of FLE
2454 + * @fle: the given frame list entry
2455 + * @flc_addr: the flow context needs to be set in frame list entry
2456 + */
2457 +static inline void dpaa2_fl_set_flc(struct dpaa2_fl_entry *fle,
2458 + dma_addr_t flc_addr)
2459 +{
2460 + fle->flc = cpu_to_le64(flc_addr);
2461 +}
2462 +
2463 +static inline bool dpaa2_fl_short_len(const struct dpaa2_fl_entry *fle)
2464 +{
2465 + return !!((le16_to_cpu(fle->format_offset) >>
2466 + FL_SHORT_LEN_FLAG_SHIFT) & FL_SHORT_LEN_FLAG_MASK);
2467 +}
2468 +
2469 +/**
2470 + * dpaa2_fl_get_len() - Get the length in the FLE
2471 + * @fle: the given frame list entry
2472 + *
2473 + * Return the length field in the frame list entry.
2474 + */
2475 +static inline u32 dpaa2_fl_get_len(const struct dpaa2_fl_entry *fle)
2476 +{
2477 + if (dpaa2_fl_short_len(fle))
2478 + return le32_to_cpu(fle->len) & FL_SHORT_LEN_MASK;
2479 +
2480 + return le32_to_cpu(fle->len);
2481 +}
2482 +
2483 +/**
2484 + * dpaa2_fl_set_len() - Set the length field of FLE
2485 + * @fle: the given frame list entry
2486 + * @len: the length needs to be set in frame list entry
2487 + */
2488 +static inline void dpaa2_fl_set_len(struct dpaa2_fl_entry *fle, u32 len)
2489 +{
2490 + fle->len = cpu_to_le32(len);
2491 +}
2492 +
2493 +/**
2494 + * dpaa2_fl_get_offset() - Get the offset field in the frame list entry
2495 + * @fle: the given frame list entry
2496 + *
2497 + * Return the offset.
2498 + */
2499 +static inline u16 dpaa2_fl_get_offset(const struct dpaa2_fl_entry *fle)
2500 +{
2501 + return le16_to_cpu(fle->format_offset) & FL_OFFSET_MASK;
2502 +}
2503 +
2504 +/**
2505 + * dpaa2_fl_set_offset() - Set the offset field of FLE
2506 + * @fle: the given frame list entry
2507 + * @offset: the offset needs to be set in frame list entry
2508 + */
2509 +static inline void dpaa2_fl_set_offset(struct dpaa2_fl_entry *fle, u16 offset)
2510 +{
2511 + fle->format_offset &= cpu_to_le16(~FL_OFFSET_MASK);
2512 + fle->format_offset |= cpu_to_le16(offset);
2513 +}
2514 +
2515 +/**
2516 + * dpaa2_fl_get_format() - Get the format field in the FLE
2517 + * @fle: the given frame list entry
2518 + *
2519 + * Return the format.
2520 + */
2521 +static inline enum dpaa2_fl_format dpaa2_fl_get_format(
2522 + const struct dpaa2_fl_entry *fle)
2523 +{
2524 + return (enum dpaa2_fl_format)((le16_to_cpu(fle->format_offset) >>
2525 + FL_FORMAT_SHIFT) & FL_FORMAT_MASK);
2526 +}
2527 +
2528 +/**
2529 + * dpaa2_fl_set_format() - Set the format field of FLE
2530 + * @fle: the given frame list entry
2531 + * @format: the format needs to be set in frame list entry
2532 + */
2533 +static inline void dpaa2_fl_set_format(struct dpaa2_fl_entry *fle,
2534 + enum dpaa2_fl_format format)
2535 +{
2536 + fle->format_offset &= cpu_to_le16(~(FL_FORMAT_MASK << FL_FORMAT_SHIFT));
2537 + fle->format_offset |= cpu_to_le16(format << FL_FORMAT_SHIFT);
2538 +}
2539 +
2540 +/**
2541 + * dpaa2_fl_get_bpid() - Get the bpid field in the FLE
2542 + * @fle: the given frame list entry
2543 + *
2544 + * Return the buffer pool id.
2545 + */
2546 +static inline u16 dpaa2_fl_get_bpid(const struct dpaa2_fl_entry *fle)
2547 +{
2548 + return le16_to_cpu(fle->bpid) & FL_BPID_MASK;
2549 +}
2550 +
2551 +/**
2552 + * dpaa2_fl_set_bpid() - Set the bpid field of FLE
2553 + * @fle: the given frame list entry
2554 + * @bpid: buffer pool id to be set
2555 + */
2556 +static inline void dpaa2_fl_set_bpid(struct dpaa2_fl_entry *fle, u16 bpid)
2557 +{
2558 + fle->bpid &= cpu_to_le16(~(FL_BPID_MASK));
2559 + fle->bpid |= cpu_to_le16(bpid);
2560 +}
2561 +
2562 +/**
2563 + * dpaa2_fl_is_final() - Check final bit in FLE
2564 + * @fle: the given frame list entry
2565 + *
2566 + * Return bool.
2567 + */
2568 +static inline bool dpaa2_fl_is_final(const struct dpaa2_fl_entry *fle)
2569 +{
2570 + return !!(le16_to_cpu(fle->format_offset) >> FL_FINAL_FLAG_SHIFT);
2571 +}
2572 +
2573 +/**
2574 + * dpaa2_fl_set_final() - Set the final bit in FLE
2575 + * @fle: the given frame list entry
2576 + * @final: the final boolean to be set
2577 + */
2578 +static inline void dpaa2_fl_set_final(struct dpaa2_fl_entry *fle, bool final)
2579 +{
2580 + fle->format_offset &= cpu_to_le16(~(FL_FINAL_FLAG_MASK <<
2581 + FL_FINAL_FLAG_SHIFT));
2582 + fle->format_offset |= cpu_to_le16(final << FL_FINAL_FLAG_SHIFT);
2583 +}
2584 +
2585 #endif /* __FSL_DPAA2_FD_H */
2586 --- a/drivers/staging/fsl-mc/include/dpaa2-global.h
2587 +++ b/drivers/staging/fsl-mc/include/dpaa2-global.h
2588 @@ -1,33 +1,8 @@
2589 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2590 /*
2591 * Copyright 2014-2016 Freescale Semiconductor Inc.
2592 * Copyright 2016 NXP
2593 *
2594 - * Redistribution and use in source and binary forms, with or without
2595 - * modification, are permitted provided that the following conditions are met:
2596 - * * Redistributions of source code must retain the above copyright
2597 - * notice, this list of conditions and the following disclaimer.
2598 - * * Redistributions in binary form must reproduce the above copyright
2599 - * notice, this list of conditions and the following disclaimer in the
2600 - * documentation and/or other materials provided with the distribution.
2601 - * * Neither the name of Freescale Semiconductor nor the
2602 - * names of its contributors may be used to endorse or promote products
2603 - * derived from this software without specific prior written permission.
2604 - *
2605 - * ALTERNATIVELY, this software may be distributed under the terms of the
2606 - * GNU General Public License ("GPL") as published by the Free Software
2607 - * Foundation, either version 2 of that License or (at your option) any
2608 - * later version.
2609 - *
2610 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
2611 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2612 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2613 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
2614 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2615 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2616 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2617 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2618 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2619 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2620 */
2621 #ifndef __FSL_DPAA2_GLOBAL_H
2622 #define __FSL_DPAA2_GLOBAL_H
2623 --- a/drivers/staging/fsl-mc/include/dpaa2-io.h
2624 +++ b/drivers/staging/fsl-mc/include/dpaa2-io.h
2625 @@ -1,33 +1,8 @@
2626 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2627 /*
2628 * Copyright 2014-2016 Freescale Semiconductor Inc.
2629 - * Copyright NXP
2630 + * Copyright 2017 NXP
2631 *
2632 - * Redistribution and use in source and binary forms, with or without
2633 - * modification, are permitted provided that the following conditions are met:
2634 - * * Redistributions of source code must retain the above copyright
2635 - * notice, this list of conditions and the following disclaimer.
2636 - * * Redistributions in binary form must reproduce the above copyright
2637 - * notice, this list of conditions and the following disclaimer in the
2638 - * documentation and/or other materials provided with the distribution.
2639 - * * Neither the name of Freescale Semiconductor nor the
2640 - * names of its contributors may be used to endorse or promote products
2641 - * derived from this software without specific prior written permission.
2642 - *
2643 - * ALTERNATIVELY, this software may be distributed under the terms of the
2644 - * GNU General Public License ("GPL") as published by the Free Software
2645 - * Foundation, either version 2 of that License or (at your option) any
2646 - * later version.
2647 - *
2648 - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
2649 - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
2650 - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
2651 - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
2652 - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
2653 - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2654 - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
2655 - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2656 - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
2657 - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2658 */
2659 #ifndef __FSL_DPAA2_IO_H
2660 #define __FSL_DPAA2_IO_H
2661 @@ -77,17 +52,20 @@ struct dpaa2_io_desc {
2662 int has_8prio;
2663 int cpu;
2664 void *regs_cena;
2665 - void *regs_cinh;
2666 + void __iomem *regs_cinh;
2667 int dpio_id;
2668 u32 qman_version;
2669 };
2670
2671 -struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc);
2672 +struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc,
2673 + struct device *dev);
2674
2675 void dpaa2_io_down(struct dpaa2_io *d);
2676
2677 irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
2678
2679 +struct dpaa2_io *dpaa2_io_service_select(int cpu);
2680 +
2681 /**
2682 * struct dpaa2_io_notification_ctx - The DPIO notification context structure
2683 * @cb: The callback to be invoked when the notification arrives
2684 @@ -103,7 +81,7 @@ irqreturn_t dpaa2_io_irq(struct dpaa2_io
2685 * Used when a FQDAN/CDAN registration is made by drivers.
2686 */
2687 struct dpaa2_io_notification_ctx {
2688 - void (*cb)(struct dpaa2_io_notification_ctx *);
2689 + void (*cb)(struct dpaa2_io_notification_ctx *ctx);
2690 int is_cdan;
2691 u32 id;
2692 int desired_cpu;
2693 @@ -113,10 +91,14 @@ struct dpaa2_io_notification_ctx {
2694 void *dpio_private;
2695 };
2696
2697 +int dpaa2_io_get_cpu(struct dpaa2_io *d);
2698 +
2699 int dpaa2_io_service_register(struct dpaa2_io *service,
2700 - struct dpaa2_io_notification_ctx *ctx);
2701 + struct dpaa2_io_notification_ctx *ctx,
2702 + struct device *dev);
2703 void dpaa2_io_service_deregister(struct dpaa2_io *service,
2704 - struct dpaa2_io_notification_ctx *ctx);
2705 + struct dpaa2_io_notification_ctx *ctx,
2706 + struct device *dev);
2707 int dpaa2_io_service_rearm(struct dpaa2_io *service,
2708 struct dpaa2_io_notification_ctx *ctx);
2709
2710 @@ -129,9 +111,9 @@ int dpaa2_io_service_enqueue_fq(struct d
2711 const struct dpaa2_fd *fd);
2712 int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
2713 u16 qdbin, const struct dpaa2_fd *fd);
2714 -int dpaa2_io_service_release(struct dpaa2_io *d, u32 bpid,
2715 +int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid,
2716 const u64 *buffers, unsigned int num_buffers);
2717 -int dpaa2_io_service_acquire(struct dpaa2_io *d, u32 bpid,
2718 +int dpaa2_io_service_acquire(struct dpaa2_io *d, u16 bpid,
2719 u64 *buffers, unsigned int num_buffers);
2720
2721 struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
2722 @@ -139,4 +121,64 @@ struct dpaa2_io_store *dpaa2_io_store_cr
2723 void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
2724 struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
2725
2726 +/* Order Restoration Support */
2727 +int dpaa2_io_service_enqueue_orp_fq(struct dpaa2_io *d, u32 fqid,
2728 + const struct dpaa2_fd *fd, u16 orpid,
2729 + u16 seqnum, int last);
2730 +
2731 +int dpaa2_io_service_enqueue_orp_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
2732 + u16 qdbin, const struct dpaa2_fd *fd,
2733 + u16 orpid, u16 seqnum, int last);
2734 +
2735 +int dpaa2_io_service_orp_seqnum_drop(struct dpaa2_io *d, u16 orpid,
2736 + u16 seqnum);
2737 +
2738 +/***************/
2739 +/* CSCN */
2740 +/***************/
2741 +
2742 +/**
2743 + * struct dpaa2_cscn - The CSCN message format
2744 + * @verb: identifies the type of message (should be 0x27).
2745 + * @stat: status bits related to dequeuing response (not used)
2746 + * @state: bit 0 = 0/1 if CG is no/is congested
2747 + * @reserved: reserved byte
2748 + * @cgid: congest grp ID - the first 16 bits
2749 + * @ctx: context data
2750 + *
2751 + * Congestion management can be implemented in software through
2752 + * the use of Congestion State Change Notifications (CSCN). These
2753 + * are messages written by DPAA2 hardware to memory whenever the
2754 + * instantaneous count (I_CNT field in the CG) exceeds the
2755 + * Congestion State (CS) entrance threshold, signifying congestion
2756 + * entrance, or when the instantaneous count returns below exit
2757 + * threshold, signifying congestion exit. The format of the message
2758 + * is given by the dpaa2_cscn structure. Bit 0 of the state field
2759 + * represents congestion state written by the hardware.
2760 + */
2761 +struct dpaa2_cscn {
2762 + u8 verb;
2763 + u8 stat;
2764 + u8 state;
2765 + u8 reserved;
2766 + __le32 cgid;
2767 + __le64 ctx;
2768 +};
2769 +
2770 +#define DPAA2_CSCN_SIZE 64
2771 +#define DPAA2_CSCN_ALIGN 16
2772 +
2773 +#define DPAA2_CSCN_STATE_MASK 0x1
2774 +#define DPAA2_CSCN_CONGESTED 1
2775 +
2776 +static inline bool dpaa2_cscn_state_congested(struct dpaa2_cscn *cscn)
2777 +{
2778 + return ((cscn->state & DPAA2_CSCN_STATE_MASK) == DPAA2_CSCN_CONGESTED);
2779 +}
2780 +
2781 +int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid,
2782 + u32 *fcnt, u32 *bcnt);
2783 +int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid,
2784 + u32 *num);
2785 +
2786 #endif /* __FSL_DPAA2_IO_H */
2787 --- a/drivers/staging/fsl-mc/include/dpbp.h
2788 +++ b/drivers/staging/fsl-mc/include/dpbp.h
2789 @@ -1,34 +1,7 @@
2790 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2791 /*
2792 * Copyright 2013-2016 Freescale Semiconductor Inc.
2793 *
2794 - * Redistribution and use in source and binary forms, with or without
2795 - * modification, are permitted provided that the following conditions are met:
2796 - * * Redistributions of source code must retain the above copyright
2797 - * notice, this list of conditions and the following disclaimer.
2798 - * * Redistributions in binary form must reproduce the above copyright
2799 - * notice, this list of conditions and the following disclaimer in the
2800 - * documentation and/or other materials provided with the distribution.
2801 - * * Neither the name of the above-listed copyright holders nor the
2802 - * names of any contributors may be used to endorse or promote products
2803 - * derived from this software without specific prior written permission.
2804 - *
2805 - *
2806 - * ALTERNATIVELY, this software may be distributed under the terms of the
2807 - * GNU General Public License ("GPL") as published by the Free Software
2808 - * Foundation, either version 2 of that License or (at your option) any
2809 - * later version.
2810 - *
2811 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2812 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2813 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2814 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2815 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2816 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2817 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2818 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2819 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2820 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2821 - * POSSIBILITY OF SUCH DAMAGE.
2822 */
2823 #ifndef __FSL_DPBP_H
2824 #define __FSL_DPBP_H
2825 --- a/drivers/staging/fsl-mc/include/dpcon.h
2826 +++ b/drivers/staging/fsl-mc/include/dpcon.h
2827 @@ -1,33 +1,7 @@
2828 -/* Copyright 2013-2016 Freescale Semiconductor Inc.
2829 +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2830 +/*
2831 + * Copyright 2013-2016 Freescale Semiconductor Inc.
2832 *
2833 - * Redistribution and use in source and binary forms, with or without
2834 - * modification, are permitted provided that the following conditions are met:
2835 - * * Redistributions of source code must retain the above copyright
2836 - * notice, this list of conditions and the following disclaimer.
2837 - * * Redistributions in binary form must reproduce the above copyright
2838 - * notice, this list of conditions and the following disclaimer in the
2839 - * documentation and/or other materials provided with the distribution.
2840 - * * Neither the name of the above-listed copyright holders nor the
2841 - * names of any contributors may be used to endorse or promote products
2842 - * derived from this software without specific prior written permission.
2843 - *
2844 - *
2845 - * ALTERNATIVELY, this software may be distributed under the terms of the
2846 - * GNU General Public License ("GPL") as published by the Free Software
2847 - * Foundation, either version 2 of that License or (at your option) any
2848 - * later version.
2849 - *
2850 - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2851 - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2852 - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2853 - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2854 - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2855 - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2856 - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2857 - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2858 - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2859 - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2860 - * POSSIBILITY OF SUCH DAMAGE.
2861 */
2862 #ifndef __FSL_DPCON_H
2863 #define __FSL_DPCON_H
2864 --- /dev/null
2865 +++ b/drivers/staging/fsl-mc/include/dpopr.h
2866 @@ -0,0 +1,110 @@
2867 +/*
2868 + * Copyright 2017 NXP
2869 + *
2870 + * Redistribution and use in source and binary forms, with or without
2871 + * modification, are permitted provided that the following conditions are met:
2872 + * * Redistributions of source code must retain the above copyright
2873 + * notice, this list of conditions and the following disclaimer.
2874 + * * Redistributions in binary form must reproduce the above copyright
2875 + * notice, this list of conditions and the following disclaimer in the
2876 + * documentation and/or other materials provided with the distribution.
2877 + * * Neither the name of the above-listed copyright holders nor the
2878 + * names of any contributors may be used to endorse or promote products
2879 + * derived from this software without specific prior written permission.
2880 + *
2881 + *
2882 + * ALTERNATIVELY, this software may be distributed under the terms of the
2883 + * GNU General Public License ("GPL") as published by the Free Software
2884 + * Foundation, either version 2 of that License or (at your option) any
2885 + * later version.
2886 + *
2887 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2888 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2889 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2890 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
2891 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2892 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2893 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2894 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2895 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2896 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2897 + * POSSIBILITY OF SUCH DAMAGE.
2898 + */
2899 +#ifndef __FSL_DPOPR_H_
2900 +#define __FSL_DPOPR_H_
2901 +
2902 +/* Data Path Order Restoration API
2903 + * Contains initialization APIs and runtime APIs for the Order Restoration
2904 + */
2905 +
2906 +/** Order Restoration properties */
2907 +
2908 +/**
2909 + * Create a new Order Point Record option
2910 + */
2911 +#define OPR_OPT_CREATE 0x1
2912 +/**
2913 + * Retire an existing Order Point Record option
2914 + */
2915 +#define OPR_OPT_RETIRE 0x2
2916 +
2917 +/**
2918 + * struct opr_cfg - Structure representing OPR configuration
2919 + * @oprrws: Order point record (OPR) restoration window size (0 to 5)
2920 + * 0 - Window size is 32 frames.
2921 + * 1 - Window size is 64 frames.
2922 + * 2 - Window size is 128 frames.
2923 + * 3 - Window size is 256 frames.
2924 + * 4 - Window size is 512 frames.
2925 + * 5 - Window size is 1024 frames.
2926 + * @oa: OPR auto advance NESN window size (0 disabled, 1 enabled)
2927 + * @olws: OPR acceptable late arrival window size (0 to 3)
2928 + * 0 - Disabled. Late arrivals are always rejected.
2929 + * 1 - Window size is 32 frames.
2930 + * 2 - Window size is the same as the OPR restoration
2931 + * window size configured in the OPRRWS field.
2932 + * 3 - Window size is 8192 frames. Late arrivals are
2933 + * always accepted.
2934 + * @oeane: Order restoration list (ORL) resource exhaustion
2935 + * advance NESN enable (0 disabled, 1 enabled)
2936 + * @oloe: OPR loose ordering enable (0 disabled, 1 enabled)
2937 + */
2938 +struct opr_cfg {
2939 + u8 oprrws;
2940 + u8 oa;
2941 + u8 olws;
2942 + u8 oeane;
2943 + u8 oloe;
2944 +};
2945 +
2946 +/**
2947 + * struct opr_qry - Structure representing OPR configuration
2948 + * @enable: Enabled state
2949 + * @rip: Retirement In Progress
2950 + * @ndsn: Next dispensed sequence number
2951 + * @nesn: Next expected sequence number
2952 + * @ea_hseq: Early arrival head sequence number
2953 + * @hseq_nlis: HSEQ not last in sequence
2954 + * @ea_tseq: Early arrival tail sequence number
2955 + * @tseq_nlis: TSEQ not last in sequence
2956 + * @ea_tptr: Early arrival tail pointer
2957 + * @ea_hptr: Early arrival head pointer
2958 + * @opr_id: Order Point Record ID
2959 + * @opr_vid: Order Point Record Virtual ID
2960 + */
2961 +struct opr_qry {
2962 + char enable;
2963 + char rip;
2964 + u16 ndsn;
2965 + u16 nesn;
2966 + u16 ea_hseq;
2967 + char hseq_nlis;
2968 + u16 ea_tseq;
2969 + char tseq_nlis;
2970 + u16 ea_tptr;
2971 + u16 ea_hptr;
2972 + u16 opr_id;
2973 + u16 opr_vid;
2974 +};
2975 +
2976 +#endif /* __FSL_DPOPR_H_ */
2977 --- a/drivers/staging/fsl-mc/include/mc.h
2978 +++ b/drivers/staging/fsl-mc/include/mc.h
2979 @@ -1,12 +1,10 @@
2980 +/* SPDX-License-Identifier: GPL-2.0 */
2981 /*
2982 * Freescale Management Complex (MC) bus public interface
2983 *
2984 * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
2985 * Author: German Rivera <German.Rivera@freescale.com>
2986 *
2987 - * This file is licensed under the terms of the GNU General Public
2988 - * License version 2. This program is licensed "as is" without any
2989 - * warranty of any kind, whether express or implied.
2990 */
2991 #ifndef _FSL_MC_H_
2992 #define _FSL_MC_H_
Staging tree of dedeckeh