target/linux/at91/patches-5.10/170-media-atmel-atmel-isc-add-DMA-to-register-offsets.patch

   1 From 7173e54070a9b530c8c16e0a507be71385133abd Mon Sep 17 00:00:00 2001
   2 From: Eugen Hristev <eugen.hristev@microchip.com>
   3 Date: Tue, 13 Apr 2021 12:57:12 +0200
   4 Subject: [PATCH 170/247] media: atmel: atmel-isc: add DMA to register offsets
   5
   6 The DMA submodule is a part of the atmel-isc pipeline, and stands for
   7 Direct Memory Access. It acts like a master on the AXI bus of the SoC, and
   8 can directly write the RAM area with the pixel data from the ISC internal
   9 sram.
  10 Add dma to the reg offsets struct.
  11 This will allow different products to have a different reg offset for this
  12 particular module.
  13
  14 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  15 Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
  16 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
  17 ---
  18  drivers/media/platform/atmel/atmel-isc-base.c | 19 ++++++++++++-------
  19  drivers/media/platform/atmel/atmel-isc-regs.h |  3 +++
  20  drivers/media/platform/atmel/atmel-isc.h      |  2 ++
  21  .../media/platform/atmel/atmel-sama5d2-isc.c  |  1 +
  22  4 files changed, 18 insertions(+), 7 deletions(-)
  23
  24 --- a/drivers/media/platform/atmel/atmel-isc-base.c
  25 +++ b/drivers/media/platform/atmel/atmel-isc-base.c
  26 @@ -601,16 +601,20 @@ static void isc_start_dma(struct isc_dev
  27                            ISC_PFE_CFG0_COLEN | ISC_PFE_CFG0_ROWEN);
  28
  29         addr0 = vb2_dma_contig_plane_dma_addr(&isc->cur_frm->vb.vb2_buf, 0);
  30 -       regmap_write(regmap, ISC_DAD0, addr0);
  31 +       regmap_write(regmap, ISC_DAD0 + isc->offsets.dma, addr0);
  32
  33         switch (isc->config.fourcc) {
  34         case V4L2_PIX_FMT_YUV420:
  35 -               regmap_write(regmap, ISC_DAD1, addr0 + (sizeimage * 2) / 3);
  36 -               regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 5) / 6);
  37 +               regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
  38 +                            addr0 + (sizeimage * 2) / 3);
  39 +               regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
  40 +                            addr0 + (sizeimage * 5) / 6);
  41                 break;
  42         case V4L2_PIX_FMT_YUV422P:
  43 -               regmap_write(regmap, ISC_DAD1, addr0 + sizeimage / 2);
  44 -               regmap_write(regmap, ISC_DAD2, addr0 + (sizeimage * 3) / 4);
  45 +               regmap_write(regmap, ISC_DAD1 + isc->offsets.dma,
  46 +                            addr0 + sizeimage / 2);
  47 +               regmap_write(regmap, ISC_DAD2 + isc->offsets.dma,
  48 +                            addr0 + (sizeimage * 3) / 4);
  49                 break;
  50         default:
  51                 break;
  52 @@ -618,7 +622,8 @@ static void isc_start_dma(struct isc_dev
  53
  54         dctrl_dview = isc->config.dctrl_dview;
  55
  56 -       regmap_write(regmap, ISC_DCTRL, dctrl_dview | ISC_DCTRL_IE_IS);
  57 +       regmap_write(regmap, ISC_DCTRL + isc->offsets.dma,
  58 +                    dctrl_dview | ISC_DCTRL_IE_IS);
  59         spin_lock(&isc->awb_lock);
  60         regmap_write(regmap, ISC_CTRLEN, ISC_CTRL_CAPTURE);
  61         spin_unlock(&isc->awb_lock);
  62 @@ -731,7 +736,7 @@ static int isc_configure(struct isc_devi
  63         regmap_update_bits(regmap, ISC_RLP_CFG + isc->offsets.rlp,
  64                            ISC_RLP_CFG_MODE_MASK, rlp_mode);
  65
  66 -       regmap_write(regmap, ISC_DCFG, dcfg);
  67 +       regmap_write(regmap, ISC_DCFG + isc->offsets.dma, dcfg);
  68
  69         /* Set the pipeline */
  70         isc_set_pipeline(isc, pipeline);
  71 --- a/drivers/media/platform/atmel/atmel-isc-regs.h
  72 +++ b/drivers/media/platform/atmel/atmel-isc-regs.h
  73 @@ -247,6 +247,9 @@
  74
  75  #define ISC_HIS_CFG_RAR                        BIT(8)
  76
  77 +/* Offset for DMA register specific to sama5d2 product */
  78 +#define ISC_SAMA5D2_DMA_OFFSET 0
  79 +
  80  /* DMA Configuration Register */
  81  #define ISC_DCFG        0x000003e0
  82  #define ISC_DCFG_IMODE_PACKED8          0x0
  83 --- a/drivers/media/platform/atmel/atmel-isc.h
  84 +++ b/drivers/media/platform/atmel/atmel-isc.h
  85 @@ -151,6 +151,7 @@ struct isc_ctrls {
  86   * @sub420:            Offset for the SUB420 register
  87   * @rlp:               Offset for the RLP register
  88   * @his:               Offset for the HIS related registers
  89 + * @dma:               Offset for the DMA related registers
  90   */
  91  struct isc_reg_offsets {
  92         u32 csc;
  93 @@ -159,6 +160,7 @@ struct isc_reg_offsets {
  94         u32 sub420;
  95         u32 rlp;
  96         u32 his;
  97 +       u32 dma;
  98  };
  99
 100  /*
 101 --- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
 102 +++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
 103 @@ -257,6 +257,7 @@ static int atmel_isc_probe(struct platfo
 104         isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
 105         isc->offsets.rlp = ISC_SAMA5D2_RLP_OFFSET;
 106         isc->offsets.his = ISC_SAMA5D2_HIS_OFFSET;
 107 +       isc->offsets.dma = ISC_SAMA5D2_DMA_OFFSET;
 108
 109         /* sama5d2-isc - 8 bits per beat */
 110         isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;