target/linux/at91/patches-5.10/212-ARM-at91-pm-add-sama7g5-ddr-controller.patch

   1 From 3f55310c00b8c478da1458704027036c1a414973 Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 15 Apr 2021 13:50:03 +0300
   4 Subject: [PATCH 212/247] ARM: at91: pm: add sama7g5 ddr controller
   5
   6 Add SAMA7G5 DDR controller to the list of DDR controller compatibles.
   7 At the moment there is no standby support. Adapt the code for this.
   8
   9 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  10 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  11 Link: https://lore.kernel.org/r/20210415105010.569620-18-claudiu.beznea@microchip.com
  12 ---
  13  arch/arm/mach-at91/pm.c | 9 ++++++---
  14  1 file changed, 6 insertions(+), 3 deletions(-)
  15
  16 --- a/arch/arm/mach-at91/pm.c
  17 +++ b/arch/arm/mach-at91/pm.c
  18 @@ -548,6 +548,7 @@ static const struct of_device_id ramc_id
  19         { .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
  20         { .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
  21         { .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
  22 +       { .compatible = "microchip,sama7g5-uddrc", },
  23         { /*sentinel*/ }
  24  };
  25
  26 @@ -569,9 +570,11 @@ static __init int at91_dt_ramc(void)
  27                 }
  28
  29                 ramc = of_id->data;
  30 -               if (!standby)
  31 -                       standby = ramc->idle;
  32 -               soc_pm.data.memctrl = ramc->memctrl;
  33 +               if (ramc) {
  34 +                       if (!standby)
  35 +                               standby = ramc->idle;
  36 +                       soc_pm.data.memctrl = ramc->memctrl;
  37 +               }
  38
  39                 idx++;
  40         }