b5074b58a09f4b88c79a81e2008139658fcf40c1
[openwrt/staging/ldir.git] / target / linux / at91 / patches-5.10 / 229-ARM-dts-at91-sama7g5ek-add-suspend-voltage-for-ddr3l.patch
1 From e5f87471392b344b1261d1eaf93fd44710587ea9 Mon Sep 17 00:00:00 2001
2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
3 Date: Thu, 30 Sep 2021 18:42:17 +0300
4 Subject: [PATCH 229/247] ARM: dts: at91: sama7g5ek: add suspend voltage for
5 ddr3l rail
6
7 SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The
8 1.35V for DDR3L rail at run-time is selected by the proper configuration
9 on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended
10 the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of
11 configuration registers to provide proper voltages on its rail. Run-time
12 configuration registers could be configured differently than suspend
13 configuration register for MCP16502 (VSEL2 affects only run-time
14 configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK
15 switches to self-refresh. Even on self-refresh it needs to be powered by
16 a 1.35V rail. Thus, make sure the PMIC is configured properly when system
17 is suspended.
18
19 Fixes: 7540629e2fc7 (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
20 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
21 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
22 Link: https://lore.kernel.org/r/20210930154219.2214051-2-claudiu.beznea@microchip.com
23 ---
24 arch/arm/boot/dts/at91-sama7g5ek.dts | 2 ++
25 1 file changed, 2 insertions(+)
26
27 --- a/arch/arm/boot/dts/at91-sama7g5ek.dts
28 +++ b/arch/arm/boot/dts/at91-sama7g5ek.dts
29 @@ -196,11 +196,13 @@
30
31 regulator-state-standby {
32 regulator-on-in-suspend;
33 + regulator-suspend-microvolt = <1350000>;
34 regulator-mode = <4>;
35 };
36
37 regulator-state-mem {
38 regulator-on-in-suspend;
39 + regulator-suspend-microvolt = <1350000>;
40 regulator-mode = <4>;
41 };
42 };