bcm27xx: add support for linux v5.15
[openwrt/staging/ldir.git] / target / linux / bcm27xx / patches-5.15 / 950-0407-media-i2c-imx290-Support-60fps-in-2-lane-operation.patch
1 From 9a1509cc97e4329475cbd0c45258dcdf5d49a7f1 Mon Sep 17 00:00:00 2001
2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
3 Date: Thu, 17 Jun 2021 12:05:25 +0100
4 Subject: [PATCH] media: i2c: imx290: Support 60fps in 2 lane operation
5
6 Commit "97589ad61c73 media: i2c: imx290: Add support for 2 data lanes"
7 added support for running in two lane mode (instead of 4), but
8 without changing the link frequency that resulted in a max of 30fps.
9
10 Commit "98e0500eadb7 media: i2c: imx290: Add configurable link frequency
11 and pixel rate" then doubled the link frequency when in 2 lane mode,
12 but didn't undo the correction for running at only 30fps, just extending
13 horizontal blanking instead.
14 It also didn't update the CSI timing registers in accordance with the
15 datasheet.
16
17 Remove the 30fps limit on 2 lane by correcting the register config
18 in accordance with the datasheet for 60fps operation over 2 lanes.
19 Frame rate control (via V4L2_CID_VBLANK or HBLANK) can still reduce
20 the frame rate on 2 lanes back to 30fps.
21
22 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
23 ---
24 drivers/media/i2c/imx290.c | 163 ++++++++++++++++++++++---------------
25 1 file changed, 97 insertions(+), 66 deletions(-)
26
27 --- a/drivers/media/i2c/imx290.c
28 +++ b/drivers/media/i2c/imx290.c
29 @@ -46,8 +46,7 @@ enum imx290_clk_index {
30 #define IMX290_VMAX_MAX 0x3fff
31 #define IMX290_HMAX_LOW 0x301c
32 #define IMX290_HMAX_HIGH 0x301d
33 -#define IMX290_HMAX_MIN_2LANE 4400 /* Min of 4400 pixels = 30fps */
34 -#define IMX290_HMAX_MIN_4LANE 2200 /* Min of 2200 pixels = 60fps */
35 +#define IMX290_HMAX_MIN 2200 /* Min of 2200 pixels = 60fps */
36 #define IMX290_HMAX_MAX 0xffff
37
38 #define IMX290_EXPOSURE_MIN 1
39 @@ -89,8 +88,11 @@ struct imx290_mode {
40 u8 link_freq_index;
41 struct v4l2_rect crop;
42
43 - const struct imx290_regval *data;
44 - u32 data_size;
45 + const struct imx290_regval *mode_data;
46 + u32 mode_data_size;
47 + const struct imx290_regval *lane_data;
48 + u32 lane_data_size;
49 +
50
51 /* Clock setup can vary. Index as enum imx290_clk_index */
52 const struct imx290_regval *clk_data[2];
53 @@ -242,8 +244,9 @@ static const struct imx290_regval imx290
54 { 0x3480, 0x92 },
55 };
56
57 -static const struct imx290_regval imx290_1080p_settings[] = {
58 +static const struct imx290_regval imx290_1080p_common_settings[] = {
59 /* mode settings */
60 + { IMX290_FR_FDG_SEL, 0x01 },
61 { 0x3007, 0x00 },
62 { 0x303a, 0x0c },
63 { 0x3414, 0x0a },
64 @@ -253,8 +256,36 @@ static const struct imx290_regval imx290
65 { 0x3419, 0x04 },
66 { 0x3012, 0x64 },
67 { 0x3013, 0x00 },
68 +};
69 +
70 +static const struct imx290_regval imx290_1080p_2lane_settings[] = {
71 + { 0x3405, 0x00 },
72 /* data rate settings */
73 + { IMX290_PHY_LANE_NUM, 0x01 },
74 + { IMX290_CSI_LANE_MODE, 0x01 },
75 + { 0x3446, 0x77 },
76 + { 0x3447, 0x00 },
77 + { 0x3448, 0x67 },
78 + { 0x3449, 0x00 },
79 + { 0x344a, 0x47 },
80 + { 0x344b, 0x00 },
81 + { 0x344c, 0x37 },
82 + { 0x344d, 0x00 },
83 + { 0x344e, 0x3f },
84 + { 0x344f, 0x00 },
85 + { 0x3450, 0xff },
86 + { 0x3451, 0x00 },
87 + { 0x3452, 0x3f },
88 + { 0x3453, 0x00 },
89 + { 0x3454, 0x37 },
90 + { 0x3455, 0x00 },
91 +};
92 +
93 +static const struct imx290_regval imx290_1080p_4lane_settings[] = {
94 { 0x3405, 0x10 },
95 + /* data rate settings */
96 + { IMX290_PHY_LANE_NUM, 0x03 },
97 + { IMX290_CSI_LANE_MODE, 0x03 },
98 { 0x3446, 0x57 },
99 { 0x3447, 0x00 },
100 { 0x3448, 0x37 },
101 @@ -297,8 +328,9 @@ static const struct imx290_regval imx290
102 { 0x3480, 0x92 },
103 };
104
105 -static const struct imx290_regval imx290_720p_settings[] = {
106 +static const struct imx290_regval imx290_720p_common_settings[] = {
107 /* mode settings */
108 + { IMX290_FR_FDG_SEL, 0x01 },
109 { 0x3007, 0x10 },
110 { 0x303a, 0x06 },
111 { 0x3414, 0x04 },
112 @@ -308,8 +340,36 @@ static const struct imx290_regval imx290
113 { 0x3419, 0x02 },
114 { 0x3012, 0x64 },
115 { 0x3013, 0x00 },
116 +};
117 +
118 +static const struct imx290_regval imx290_720p_2lane_settings[] = {
119 + { 0x3405, 0x00 },
120 + { IMX290_PHY_LANE_NUM, 0x01 },
121 + { IMX290_CSI_LANE_MODE, 0x01 },
122 /* data rate settings */
123 + { 0x3446, 0x67 },
124 + { 0x3447, 0x00 },
125 + { 0x3448, 0x57 },
126 + { 0x3449, 0x00 },
127 + { 0x344a, 0x2f },
128 + { 0x344b, 0x00 },
129 + { 0x344c, 0x27 },
130 + { 0x344d, 0x00 },
131 + { 0x344e, 0x2f },
132 + { 0x344f, 0x00 },
133 + { 0x3450, 0xbf },
134 + { 0x3451, 0x00 },
135 + { 0x3452, 0x2f },
136 + { 0x3453, 0x00 },
137 + { 0x3454, 0x27 },
138 + { 0x3455, 0x00 },
139 +};
140 +
141 +static const struct imx290_regval imx290_720p_4lane_settings[] = {
142 { 0x3405, 0x10 },
143 + { IMX290_PHY_LANE_NUM, 0x03 },
144 + { IMX290_CSI_LANE_MODE, 0x03 },
145 + /* data rate settings */
146 { 0x3446, 0x4f },
147 { 0x3447, 0x00 },
148 { 0x3448, 0x2f },
149 @@ -389,7 +449,7 @@ static const struct imx290_mode imx290_m
150 {
151 .width = 1920,
152 .height = 1080,
153 - .hmax = 0x1130,
154 + .hmax = 0x0898,
155 .vmax = 0x0465,
156 .link_freq_index = FREQ_INDEX_1080P,
157 .crop = {
158 @@ -398,8 +458,10 @@ static const struct imx290_mode imx290_m
159 .width = 1920,
160 .height = 1080,
161 },
162 - .data = imx290_1080p_settings,
163 - .data_size = ARRAY_SIZE(imx290_1080p_settings),
164 + .mode_data = imx290_1080p_common_settings,
165 + .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
166 + .lane_data = imx290_1080p_2lane_settings,
167 + .lane_data_size = ARRAY_SIZE(imx290_1080p_2lane_settings),
168 .clk_data = {
169 [CLK_37_125] = imx290_37_125mhz_clock_1080p,
170 [CLK_74_25] = imx290_74_250mhz_clock_1080p,
171 @@ -409,7 +471,7 @@ static const struct imx290_mode imx290_m
172 {
173 .width = 1280,
174 .height = 720,
175 - .hmax = 0x19c8,
176 + .hmax = 0x0ce4,
177 .vmax = 0x02ee,
178 .link_freq_index = FREQ_INDEX_720P,
179 .crop = {
180 @@ -418,8 +480,10 @@ static const struct imx290_mode imx290_m
181 .width = 1280,
182 .height = 720,
183 },
184 - .data = imx290_720p_settings,
185 - .data_size = ARRAY_SIZE(imx290_720p_settings),
186 + .mode_data = imx290_720p_common_settings,
187 + .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
188 + .lane_data = imx290_720p_2lane_settings,
189 + .lane_data_size = ARRAY_SIZE(imx290_720p_2lane_settings),
190 .clk_data = {
191 [CLK_37_125] = imx290_37_125mhz_clock_1080p,
192 [CLK_74_25] = imx290_74_250mhz_clock_1080p,
193 @@ -441,8 +505,10 @@ static const struct imx290_mode imx290_m
194 .width = 1920,
195 .height = 1080,
196 },
197 - .data = imx290_1080p_settings,
198 - .data_size = ARRAY_SIZE(imx290_1080p_settings),
199 + .mode_data = imx290_1080p_common_settings,
200 + .mode_data_size = ARRAY_SIZE(imx290_1080p_common_settings),
201 + .lane_data = imx290_1080p_4lane_settings,
202 + .lane_data_size = ARRAY_SIZE(imx290_1080p_4lane_settings),
203 .clk_data = {
204 [CLK_37_125] = imx290_37_125mhz_clock_720p,
205 [CLK_74_25] = imx290_74_250mhz_clock_720p,
206 @@ -461,8 +527,10 @@ static const struct imx290_mode imx290_m
207 .width = 1280,
208 .height = 720,
209 },
210 - .data = imx290_720p_settings,
211 - .data_size = ARRAY_SIZE(imx290_720p_settings),
212 + .mode_data = imx290_720p_common_settings,
213 + .mode_data_size = ARRAY_SIZE(imx290_720p_common_settings),
214 + .lane_data = imx290_720p_4lane_settings,
215 + .lane_data_size = ARRAY_SIZE(imx290_720p_4lane_settings),
216 .clk_data = {
217 [CLK_37_125] = imx290_37_125mhz_clock_720p,
218 [CLK_74_25] = imx290_74_250mhz_clock_720p,
219 @@ -1016,8 +1084,18 @@ static int imx290_start_streaming(struct
220 }
221
222 /* Apply default values of current mode */
223 - ret = imx290_set_register_array(imx290, imx290->current_mode->data,
224 - imx290->current_mode->data_size);
225 + ret = imx290_set_register_array(imx290,
226 + imx290->current_mode->mode_data,
227 + imx290->current_mode->mode_data_size);
228 + if (ret < 0) {
229 + dev_err(imx290->dev, "Could not set current mode\n");
230 + return ret;
231 + }
232 +
233 + /* Apply lane config registers of current mode */
234 + ret = imx290_set_register_array(imx290,
235 + imx290->current_mode->lane_data,
236 + imx290->current_mode->lane_data_size);
237 if (ret < 0) {
238 dev_err(imx290->dev, "Could not set current mode\n");
239 return ret;
240 @@ -1080,49 +1158,6 @@ static int imx290_get_regulators(struct
241 imx290->supplies);
242 }
243
244 -static int imx290_set_data_lanes(struct imx290 *imx290)
245 -{
246 - int ret = 0, laneval, frsel;
247 -
248 - switch (imx290->nlanes) {
249 - case 2:
250 - laneval = 0x01;
251 - frsel = 0x02;
252 - break;
253 - case 4:
254 - laneval = 0x03;
255 - frsel = 0x01;
256 - break;
257 - default:
258 - /*
259 - * We should never hit this since the data lane count is
260 - * validated in probe itself
261 - */
262 - dev_err(imx290->dev, "Lane configuration not supported\n");
263 - ret = -EINVAL;
264 - goto exit;
265 - }
266 -
267 - ret = imx290_write_reg(imx290, IMX290_PHY_LANE_NUM, laneval);
268 - if (ret) {
269 - dev_err(imx290->dev, "Error setting Physical Lane number register\n");
270 - goto exit;
271 - }
272 -
273 - ret = imx290_write_reg(imx290, IMX290_CSI_LANE_MODE, laneval);
274 - if (ret) {
275 - dev_err(imx290->dev, "Error setting CSI Lane mode register\n");
276 - goto exit;
277 - }
278 -
279 - ret = imx290_write_reg(imx290, IMX290_FR_FDG_SEL, frsel);
280 - if (ret)
281 - dev_err(imx290->dev, "Error setting FR/FDG SEL register\n");
282 -
283 -exit:
284 - return ret;
285 -}
286 -
287 static int imx290_power_on(struct device *dev)
288 {
289 struct v4l2_subdev *sd = dev_get_drvdata(dev);
290 @@ -1146,9 +1181,6 @@ static int imx290_power_on(struct device
291 gpiod_set_value_cansleep(imx290->rst_gpio, 0);
292 usleep_range(30000, 31000);
293
294 - /* Set data lane count */
295 - imx290_set_data_lanes(imx290);
296 -
297 return 0;
298 }
299
300 @@ -1271,8 +1303,7 @@ static int imx290_probe(struct i2c_clien
301 ret = -EINVAL;
302 goto free_err;
303 }
304 - imx290->hmax_min = (imx290->nlanes == 2) ? IMX290_HMAX_MIN_2LANE :
305 - IMX290_HMAX_MIN_4LANE;
306 + imx290->hmax_min = IMX290_HMAX_MIN;
307
308 dev_dbg(dev, "Using %u data lanes\n", imx290->nlanes);
309